xref: /titanic_52/usr/src/uts/sun4u/sys/pci/pci_chip.h (revision ae115bc77f6fcde83175c75b4206dc2e50747966)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_PCI_CHIP_H
27 #define	_SYS_PCI_CHIP_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifdef	__cplusplus
32 extern "C" {
33 #endif
34 
35 extern void pci_post_init_child(pci_t *pci_p, dev_info_t *child);
36 extern void pci_post_uninit_child(pci_t *pci_p);
37 
38 extern int pci_obj_setup(pci_t *pci_p);
39 extern void pci_obj_destroy(pci_t *pci_p);
40 extern void pci_obj_resume(pci_t *pci_p);
41 extern void pci_obj_suspend(pci_t *pci_p);
42 
43 extern void pci_kstat_init(void);
44 extern void pci_kstat_fini(void);
45 
46 extern void pci_add_pci_kstat(pci_t *pci_p);
47 extern void pci_rem_pci_kstat(pci_t *pci_p);
48 
49 extern void pci_add_upstream_kstat(pci_t *pci_p);
50 
51 extern void pci_fix_ranges(pci_ranges_t *rng_p, int rng_entries);
52 extern int map_pci_registers(pci_t *pci_p, dev_info_t *dip);
53 
54 extern uint_t pbm_disable_pci_errors(pbm_t *pbm_p);
55 extern uintptr_t get_pbm_reg_base(pci_t *pci_p);
56 
57 extern uint32_t ib_map_reg_get_cpu(volatile uint64_t reg);
58 extern uint64_t *ib_intr_map_reg_addr(ib_t *ib_p, ib_ino_t ino);
59 extern uint64_t *ib_clear_intr_reg_addr(ib_t *ib_p, ib_ino_t ino);
60 extern void pci_pbm_intr_dist(pbm_t *pbm_p);
61 
62 extern void pci_cb_setup(pci_t *pci_p);
63 extern void pci_cb_teardown(pci_t *pci_p);
64 extern int cb_register_intr(pci_t *pci_p);
65 extern void cb_enable_intr(pci_t *pci_p);
66 extern uint64_t cb_ino_to_map_pa(cb_t *cb_p, ib_ino_t ino);
67 extern uint64_t cb_ino_to_clr_pa(cb_t *cb_p, ib_ino_t ino);
68 extern int cb_remove_xintr(pci_t *pci_p, dev_info_t *dip, dev_info_t *rdip,
69 		ib_ino_t ino, ib_mondo_t mondo);
70 extern uint32_t pci_xlate_intr(dev_info_t *dip, dev_info_t *rdip,
71 		ib_t *ib_p, uint32_t intr);
72 extern uint32_t pci_intr_dist_cpuid(ib_t *ib_p, ib_ino_info_t *ino_p);
73 
74 extern void pci_ecc_setup(ecc_t *ecc_p);
75 extern ushort_t pci_ecc_get_synd(uint64_t afsr);
76 
77 extern uintptr_t pci_iommu_setup(iommu_t *iommu_p);
78 extern void pci_iommu_teardown(iommu_t *iommu_p);
79 extern void pci_iommu_config(iommu_t *iommu_p, uint64_t iommu_ctl,
80 		uint64_t cfgpa);
81 
82 extern dvma_context_t pci_iommu_get_dvma_context(iommu_t *iommu_p,
83 		dvma_addr_t dvma_pg_index);
84 extern void pci_iommu_free_dvma_context(iommu_t *iommu_p, dvma_context_t ctx);
85 
86 extern void pci_pbm_setup(pbm_t *pbm_p);
87 extern void pci_pbm_teardown(pbm_t *pbm_p);
88 extern void pci_pbm_dma_sync(pbm_t *pbm_p, ib_ino_t ino);
89 
90 extern uint64_t pci_sc_configure(pci_t *pci_p);
91 extern void pci_sc_setup(sc_t *sc_p);
92 extern int pci_sc_ctx_inv(dev_info_t *dip, sc_t *sc_p, ddi_dma_impl_t *mp);
93 
94 extern uintptr_t pci_ib_setup(ib_t *ib_p);
95 extern int pci_get_numproxy(dev_info_t *dip);
96 
97 extern int pci_ecc_add_intr(pci_t *pci_p, int inum, ecc_intr_info_t *eii_p);
98 extern void pci_ecc_rem_intr(pci_t *pci_p, int inum, ecc_intr_info_t *eii_p);
99 
100 extern int pci_pbm_err_handler(dev_info_t *dip, ddi_fm_error_t *derr,
101 		const void *impl_data, int caller);
102 extern void pci_ecc_classify(uint64_t err, ecc_errstate_t *ecc_err_p);
103 extern int pci_pbm_classify(pbm_errstate_t *pbm_err_p);
104 extern void pci_format_addr(dev_info_t *dip, uint64_t *afar, uint64_t afsr);
105 extern int pci_check_error(pci_t *pci_p);
106 
107 extern int pci_pbm_add_intr(pci_t *pci_p);
108 extern void pci_pbm_rem_intr(pci_t *pci_p);
109 
110 extern void pci_pbm_suspend(pci_t *pci_p);
111 extern void pci_pbm_resume(pci_t *pci_p);
112 
113 extern int pci_bus_quiesce(pci_t *pci_p, dev_info_t *dip, void *arg);
114 extern int pci_bus_unquiesce(pci_t *pci_p, dev_info_t *dip, void *arg);
115 
116 extern void pci_vmem_free(iommu_t *iommu_p, ddi_dma_impl_t *mp,
117 		void *dvma_addr, size_t npages);
118 
119 extern dma_bypass_addr_t pci_iommu_bypass_end_configure(void);
120 
121 #ifdef	__cplusplus
122 }
123 #endif
124 
125 #endif	/* _SYS_PCI_CHIP_H */
126