xref: /titanic_52/usr/src/uts/sun4u/sys/machthread.h (revision fa9e4066f08beec538e775443c5be79dd423fcab)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_MACHTHREAD_H
28 #define	_SYS_MACHTHREAD_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #include <sys/asi.h>
33 #include <sys/sun4asi.h>
34 #include <sys/machasi.h>
35 #include <sys/bitmap.h>
36 
37 #ifdef	__cplusplus
38 extern "C" {
39 #endif
40 
41 #ifdef	_ASM
42 
43 #define	THREAD_REG	%g7		/* pointer to current thread data */
44 
45 /*
46  * Get the processor implementation from the version register.
47  */
48 #define	GET_CPU_IMPL(out)		\
49 	rdpr	%ver,	out;		\
50 	srlx	out, 32, out;		\
51 	sll	out, 16, out;		\
52 	srl	out, 16, out;
53 
54 #ifdef	_STARFIRE
55 /*
56  * CPU_INDEX(r, scr)
57  * Returns cpu id in r.
58  * On Starfire, this is read from the Port Controller's Port ID
59  * register in local space.
60  *
61  * Need to load the 64 bit address of the PC's PortID reg
62  * using only one register. Kludge the 41 bits address constant to
63  * be 32bits by shifting it 12 bits to the right first.
64  */
65 #define	LOCAL_PC_PORTID_ADDR_SRL12 0x1FFF4000
66 #define	PC_PORT_ID 0xD0
67 
68 #define	CPU_INDEX(r, scr)			\
69 	rdpr	%pstate, scr;			\
70 	andn	scr, PSTATE_IE | PSTATE_AM, r;	\
71 	wrpr	r, 0, %pstate;			\
72 	set	LOCAL_PC_PORTID_ADDR_SRL12, r;  \
73 	sllx    r, 12, r;                       \
74 	or	r, PC_PORT_ID, r;		\
75 	lduwa	[r]ASI_IO, r;			\
76 	wrpr	scr, 0, %pstate
77 
78 #else /* _STARFIRE */
79 
80 /*
81  * UPA supports up to 32 devices while Safari supports up to
82  * 1024 devices (utilizing the SSM protocol). Based upon the
83  * value of NCPU, a 5- or 10-bit mask will be needed for
84  * extracting the cpu id.
85  */
86 #if NCPU > 32
87 #define	CPU_MASK	0x3ff
88 #else
89 #define	CPU_MASK	0x1f
90 #endif	/* NCPU > 32 */
91 
92 /*
93  * CPU_INDEX(r, scr)
94  * Returns cpu id in r.
95  * For UPA based systems, the cpu id corresponds to the mid field in
96  * the UPA config register. For Safari based machines, the cpu id
97  * corresponds to the aid field in the Safari config register.
98  *
99  * XXX - scr reg is not used here.
100  */
101 #define	CPU_INDEX(r, scr)		\
102 	ldxa	[%g0]ASI_UPA_CONFIG, r;	\
103 	srlx	r, 17, r;		\
104 	and	r, CPU_MASK, r
105 
106 #endif	/* _STARFIRE */
107 
108 /*
109  * Given a cpu id extract the appropriate word
110  * in the cpuset mask for this cpu id.
111  */
112 #if CPUSET_SIZE > CLONGSIZE
113 #define	CPU_INDEXTOSET(base, index, scr)	\
114 	srl	index, BT_ULSHIFT, scr;		\
115 	and	index, BT_ULMASK, index;	\
116 	sll	scr, CLONGSHIFT, scr;		\
117 	add	base, scr, base
118 #else
119 #define	CPU_INDEXTOSET(base, index, scr)
120 #endif	/* CPUSET_SIZE */
121 
122 
123 /*
124  * Assembly macro to find address of the current CPU.
125  * Used when coming in from a user trap - cannot use THREAD_REG.
126  * Args are destination register and one scratch register.
127  */
128 #define	CPU_ADDR(reg, scr) 		\
129 	.global	cpu;			\
130 	CPU_INDEX(scr, reg);		\
131 	sll	scr, CPTRSHIFT, scr;	\
132 	set	cpu, reg;		\
133 	ldn	[reg + scr], reg
134 
135 #define	CINT64SHIFT	3
136 
137 /*
138  * Assembly macro to find the physical address of the current CPU.
139  * All memory references using VA must be limited to nucleus
140  * memory to avoid any MMU side effect.
141  */
142 #define	CPU_PADDR(reg, scr)				\
143 	.global cpu_pa;					\
144 	CPU_INDEX(scr, reg);				\
145 	sll	scr, CINT64SHIFT, scr;			\
146 	set	cpu_pa, reg;				\
147 	ldx	[reg + scr], reg
148 
149 #endif	/* _ASM */
150 
151 #ifdef	__cplusplus
152 }
153 #endif
154 
155 #endif	/* _SYS_MACHTHREAD_H */
156