1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_MACHSYSTM_H 27 #define _SYS_MACHSYSTM_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 /* 32 * Numerous platform-dependent interfaces that don't seem to belong 33 * in any other header file. 34 * 35 * This file should not be included by code that purports to be 36 * platform-independent. 37 */ 38 39 #ifndef _ASM 40 #include <sys/types.h> 41 #include <sys/scb.h> 42 #include <sys/varargs.h> 43 #include <sys/machparam.h> 44 #include <sys/thread.h> 45 #include <vm/seg_enum.h> 46 #include <sys/processor.h> 47 #include <sys/sunddi.h> 48 #include <sys/memlist.h> 49 #include <sys/async.h> 50 #include <sys/errorq.h> 51 #endif /* _ASM */ 52 53 #ifdef __cplusplus 54 extern "C" { 55 #endif 56 57 #ifdef _KERNEL 58 59 #ifndef _ASM 60 /* 61 * The following enum types determine how interrupts are distributed 62 * on a sun4u system. 63 */ 64 enum intr_policies { 65 /* 66 * Target interrupt at the CPU running the add_intrspec 67 * thread. Also used to target all interrupts at the panicing 68 * CPU. 69 */ 70 INTR_CURRENT_CPU = 0, 71 72 /* 73 * Target all interrupts at the boot cpu 74 */ 75 INTR_BOOT_CPU, 76 77 /* 78 * Flat distribution of all interrupts 79 */ 80 INTR_FLAT_DIST, 81 82 /* 83 * Weighted distribution of all interrupts 84 */ 85 INTR_WEIGHTED_DIST 86 }; 87 88 89 /* 90 * Structure that defines the interrupt distribution list. It contains 91 * enough info about the interrupt so that it can callback the parent 92 * nexus driver and retarget the interrupt to a different CPU. 93 */ 94 struct intr_dist { 95 struct intr_dist *next; /* link to next in list */ 96 void (*func)(void *); /* Callback function */ 97 void *arg; /* Nexus parent callback arg 1 */ 98 }; 99 100 /* 101 * Miscellaneous cpu_state changes 102 */ 103 extern void power_down(const char *); 104 extern void do_shutdown(void); 105 106 /* 107 * Number of seconds until power is shut off 108 */ 109 extern int thermal_powerdown_delay; 110 111 112 /* 113 * prom-related 114 */ 115 extern int obpdebug; 116 extern int forthdebug_supported; 117 extern uint_t tba_taken_over; 118 extern void forthdebug_init(void); 119 extern void init_vx_handler(void); 120 extern void kern_preprom(void); 121 extern void kern_postprom(void); 122 123 /* 124 * externally (debugger or prom) initiated panic 125 */ 126 extern struct regs sync_reg_buf; 127 extern uint64_t sync_tt; 128 extern void sync_handler(void); 129 130 /* 131 * Trap-related 132 */ 133 struct regs; 134 extern void trap(struct regs *rp, caddr_t addr, uint32_t type, 135 uint32_t mmu_fsr); 136 extern void *get_tba(void); 137 extern void *set_tba(void *); 138 extern caddr_t set_trap_table(void); 139 extern struct scb trap_table; 140 141 struct trap_info { 142 struct regs *trap_regs; 143 uint_t trap_type; 144 caddr_t trap_addr; 145 uint_t trap_mmu_fsr; 146 }; 147 148 /* 149 * misc. primitives 150 */ 151 extern void debug_flush_windows(void); 152 extern void flush_windows(void); 153 extern int getprocessorid(void); 154 extern void reestablish_curthread(void); 155 156 extern void stphys(uint64_t physaddr, int value); 157 extern int ldphys(uint64_t physaddr); 158 extern void stdphys(uint64_t physaddr, uint64_t value); 159 extern uint64_t lddphys(uint64_t physaddr); 160 161 extern void stphysio(u_longlong_t physaddr, uint_t value); 162 extern uint_t ldphysio(u_longlong_t physaddr); 163 extern void sthphysio(u_longlong_t physaddr, ushort_t value); 164 extern ushort_t ldhphysio(u_longlong_t physaddr); 165 extern void stbphysio(u_longlong_t physaddr, uchar_t value); 166 extern uchar_t ldbphysio(u_longlong_t physaddr); 167 extern void stdphysio(u_longlong_t physaddr, u_longlong_t value); 168 extern u_longlong_t lddphysio(u_longlong_t physaddr); 169 170 extern int pf_is_dmacapable(pfn_t); 171 172 extern int dip_to_cpu_id(dev_info_t *dip, processorid_t *cpu_id); 173 174 extern void set_cmp_error_steering(void); 175 176 /* 177 * SPARCv9 %ver register and field definitions 178 */ 179 180 #define ULTRA_VER_MANUF(x) ((x) >> 48) 181 #define ULTRA_VER_IMPL(x) (((x) >> 32) & 0xFFFF) 182 #define ULTRA_VER_MASK(x) (((x) >> 24) & 0xFF) 183 184 extern uint64_t ultra_getver(void); 185 186 /* 187 * bootup-time 188 */ 189 extern int ncpunode; 190 extern int niobus; 191 192 extern void segnf_init(void); 193 extern void kern_setup1(void); 194 extern void startup(void); 195 extern void post_startup(void); 196 extern void install_va_to_tte(void); 197 extern void setwstate(uint_t); 198 extern void create_va_to_tte(void); 199 extern int memscrub_init(void); 200 201 extern void kcpc_hw_init(void); 202 extern void kcpc_hw_startup_cpu(ushort_t); 203 extern int kcpc_hw_load_pcbe(void); 204 205 /* 206 * Interrupts 207 */ 208 struct cpu; 209 extern struct cpu cpu0; 210 extern struct scb *set_tbr(struct scb *); 211 212 extern uint_t disable_vec_intr(void); 213 extern void enable_vec_intr(uint_t); 214 extern void setintrenable(int); 215 216 extern void intr_dist_add(void (*f)(void *), void *); 217 extern void intr_dist_rem(void (*f)(void *), void *); 218 extern void intr_dist_add_weighted(void (*f)(void *, int32_t, int32_t), void *); 219 extern void intr_dist_rem_weighted(void (*f)(void *, int32_t, int32_t), void *); 220 221 extern uint32_t intr_dist_cpuid(void); 222 223 void intr_dist_cpuid_add_device_weight(uint32_t cpuid, dev_info_t *dip, 224 int32_t weight); 225 void intr_dist_cpuid_rem_device_weight(uint32_t cpuid, dev_info_t *dip); 226 227 extern void intr_redist_all_cpus(void); 228 extern void intr_redist_all_cpus_shutdown(void); 229 230 extern void send_dirint(int, int); 231 extern void setsoftint(uint64_t); 232 extern void setsoftint_tl1(uint64_t, uint64_t); 233 extern void siron(void); 234 extern uint64_t getidsr(void); 235 extern void intr_enqueue_req(uint_t pil, uint64_t inum); 236 extern void intr_dequeue_req(uint_t pil, uint64_t inum); 237 extern void wr_clr_softint(uint_t); 238 239 /* 240 * Time- and %tick-related 241 */ 242 extern hrtime_t rdtick(void); 243 extern void tick_write_delta(uint64_t); 244 extern void tickcmpr_set(uint64_t); 245 extern void tickcmpr_reset(void); 246 extern void tickcmpr_disable(void); 247 extern int tickcmpr_disabled(void); 248 extern uint64_t cbe_level14_inum; 249 250 /* 251 * Caches 252 */ 253 extern int vac; 254 extern int cache; 255 extern int use_mp; 256 extern uint_t vac_mask; 257 extern uint64_t ecache_flushaddr; 258 extern int dcache_size; /* Maximum dcache size */ 259 extern int dcache_linesize; /* Minimum dcache linesize */ 260 extern int icache_size; /* Maximum icache size */ 261 extern int icache_linesize; /* Minimum icache linesize */ 262 extern int ecache_alignsize; /* Maximum ecache linesize for struct align */ 263 extern int ecache_size; /* Maximum ecache size */ 264 extern int ecache_associativity; /* ecache associativity */ 265 extern int ecache_setsize; /* Maximum ecache setsize possible */ 266 extern int cpu_setsize; /* Maximum ecache setsize of configured cpus */ 267 268 /* 269 * VM 270 */ 271 extern int do_pg_coloring; 272 extern int use_page_coloring; 273 extern uint_t vac_colors_mask; 274 275 extern int ndata_alloc_page_freelists(struct memlist *, int); 276 extern int ndata_alloc_dmv(struct memlist *); 277 extern int ndata_alloc_tsbs(struct memlist *, pgcnt_t); 278 extern int ndata_alloc_hat(struct memlist *, pgcnt_t, pgcnt_t); 279 extern caddr_t alloc_page_freelists(int, caddr_t, int); 280 extern caddr_t alloc_hme_buckets(caddr_t, int); 281 extern size_t page_ctrs_sz(void); 282 extern caddr_t page_ctrs_alloc(caddr_t); 283 extern void page_freelist_coalesce_all(int); 284 extern void ppmapinit(void); 285 extern void hwblkpagecopy(const void *, void *); 286 extern void hw_pa_bcopy32(uint64_t, uint64_t); 287 288 extern int pp_slots; 289 extern int pp_consistent_coloring; 290 291 /* 292 * ppcopy/hwblkpagecopy interaction. See ppage.c. 293 */ 294 #define PPAGE_STORE_VCOLORING 0x1 /* use vcolors to maintain consistency */ 295 #define PPAGE_LOAD_VCOLORING 0x2 /* use vcolors to maintain consistency */ 296 #define PPAGE_STORES_POLLUTE 0x4 /* stores pollute VAC */ 297 #define PPAGE_LOADS_POLLUTE 0x8 /* loads pollute VAC */ 298 299 /* 300 * VIS-accelerated copy/zero 301 */ 302 extern int use_hw_bcopy; 303 extern uint_t hw_copy_limit_1; 304 extern uint_t hw_copy_limit_2; 305 extern uint_t hw_copy_limit_4; 306 extern uint_t hw_copy_limit_8; 307 extern int use_hw_bzero; 308 309 #ifdef CHEETAH 310 #define VIS_COPY_THRESHOLD 256 311 #else 312 #define VIS_COPY_THRESHOLD 900 313 #endif 314 315 /* 316 * MP 317 */ 318 extern void idle_other_cpus(void); 319 extern void resume_other_cpus(void); 320 extern void stop_other_cpus(void); 321 extern void idle_stop_xcall(void); 322 extern void set_idle_cpu(int); 323 extern void unset_idle_cpu(int); 324 extern void mp_cpu_quiesce(struct cpu *); 325 326 /* 327 * Error handling 328 */ 329 extern void set_error_enable(uint64_t neer); 330 extern void set_error_enable_tl1(uint64_t neer, uint64_t action); 331 extern uint64_t get_error_enable(void); 332 extern void get_asyncflt(uint64_t *afsr); 333 extern void set_asyncflt(uint64_t afsr); 334 extern void get_asyncaddr(uint64_t *afar); 335 extern void scrubphys(uint64_t paddr, int ecache_size); 336 extern void clearphys(uint64_t paddr, int ecache_size, int ecache_linesize); 337 extern void flushecacheline(uint64_t paddr, int ecache_size); 338 extern int ce_scrub_xdiag_recirc(struct async_flt *, errorq_t *, 339 errorq_elem_t *, size_t); 340 extern char *flt_to_error_type(struct async_flt *); 341 342 /* 343 * Panic at TL > 0 344 */ 345 extern uint64_t cpu_pa[]; 346 extern void ptl1_init_cpu(struct cpu *); 347 348 /* 349 * Defines for DR interfaces 350 */ 351 #define DEVI_BRANCH_CHILD 0x01 /* Walk immediate children of root */ 352 #define DEVI_BRANCH_CONFIGURE 0x02 /* Configure branch after create */ 353 #define DEVI_BRANCH_DESTROY 0x04 /* Destroy branch after unconfigure */ 354 #define DEVI_BRANCH_EVENT 0x08 /* Post NDI event */ 355 #define DEVI_BRANCH_PROM 0x10 /* Branches derived from PROM nodes */ 356 #define DEVI_BRANCH_SID 0x20 /* SID node branches */ 357 #define DEVI_BRANCH_ROOT 0x40 /* Node is the root of a branch */ 358 359 typedef struct devi_branch { 360 void *arg; 361 void (*devi_branch_callback)(dev_info_t *, void *, uint_t); 362 int type; 363 union { 364 int (*prom_branch_select)(pnode_t, void *, uint_t); 365 int (*sid_branch_create)(dev_info_t *, void *, uint_t); 366 } create; 367 } devi_branch_t; 368 369 370 /* 371 * Prototypes which really belongs to sunddi.c, and should be moved to 372 * sunddi.c if there is another platform using these calls. 373 */ 374 extern int e_ddi_branch_create(dev_info_t *pdip, devi_branch_t *bp, 375 dev_info_t **dipp, uint_t flags); 376 extern int e_ddi_branch_configure(dev_info_t *rdip, dev_info_t **dipp, 377 uint_t flags); 378 extern int e_ddi_branch_unconfigure(dev_info_t *rdip, dev_info_t **dipp, 379 uint_t flags); 380 extern int e_ddi_branch_destroy(dev_info_t *rdip, dev_info_t **dipp, 381 uint_t flags); 382 extern void e_ddi_branch_hold(dev_info_t *rdip); 383 extern void e_ddi_branch_rele(dev_info_t *rdip); 384 extern int e_ddi_branch_held(dev_info_t *rdip); 385 extern int e_ddi_branch_referenced(dev_info_t *rdip, 386 int (*cb)(dev_info_t *dip, void *, uint_t), void *arg); 387 388 /* 389 * Constants which define the "hole" in the 64-bit sfmmu address space. 390 * These are set to specific values by the CPU module code. 391 */ 392 extern caddr_t hole_start, hole_end; 393 394 /* kpm mapping window */ 395 extern size_t kpm_size; 396 extern uchar_t kpm_size_shift; 397 extern caddr_t kpm_vbase; 398 399 #define INVALID_VADDR(a) (((a) >= hole_start && (a) < hole_end)) 400 401 extern void adjust_hw_copy_limits(int); 402 403 #endif /* _ASM */ 404 405 /* 406 * Actions for set_error_enable_tl1 407 */ 408 #define EER_SET_ABSOLUTE 0x0 409 #define EER_SET_SETBITS 0x1 410 #define EER_SET_CLRBITS 0x2 411 412 #endif /* _KERNEL */ 413 414 #ifdef __cplusplus 415 } 416 #endif 417 418 #endif /* _SYS_MACHSYSTM_H */ 419