1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 1991-2000 by Sun Microsystems, Inc. 24 * All rights reserved. 25 */ 26 /* 27 * Copyright 2012 Garrett D'Amore <garrett@damore.org>. All rights reserved. 28 */ 29 30 #ifndef _SYS_IOMMU_H 31 #define _SYS_IOMMU_H 32 33 #if defined(_KERNEL) && !defined(_ASM) 34 #include <sys/sunddi.h> 35 #include <sys/sysiosbus.h> 36 #include <sys/ddi_impldefs.h> 37 #endif /* defined(_KERNEL) && !defined(_ASM) */ 38 39 #ifdef __cplusplus 40 extern "C" { 41 #endif 42 43 #ifndef _ASM 44 /* constants for DVMA */ 45 /* 46 * It takes an 8byte TSB entry to map i an 8k page, so the conversion 47 * from tsb size to dvma mapping is to multiply by 1000 or 0x400 48 * left shift by 10 does this 49 */ 50 #define IOMMU_TSB_TO_RNG 0xa 51 #define IOMMU_TSB_SIZE_8M 0x2000 52 #define IOMMU_TSB_SIZE_16M 0x4000 53 #define IOMMU_TSB_SIZE_32M 0x8000 54 #define IOMMU_TSB_SIZE_64M 0x10000 55 #define IOMMU_TSB_SIZE_128M 0x20000 56 #define IOMMU_TSB_SIZE_256M 0x40000 57 #define IOMMU_TSB_SIZE_512M 0x80000 58 #define IOMMU_TSB_SIZE_1G 0x100000 59 60 #define IOMMU_PAGESIZE 0x2000 /* 8k page */ 61 #define IOMMU_PAGEMASK 0x1fff 62 #define IOMMU_PAGEOFFSET (IOMMU_PAGESIZE - 1) 63 #define IOMMU_N_TTES (IOMMU_DVMA_RANGE/IOMMU_PAGESIZE) 64 #define IOMMU_TSB_TBL_SIZE (IOMMU_N_TTES << 3) /* 8B for each entry */ 65 #define IOMMU_PAGESHIFT 13 66 67 #define OFF_IOMMU_CTRL_REG 0x2400 68 #define IOMMU_CTRL_REG_SIZE (NATURAL_REG_SIZE) 69 #define OFF_TSB_BASE_ADDR 0x2408 70 #define TSB_BASE_ADDR_SIZE (NATURAL_REG_SIZE) 71 #define OFF_IOMMU_FLUSH_REG 0x2410 72 #define IOMMU_FLUSH_REG (NATURAL_REG_SIZE) 73 #define OFF_IOMMU_TLB_TAG 0x4580 74 #define OFF_IOMMU_TLB_DATA 0x4600 75 76 #define TSB_SIZE 3 /* 64M of DVMA */ 77 #define TSB_SIZE_SHIFT 16 78 #define IOMMU_TLB_ENTRIES 16 79 80 #define IOMMU_DISABLE 0 /* Turns off the IOMMU */ 81 #define IOMMU_ENABLE 1 /* Turns on the IOMMU */ 82 #define IOMMU_TLB_VALID 0x40000000ull 83 #define IOMMU_DIAG_ENABLE 0x2ull 84 85 /* 86 * Bit positions in the TLB entries 87 */ 88 #define IOMMU_TLBTAG_WRITABLE (1 << 21) 89 #define IOMMU_TLBTAB_STREAM (1 << 20) 90 #define IOMMU_TLBTAG_SIZE (1 << 19) 91 #define IOMMU_TLBTAG_VA_MASK 0x7ffff /* 19-bit vpn */ 92 #define IOMMU_TLBTAG_VA_SHIFT 13 93 94 #define IOMMU_TLBDATA_VALID (1 << 30) 95 #define IOMMU_TLBDATA_LOCAL (1 << 29) 96 #define IOMMU_TLBDATA_CACHEABLE (1 << 28) 97 #define IOMMU_TLBDATA_PA_MASK 0xfffffff /* 28-bit ppn */ 98 #define IOMMU_TLBDATA_PA_SHIFT 13 99 100 /* 101 * define IOPTEs 102 */ 103 #define IOTTE_PFN_MSK 0x1ffffffe000ull 104 #define IOTTE_CACHE 0x10ull 105 #define IOTTE_WRITE 0x2ull 106 #define IOTTE_STREAM 0x1000000000000000ull 107 #define IOTTE_INTRA 0x800000000000000ull 108 #define IOTTE_64K_PAGE 0x2000000000000000ull 109 #endif /* _ASM */ 110 #define IOTTE_VALID 0x8000000000000000ull 111 #define IOTTE_PFN_SHIFT 13 112 113 /* 114 * IOMMU pages to bytes, and back (with and without rounding) 115 */ 116 #define iommu_ptob(x) ((x) << IOMMU_PAGESHIFT) 117 #define iommu_btop(x) (((ioaddr_t)(x)) >> IOMMU_PAGESHIFT) 118 #define iommu_btopr(x) \ 119 ((((ioaddr_t)(x) + IOMMU_PAGEOFFSET) >> IOMMU_PAGESHIFT)) 120 121 #if defined(_KERNEL) && !defined(_ASM) 122 123 /* sbus nexus private dma mapping structure. */ 124 struct dma_impl_priv { 125 ddi_dma_impl_t mp; 126 struct sbus_soft_state *softsp; 127 volatile int sync_flag; 128 uint64_t phys_sync_flag; 129 }; 130 131 extern int iommu_init(struct sbus_soft_state *, caddr_t); 132 extern int iommu_resume_init(struct sbus_soft_state *); 133 extern int iommu_dma_mctl(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 134 enum ddi_dma_ctlops, off_t *, size_t *, caddr_t *, uint_t); 135 extern int iommu_dma_allochdl(dev_info_t *, dev_info_t *, ddi_dma_attr_t *, 136 int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *); 137 extern int iommu_dma_freehdl(dev_info_t *, dev_info_t *, ddi_dma_handle_t); 138 extern int iommu_dma_bindhdl(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 139 struct ddi_dma_req *, ddi_dma_cookie_t *, uint_t *); 140 extern int iommu_dma_unbindhdl(dev_info_t *, dev_info_t *, ddi_dma_handle_t); 141 extern int iommu_dma_flush(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 142 off_t, size_t, uint_t); 143 extern int iommu_dma_win(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 144 uint_t, off_t *, size_t *, ddi_dma_cookie_t *, uint_t *); 145 146 extern void iommu_dvma_kaddr_load(ddi_dma_handle_t h, caddr_t a, uint_t len, 147 uint_t index, ddi_dma_cookie_t *cp); 148 149 extern void iommu_dvma_unload(ddi_dma_handle_t h, uint_t objindex, uint_t view); 150 151 extern void iommu_dvma_sync(ddi_dma_handle_t h, uint_t objindex, uint_t view); 152 153 #endif /* _KERNEL && !_ASM */ 154 155 #ifdef __cplusplus 156 } 157 #endif 158 159 #endif /* _SYS_IOMMU_H */ 160