xref: /titanic_52/usr/src/uts/sun4u/sys/i2c/nexus/pcf8584.h (revision afd7fd7b2e19d8a40c0b602c50de34faa641f387)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
57c478bd9Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
67c478bd9Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
77c478bd9Sstevel@tonic-gate  * with the License.
87c478bd9Sstevel@tonic-gate  *
97c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
107c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
117c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
127c478bd9Sstevel@tonic-gate  * and limitations under the License.
137c478bd9Sstevel@tonic-gate  *
147c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
157c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
167c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
177c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
187c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
197c478bd9Sstevel@tonic-gate  *
207c478bd9Sstevel@tonic-gate  * CDDL HEADER END
217c478bd9Sstevel@tonic-gate  */
227c478bd9Sstevel@tonic-gate /*
23*afd7fd7bSosaeed  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
247c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
257c478bd9Sstevel@tonic-gate  */
267c478bd9Sstevel@tonic-gate 
277c478bd9Sstevel@tonic-gate #ifndef _PCF8584_H
287c478bd9Sstevel@tonic-gate #define	_PCF8584_H
297c478bd9Sstevel@tonic-gate 
307c478bd9Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
317c478bd9Sstevel@tonic-gate 
327c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
337c478bd9Sstevel@tonic-gate extern "C" {
347c478bd9Sstevel@tonic-gate #endif
357c478bd9Sstevel@tonic-gate 
367c478bd9Sstevel@tonic-gate #include <sys/promif.h>
377c478bd9Sstevel@tonic-gate 
387c478bd9Sstevel@tonic-gate /*
397c478bd9Sstevel@tonic-gate  * S1 control
407c478bd9Sstevel@tonic-gate  */
417c478bd9Sstevel@tonic-gate #define	S1_ACK	0x01
427c478bd9Sstevel@tonic-gate #define	S1_STO	0x02
437c478bd9Sstevel@tonic-gate #define	S1_STA	0x04
447c478bd9Sstevel@tonic-gate #define	S1_ENI	0x08
457c478bd9Sstevel@tonic-gate #define	S1_ES2	0x10
467c478bd9Sstevel@tonic-gate #define	S1_ES1	0x20
477c478bd9Sstevel@tonic-gate #define	S1_ESO	0x40
487c478bd9Sstevel@tonic-gate 
497c478bd9Sstevel@tonic-gate /*
507c478bd9Sstevel@tonic-gate  * S1 status
517c478bd9Sstevel@tonic-gate  */
527c478bd9Sstevel@tonic-gate #define	S1_BBN	0x01
537c478bd9Sstevel@tonic-gate #define	S1_LAB	0x02
547c478bd9Sstevel@tonic-gate #define	S1_AAS	0x04
557c478bd9Sstevel@tonic-gate #define	S1_AD0	0x08
567c478bd9Sstevel@tonic-gate #define	S1_LRB	0x08
577c478bd9Sstevel@tonic-gate #define	S1_BER	0x10
587c478bd9Sstevel@tonic-gate #define	S1_STS	0x20
597c478bd9Sstevel@tonic-gate 
607c478bd9Sstevel@tonic-gate /*
617c478bd9Sstevel@tonic-gate  * S1 control/status
627c478bd9Sstevel@tonic-gate  */
637c478bd9Sstevel@tonic-gate 
647c478bd9Sstevel@tonic-gate #define	S1_PIN	0x80
657c478bd9Sstevel@tonic-gate 
667c478bd9Sstevel@tonic-gate /*
677c478bd9Sstevel@tonic-gate  * This has to be OR'ed in with the address for
687c478bd9Sstevel@tonic-gate  * I2C read transactions.
697c478bd9Sstevel@tonic-gate  */
707c478bd9Sstevel@tonic-gate #define	I2C_READ	0x01
717c478bd9Sstevel@tonic-gate 
727c478bd9Sstevel@tonic-gate /*
737c478bd9Sstevel@tonic-gate  * S0 initialization bytes
747c478bd9Sstevel@tonic-gate  */
757c478bd9Sstevel@tonic-gate 
767c478bd9Sstevel@tonic-gate #define	S0_OWN 0x55
777c478bd9Sstevel@tonic-gate #define	S0_CLK 0x1C		/* System clock = 12 MHz, SCL = 90 KHz) */
787c478bd9Sstevel@tonic-gate 
797c478bd9Sstevel@tonic-gate #define	PCF8584_INIT_WAIT 200000	/* 200 ms */
807c478bd9Sstevel@tonic-gate #define	DUMMY_ADDR 0x20
817c478bd9Sstevel@tonic-gate #define	DUMMY_DATA 0x00
827c478bd9Sstevel@tonic-gate 
837c478bd9Sstevel@tonic-gate #define	MONITOR_ADDRESS	0x0
847c478bd9Sstevel@tonic-gate 
857c478bd9Sstevel@tonic-gate #define	S1_START	(S1_PIN | S1_ESO | S1_STA | S1_ACK)
867c478bd9Sstevel@tonic-gate #define	S1_STOP		(S1_PIN | S1_ESO | S1_STO | S1_ACK)
877c478bd9Sstevel@tonic-gate #define	S1_START2	(S1_ESO | S1_STA | S1_ACK)
887c478bd9Sstevel@tonic-gate 
897c478bd9Sstevel@tonic-gate /*
907c478bd9Sstevel@tonic-gate  * printing levels
917c478bd9Sstevel@tonic-gate  */
927c478bd9Sstevel@tonic-gate #define	PRT_SELECT	0x01
937c478bd9Sstevel@tonic-gate #define	PRT_INTR	0x02
947c478bd9Sstevel@tonic-gate #define	PRT_INIT	0x04
957c478bd9Sstevel@tonic-gate #define	PRT_TRAN	0x08
967c478bd9Sstevel@tonic-gate #define	PRT_POLL	0x10
977c478bd9Sstevel@tonic-gate #define	PRT_BUFFONLY	0x100
987c478bd9Sstevel@tonic-gate #define	PRT_PROM	0x200
997c478bd9Sstevel@tonic-gate 
1007c478bd9Sstevel@tonic-gate /*
1017c478bd9Sstevel@tonic-gate  * states for the I2C state machine.
1027c478bd9Sstevel@tonic-gate  */
1037c478bd9Sstevel@tonic-gate enum tran_state {
1047c478bd9Sstevel@tonic-gate 	TRAN_STATE_NULL,
1057c478bd9Sstevel@tonic-gate 	TRAN_STATE_WR,
1067c478bd9Sstevel@tonic-gate 	TRAN_STATE_RD,
1077c478bd9Sstevel@tonic-gate 	TRAN_STATE_WR_RD,
1087c478bd9Sstevel@tonic-gate 	TRAN_STATE_START,
1097c478bd9Sstevel@tonic-gate 	TRAN_STATE_DUMMY_DATA,
1107c478bd9Sstevel@tonic-gate 	TRAN_STATE_DUMMY_RD
1117c478bd9Sstevel@tonic-gate };
1127c478bd9Sstevel@tonic-gate 
113*afd7fd7bSosaeed /*
114*afd7fd7bSosaeed  * different implementations of pcf8584
115*afd7fd7bSosaeed  */
116*afd7fd7bSosaeed enum impl_type {
117*afd7fd7bSosaeed 	GENERIC,
118*afd7fd7bSosaeed 	BBC,
119*afd7fd7bSosaeed 	PIC16F747
120*afd7fd7bSosaeed };
121*afd7fd7bSosaeed 
1227c478bd9Sstevel@tonic-gate typedef struct pcf8584_regs {
1237c478bd9Sstevel@tonic-gate 	uint8_t *pcf8584_regs_s0;
1247c478bd9Sstevel@tonic-gate 	uint8_t *pcf8584_regs_s1;
1257c478bd9Sstevel@tonic-gate } pcf8584_regs_t;
1267c478bd9Sstevel@tonic-gate 
1277c478bd9Sstevel@tonic-gate typedef struct pcf8584 {
1287c478bd9Sstevel@tonic-gate 	dev_info_t		*pcf8584_dip;
1297c478bd9Sstevel@tonic-gate 	int			pcf8584_attachflags;
1307c478bd9Sstevel@tonic-gate 	kcondvar_t		pcf8584_cv;
1317c478bd9Sstevel@tonic-gate 	kmutex_t		pcf8584_imutex;
1327c478bd9Sstevel@tonic-gate 	kcondvar_t		pcf8584_icv;
1337c478bd9Sstevel@tonic-gate 	ddi_iblock_cookie_t	pcf8584_icookie;
1347c478bd9Sstevel@tonic-gate 	int			pcf8584_mode;
1357c478bd9Sstevel@tonic-gate 	int			pcf8584_open;
1367c478bd9Sstevel@tonic-gate 	int			pcf8584_busy;
1377c478bd9Sstevel@tonic-gate 	int			pcf8584_bus;
1387c478bd9Sstevel@tonic-gate 	int			pcf8584_cur_status;
1397c478bd9Sstevel@tonic-gate 	dev_info_t		*pcf8584_nexus_dip;
1407c478bd9Sstevel@tonic-gate 	i2c_transfer_t		*pcf8584_cur_tran;
1417c478bd9Sstevel@tonic-gate 	dev_info_t		*pcf8584_cur_dip;
1427c478bd9Sstevel@tonic-gate 	pcf8584_regs_t		pcf8584_regs;
1437c478bd9Sstevel@tonic-gate 	ddi_acc_handle_t	pcf8584_rhandle;
1447c478bd9Sstevel@tonic-gate 	uint8_t			*pcf8584_b_reg;
1457c478bd9Sstevel@tonic-gate 	ddi_acc_handle_t	pcf8584_b_rhandle;
1467c478bd9Sstevel@tonic-gate 	enum tran_state		pcf8584_tran_state;
1477c478bd9Sstevel@tonic-gate 	char			pcf8584_name[12];
148*afd7fd7bSosaeed 	enum impl_type		pcf8584_impl_type;
149*afd7fd7bSosaeed 	uint32_t		pcf8584_impl_delay;
1507c478bd9Sstevel@tonic-gate } pcf8584_t;
1517c478bd9Sstevel@tonic-gate 
1527c478bd9Sstevel@tonic-gate /*
1537c478bd9Sstevel@tonic-gate  * i2c_parent_pvt contains info that is chip specific
1547c478bd9Sstevel@tonic-gate  * and is stored on the child's devinfo parent private data.
1557c478bd9Sstevel@tonic-gate  */
1567c478bd9Sstevel@tonic-gate typedef struct pcf8584_ppvt {
1577c478bd9Sstevel@tonic-gate 	int pcf8584_ppvt_bus; /* xcal's bbc implmentation multiplexes */
1587c478bd9Sstevel@tonic-gate 			    /* multiple I2C busses on a single set of */
1597c478bd9Sstevel@tonic-gate 			    /* registers.  this tells it what bus to */
1607c478bd9Sstevel@tonic-gate 			    /* use  */
1617c478bd9Sstevel@tonic-gate 	int pcf8584_ppvt_addr; /* address of I2C device */
1627c478bd9Sstevel@tonic-gate } pcf8584_ppvt_t;
1637c478bd9Sstevel@tonic-gate 
1647c478bd9Sstevel@tonic-gate #define	PCF8584_PIL			4
1657c478bd9Sstevel@tonic-gate #define	PCF8584_POLL_MODE		1
1667c478bd9Sstevel@tonic-gate #define	PCF8584_INTR_MODE		2
1677c478bd9Sstevel@tonic-gate #define	PCF8584_INITIAL_SOFT_SPACE	4
168*afd7fd7bSosaeed #define	PCF8584_GENERIC_DELAY		0
169*afd7fd7bSosaeed #define	PCF8584_PIC16F747_DELAY		10
1707c478bd9Sstevel@tonic-gate 
1717c478bd9Sstevel@tonic-gate /*
1727c478bd9Sstevel@tonic-gate  * generic interrupt return values
1737c478bd9Sstevel@tonic-gate  */
1747c478bd9Sstevel@tonic-gate #define	I2C_COMPLETE	2
1757c478bd9Sstevel@tonic-gate #define	I2C_PENDING	3
1767c478bd9Sstevel@tonic-gate 
1777c478bd9Sstevel@tonic-gate /*
1787c478bd9Sstevel@tonic-gate  * Transfer status values
1797c478bd9Sstevel@tonic-gate  */
1807c478bd9Sstevel@tonic-gate #define	PCF8584_TRANSFER_NEW	1
1817c478bd9Sstevel@tonic-gate #define	PCF8584_TRANSFER_ON	2
1827c478bd9Sstevel@tonic-gate #define	PCF8584_TRANSFER_OVER	3
1837c478bd9Sstevel@tonic-gate 
1847c478bd9Sstevel@tonic-gate /*
1857c478bd9Sstevel@tonic-gate  * Attach flags
1867c478bd9Sstevel@tonic-gate  */
1877c478bd9Sstevel@tonic-gate #define	ADD_INTR	0x01
1887c478bd9Sstevel@tonic-gate #define	ADD_PVT		0x02
1897c478bd9Sstevel@tonic-gate #define	SETUP_REGS	0x04
1907c478bd9Sstevel@tonic-gate #define	NEXUS_REGISTER	0x08
1917c478bd9Sstevel@tonic-gate #define	PROP_CREATE	0x10
1927c478bd9Sstevel@tonic-gate #define	IMUTEX		0x20
1937c478bd9Sstevel@tonic-gate #define	ALLOCATE_PVT	0x40
1947c478bd9Sstevel@tonic-gate #define	MINOR_NODE	0x80
1957c478bd9Sstevel@tonic-gate 
1967c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
1977c478bd9Sstevel@tonic-gate }
1987c478bd9Sstevel@tonic-gate #endif
1997c478bd9Sstevel@tonic-gate 
2007c478bd9Sstevel@tonic-gate #endif /* _PCF8584_H */
201