xref: /titanic_52/usr/src/uts/sun4u/sys/envctrl_gen.h (revision ba4e3c84e6b9390bbf7df80b5f1d11dec34cc525)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 1998 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_ENVCTRL_GEN_H
28 #define	_SYS_ENVCTRL_GEN_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * envctrl_gen.h
38  *
39  * This header file holds the environmental control definitions that
40  * are common to all workgroup server platforms. Typically, all IOCTLs,
41  * kstat structures, and the generic constants are defined here.
42  * The platform specific definitions belong in header files which contain
43  * the platform name as part of the file name eg. envctrl_ue250.h for the
44  * UltraEnterprise-250 platform.
45  */
46 
47 #define	ENVCTRL_NORMAL_MODE 0x01
48 #define	ENVCTRL_DIAG_MODE 0x02
49 #define	ENVCTRL_CHAR_ZERO 0x00
50 #define	ENVCTRL_PS_550	550
51 #define	ENVCTRL_PS_650	650
52 #define	ENVCTRL_INIT_TEMPR	20
53 #define	ENVCTRL_ULTRA1CPU_STRING	"SUNW,UltraSPARC"
54 #define	ENVCTRL_ULTRA2CPU_STRING	"SUNW,UltraSPARC-II"
55 
56 #define	ENVCTRL_MAX_CPUS	8
57 #define	ENVCTRL_CPU0		0
58 #define	ENVCTRL_CPU1		1
59 #define	ENVCTRL_CPU2		2
60 #define	ENVCTRL_CPU3		3
61 #define	ENVCTRL_CPU4		4
62 #define	ENVCTRL_CPU5		5
63 #define	ENVCTRL_CPU6		6
64 #define	ENVCTRL_CPU7		7
65 
66 /*
67  * I2C Sensor Types
68  */
69 
70 #define	ENVCTRL_PCD8584		0x00	/* Bus Controller Master */
71 #define	ENVCTRL_PCF8591		0x01	/* Temp Sensor 8bit A/D, D/A */
72 #define	ENVCTRL_PCF8574		0x02	/* PS, FAN, LED, Fail and Control */
73 #define	ENVCTRL_TDA8444T	0x03	/* Fan Speed Control, 8 bit D/A */
74 #define	ENVCTRL_PCF8574A	0x04	/* 8574A chip */
75 #define	ENVCTRL_PCF8583		0x05	/* PCF8583 clock chip */
76 #define	ENVCTRL_LM75		0x06	/* LM75 chip */
77 
78 /*
79  * I2C device address offsets
80  */
81 #define	ENVCTRL_DEV0		0x0
82 #define	ENVCTRL_DEV1		0x2
83 #define	ENVCTRL_DEV2		0x4
84 #define	ENVCTRL_DEV3		0x6
85 #define	ENVCTRL_DEV4		0x8
86 #define	ENVCTRL_DEV5		0xA
87 #define	ENVCTRL_DEV6		0xC
88 #define	ENVCTRL_DEV7		0xE
89 
90 /*
91  * I2C ports
92  */
93 #define	ENVCTRL_PORT0		0x00
94 #define	ENVCTRL_PORT1		0x01
95 #define	ENVCTRL_PORT2		0x02
96 #define	ENVCTRL_PORT3		0x03
97 #define	ENVCTRL_PORT4		0x04
98 #define	ENVCTRL_PORT5		0x05
99 #define	ENVCTRL_PORT6		0x06
100 #define	ENVCTRL_PORT7		0x07
101 
102 /*
103  * Max number of a particular
104  * device on one bus.
105  */
106 #define	ENVCTRL_MAX_DEVS	0x10
107 #define	ENVCTRL_I2C_NODEV	0xFF
108 #define	ENVCTRL_INSTANCE_0	0x00
109 
110 /* Disk Fault bit fields */
111 #define	ENVCTRL_DISK_0 0x01
112 #define	ENVCTRL_DISK_1 0x02
113 #define	ENVCTRL_DISK_2 0x04
114 #define	ENVCTRL_DISK_3 0x08
115 #define	ENVCTRL_DISK_4 0x10
116 #define	ENVCTRL_DISK_5 0x20
117 #define	ENVCTRL_DISK_6 0x40
118 #define	ENVCTRL_DISK_7 0x80
119 
120 #define	ENVCTRL_4SLOT_BACKPLANE	0x0F
121 #define	ENVCTRL_8SLOT_BACKPLANE	0xFF
122 
123 #define	ENVCTRL_DISK4LED_ALLOFF	0xF0
124 #define	ENVCTRL_DISK6LED_ALLOFF	0xFC
125 #define	ENVCTRL_DISK8LED_ALLOFF	0xFF
126 
127 #define	ENVCTRL_MAXSTRLEN	256
128 
129 /* Kstat Structures and defines */
130 #define	ENVCTRL_FAN_TYPE_CPU	0x00
131 #define	ENVCTRL_FAN_TYPE_PS	0x01
132 #define	ENVCTRL_FAN_TYPE_AFB	0x02
133 #define	ENVCTRL_FAN_TYPE_UE250	0x03
134 
135 #define	ENVCTRL_MODULE_NAME		"envctrl"
136 #define	ENVCTRL_KSTAT_NUMPS		"envctrl_numps"
137 #define	ENVCTRL_KSTAT_PSNAME		"envctrl_pwrsupply"
138 #define	ENVCTRL_KSTAT_PSNAME2		"envctrl_pwrsupply2"
139 #define	ENVCTRL_KSTAT_NUMFANS		"envctrl_numfans"
140 #define	ENVCTRL_KSTAT_FANSTAT		"envctrl_fanstat"
141 #define	ENVCTRL_KSTAT_NUMENCLS		"envctrl_numencls"
142 #define	ENVCTRL_KSTAT_ENCL		"envctrl_enclosure"
143 #define	ENVCTRL_KSTAT_TEMPERATURE	"envctrl_temp"
144 #define	ENVCTRL_KSTAT_DISK		"envctrl_disk"
145 
146 /*
147  * Kstat structure definitions (PSARC 1996/159)
148  */
149 typedef struct envctrl_ps {
150 	int instance;			/* instance of this type */
151 	ushort_t ps_tempr;		/* temperature */
152 	int ps_rating;			/* type in watts */
153 	boolean_t ps_ok;		/* normal state or not. */
154 	boolean_t curr_share_ok;	/* current share imbalance */
155 	boolean_t limit_ok;		/* overlimit warning */
156 } envctrl_ps_t;
157 
158 typedef struct envctrl_fan {
159 	int instance;			/* instance of this type */
160 	int type;			/* CPU, PS or AMBIENT fan */
161 	boolean_t fans_ok;		/* are the fans okay */
162 	int fanflt_num;			/* if not okay, which fan faulted */
163 	uint_t fanspeed;			/* chip to set speed of fans */
164 } envctrl_fan_t;
165 
166 typedef struct envctrl_encl {
167 	int instance;
168 	int type;
169 	uint_t value;
170 } envctrl_encl_t;
171 
172 /*
173  * Kstat structure defintions (PSARC 1997/245)
174  */
175 typedef struct envctrl_chip {
176 	int type;			/* chip type */
177 	uchar_t chip_num;		/* chip num */
178 	uchar_t index;			/* chip index */
179 	uchar_t val;			/* chip reading */
180 } envctrl_chip_t;
181 
182 typedef struct envctrl_ps2 {
183 	ushort_t ps_tempr;		/* temperature */
184 	int ps_rating;			/* type in watts */
185 	boolean_t ps_ok;		/* normal state or not */
186 	boolean_t curr_share_ok;	/* current share imbalance */
187 	boolean_t limit_ok;		/* overlimit warning */
188 	int type;			/* power supply type */
189 	int slot;			/* power supply slot occupied */
190 } envctrl_ps2_t;
191 
192 typedef struct envctrl_temp {
193 	char label[ENVCTRL_MAXSTRLEN];	/* indicates temp. sensor location */
194 	int type;			/* Temperature sensor type */
195 	uint_t value;			/* temperature value */
196 	uint_t min;			/* minimum tolerable temperature */
197 	uint_t warning_threshold;	/* warning threshold */
198 	uint_t shutdown_threshold;	/* shutdown threshold */
199 } envctrl_temp_t;
200 
201 typedef struct envctrl_disk {
202 	int slot;			/* slot number of disk */
203 	boolean_t disk_ok;		/* disk fault LED off or on */
204 } envctrl_disk_t;
205 
206 #define	ENVCTRL_PANEL_LEDS_PR		"panel-leds-present"
207 #define	ENVCTRL_PANEL_LEDS_STA		"panel-leds-state"
208 #define	ENVCTRL_DISK_LEDS_PR		"disk-leds-present"
209 #define	ENVCTRL_DISK_LEDS_STA		"disk-leds-state"
210 #define	ENVCTRL_LED_BLINK		"activity-led-blink?"
211 
212 /*
213  * IOCTL defines (PSARC 1996/159)
214  */
215 #define	ENVCTRL_IOC_RESETTMPR	(int)(_IOW('p', 76, uchar_t))
216 #define	ENVCTRL_IOC_SETMODE	(int)(_IOW('p', 77, uchar_t))
217 #define	ENVCTRL_IOC_SETTEMP	(int)(_IOW('p', 79, uchar_t))
218 #define	ENVCTRL_IOC_SETFAN (int)(_IOW('p', 80, struct envctrl_tda8444t_chip))
219 #define	ENVCTRL_IOC_SETWDT	(int)(_IOW('p', 81, uchar_t))
220 #define	ENVCTRL_IOC_GETFAN (int)(_IOR('p', 81, struct envctrl_tda8444t_chip))
221 #define	ENVCTRL_IOC_GETTEMP (int)(_IOR('p', 82, struct envctrl_pcf8591_chip))
222 #define	ENVCTRL_IOC_GETFANFAIL (int)(_IOR('p', 83, struct envctrl_pcf8574_chip))
223 #define	ENVCTRL_IOC_SETFSP	(int)(_IOW('p', 84, uchar_t))
224 #define	ENVCTRL_IOC_SETDSKLED (int)(_IOW('p', 85, struct envctrl_pcf8574_chip))
225 #define	ENVCTRL_IOC_GETDSKLED (int)(_IOR('p', 86, struct envctrl_pcf8574_chip))
226 
227 /*
228  * IOCTL defines (PSARC 1997/245)
229  */
230 #define	ENVCTRL_IOC_GETMODE	(int)(_IOR('p', 87, uchar_t))
231 #define	ENVCTRL_IOC_SETTEMP2	(int)(_IOW('p', 88, struct envctrl_chip))
232 #define	ENVCTRL_IOC_SETFAN2 	(int)(_IOW('p', 89, struct envctrl_chip))
233 #define	ENVCTRL_IOC_GETFAN2 	(int)(_IOR('p', 90, struct envctrl_chip))
234 #define	ENVCTRL_IOC_GETTEMP2 	(int)(_IOR('p', 91, struct envctrl_chip))
235 #define	ENVCTRL_IOC_SETFSP2	(int)(_IOW('p', 92, struct envctrl_chip))
236 #define	ENVCTRL_IOC_GETFSP2	(int)(_IOR('p', 93, struct envctrl_chip))
237 #define	ENVCTRL_IOC_SETDSKLED2 	(int)(_IOW('p', 94, struct envctrl_chip))
238 #define	ENVCTRL_IOC_GETDSKLED2 	(int)(_IOR('p', 95, struct envctrl_chip))
239 #define	ENVCTRL_IOC_SETRAW 	(int)(_IOW('p', 96, struct envctrl_chip))
240 #define	ENVCTRL_IOC_GETRAW 	(int)(_IOR('p', 97, struct envctrl_chip))
241 
242 #ifdef	__cplusplus
243 }
244 #endif
245 
246 #endif	/* _SYS_ENVCTRL_GEN_H */
247