1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2001 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_SGHSC_H 28 #define _SYS_SGHSC_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Serengeti CompactPCI Hot Swap Controller Driver header file. This file is 38 * structured in a following way: common, sghsc data (defines and structures) 39 * and mailbox related data (defines and structures). 40 */ 41 42 #include <sys/hotplug/hpctrl.h> 43 #include <sys/hotplug/hpcsvc.h> 44 #include <sys/sgsbbc_mailbox.h> 45 46 /* 47 * sghsc node path with insert placeholders 48 */ 49 #define SGHSC_PATH "/ssm@%x,0/pci@%x,%x00000" 50 51 /* 52 * Mutex short hands 53 */ 54 #define SGHSC_MUTEX(sghsc) \ 55 (&sghsc->sghsc_mutex) 56 #define SGHSC_MUTEX_OWNED(sghsc) \ 57 mutex_owned(SGHSC_MUTEX(sghsc)) 58 #define SGHSC_MUTEX_ENTER(sghsc) \ 59 mutex_enter(SGHSC_MUTEX(sghsc)) 60 #define SGHSC_MUTEX_EXIT(sghsc) \ 61 mutex_exit(SGHSC_MUTEX(sghsc)) 62 63 #define SGHSC_SLOT_MUTEX(sghsc, slot_num) \ 64 (&sghsc->sghsc_slot_table[slot_num]->slot_mutex) 65 #define SGHSC_SLOT_MUTEX_OWNED(sghsc, slot_num) \ 66 mutex_owned(SGHSC_SLOT_MUTEX(sghsc, slot_num)); 67 #define SGHSC_SLOT_MUTEX_ENTER(sghsc, slot_num) \ 68 mutex_enter(SGHSC_SLOT_MUTEX(sghsc, slot_num)); 69 #define SGHSC_SLOT_MUTEX_EXIT(sghsc, slot_num) \ 70 mutex_exit(SGHSC_SLOT_MUTEX(sghsc, slot_num)); 71 72 /* 73 * Misc definitions 74 */ 75 #define SGHSC_ALL_SLOTS_ENABLE 0x3F 76 #define SGHSC_SLOT_ENABLE 0x01 77 #define SGHSC_ALL_SLOTS_DISABLE 0x02 78 #define SGHSC_SLOT_DISABLE 0x03 79 #define SGHSC_ALL_LEDS_ENABLE 0x3F3F 80 #define SGHSC_LED_ENABLE 0x04 81 #define SGHSC_ALL_LEDS_DISABLE 0x05 82 #define SGHSC_LED_DISABLE 0x06 83 #define SGHSC_LED_BLINKING 0x07 84 #define SGHSC_SLOT_ISOLATE 0x08 85 #define SGHSC_SLOT_POWER 0x09 86 #define SGHSC_LED_ENABLE_MASK 0x0000FFFF 87 #define SGHSC_SAFARI_ID_EVEN 0x3fe 88 89 90 /* Individual events definitions */ 91 #define SGHSC_EVENT_CARD_INSERT 0x1 92 #define SGHSC_EVENT_CARD_REMOVE 0x2 93 #define SGHSC_EVENT_LEVER_ACTION 0x3 94 #define SGHSC_EVENT_HEALTHY_LOST 0x4 95 #define SGHSC_EVENT_POWER_ON 0x5 96 #define SGHSC_EVENT_POWER_OFF 0x6 97 98 /* Slot flags */ 99 #define SGHSC_SLOT_AUTO_CFG_EN 0x1 100 #define SGHSC_SLOT_HEALTHY_LOST 0x2 101 102 /* LED definitions */ 103 #define SGHSC_POWER_LED 0x10 104 #define SGHSC_FAULT_LED 0x20 105 #define SGHSC_ACTIVE_LED 0x40 106 #define SGHSC_ATTN_LED 0x80 107 108 /* Ring buffer size, has to be power of 2 */ 109 #define SGHSC_RING_BUFFER_SZ 0x10 110 111 /* 112 * Per Hot Swappable Slot info 113 */ 114 typedef struct sghsc_slot { 115 116 /* 117 * Mutex for each slots for state change 118 */ 119 kmutex_t slot_mutex; 120 121 /* 122 * pathname of bus node 123 */ 124 char nexus_path[MAXPATHLEN]; 125 126 /* 127 * property, status, cap for each slot 128 */ 129 hpc_slot_info_t slot_info; 130 hpc_slot_state_t slot_status; 131 uint32_t slot_capb; 132 133 /* 134 * PCI Bus number for each slot 135 */ 136 uint8_t pci_device_num; 137 138 /* 139 * dynamically allocated hpc_slot_ops_t 140 * and register slot handle 141 */ 142 hpc_slot_ops_t *slot_ops; 143 hpc_slot_t handle; 144 145 /* 146 * Leds for each slot are not cached 147 */ 148 149 /* 150 * slot state, flags, board type 151 */ 152 uint32_t flags; 153 uint32_t state; 154 uint32_t board_type; 155 156 } sghsc_slot_t; 157 158 /* 159 * Per Serenget CompactPCI HSC instance soft state structure 160 */ 161 typedef struct sghsc { 162 dev_info_t *sghsc_dip; 163 kmutex_t sghsc_mutex; 164 uint32_t sghsc_instance; 165 uint32_t sghsc_board; 166 uint32_t sghsc_node_id; 167 uint32_t sghsc_portid; 168 uint32_t sghsc_num_slots; 169 uint32_t sghsc_valid; 170 sghsc_slot_t *sghsc_slot_table; 171 } sghsc_t; 172 173 /* 174 * Slot map descriptor (slot to bus segment mapping) 175 */ 176 typedef struct sdesc { 177 uint32_t agent_delta; 178 uint32_t off; 179 uint32_t pcidev; 180 uint32_t slot_type; 181 } sdesc_t; 182 183 /* 184 * Mailbox related data and structures 185 */ 186 #define CPCI_GET_SLOT_STATUS 0x5000 187 #define CPCI_SET_SLOT_FAULT_LED 0x5001 188 #define CPCI_SET_SLOT_STATUS 0x5002 189 #define CPCI_SET_SLOT_POWER 0x5003 190 #define CPCI_GET_NUM_SLOTS 0x5004 191 #define CPCI_SET_ENUM_CLEARED 0x5005 192 #define CPCI_BOARD_TYPE 0x5006 193 194 /* 195 * Bit definition for Boat Type 196 */ 197 #define NO_BOARD_TYPE 0 198 #define PCI_BOARD 1 199 #define CPCI_BOARD 2 200 #define SP_CPCI_BOARD 3 201 #define WCI_CPCI_BOARD 4 202 #define WCI_SP_CPCI_BOARD 5 203 204 /* 205 * Shifts definition for CPCI_GET_SLOT_STATUS 206 */ 207 #define ONE_BIT 1 208 #define TWO_BITS 3 209 #define THREE_BITS 7 210 #define CPCI_STAT_POWER_ON_SHIFT 0 211 #define CPCI_STAT_LED_POWER_SHIFT 1 212 #define CPCI_STAT_LED_FAULT_SHIFT 2 213 #define CPCI_STAT_LED_HP_SHIFT 3 214 #define CPCI_STAT_SLOT_EMPTY_SHIFT 4 215 #define CPCI_STAT_HOT_SWAP_STATUS_SHIFT 5 216 #define CPCI_STAT_HEALTHY_SHIFT 12 /* One bit */ 217 #define CPCI_STAT_RESET_SHIFT 13 /* One bit */ 218 219 /* 220 * Bit definition for CPCI_SET_SLOT_STATUS 221 */ 222 #define CPCI_SET_STATUS_SLOT_RESET 0x00001 223 #define CPCI_SET_STATUS_SLOT_READY 0x00000 224 /* 225 * Bit definition for CPCI_SET_SLOT_STATUS_FAULT_LED 226 */ 227 #define CPCI_SET_FAULT_LED_OFF 0x00000 228 #define CPCI_SET_FAULT_LED_ON 0x00001 229 #define CPCI_SET_FAULT_LED_KEEP 0x00002 230 #define CPCI_SET_FAULT_LED_TOGGLE 0x00003 231 232 /* 233 * Bit definition for CPCI_SET_SLOT_POWER 234 */ 235 #define CPCI_POWER_OFF 0x0 236 #define CPCI_POWER_ON 0x1 237 238 /* 239 * Mailbox timeout 240 */ 241 #define SGHSC_MBX_TIMEOUT 600 242 243 /* 244 * cPCI command codes (internal) 245 */ 246 #define _SGHSC_CODE ('N' << 16) 247 248 #define SGHSC_GET_SLOT_STATUS (_SGHSC_CODE | 0x14) 249 #define SGHSC_SET_SLOT_STATUS_RESET (_SGHSC_CODE | 0x15) 250 #define SGHSC_SET_SLOT_STATUS_READY (_SGHSC_CODE | 0x16) 251 #define SGHSC_SET_SLOT_FAULT_LED_ON (_SGHSC_CODE | 0x17) 252 #define SGHSC_SET_SLOT_FAULT_LED_OFF (_SGHSC_CODE | 0x18) 253 #define SGHSC_SET_SLOT_FAULT_LED_KEEP (_SGHSC_CODE | 0x19) 254 #define SGHSC_SET_SLOT_FAULT_LED_TOGGLE (_SGHSC_CODE | 0x1a) 255 #define SGHSC_SET_SLOT_POWER_OFF (_SGHSC_CODE | 0x1b) 256 #define SGHSC_SET_SLOT_POWER_ON (_SGHSC_CODE | 0x1c) 257 #define SGHSC_GET_NUM_SLOTS (_SGHSC_CODE | 0x1d) 258 #define SGHSC_SET_ENUM_CLEARED (_SGHSC_CODE | 0x1e) 259 #define SGHSC_GET_CPCI_BOARD_TYPE (_SGHSC_CODE | 0x1f) 260 261 typedef struct { 262 uint32_t cmd_id; 263 uint32_t node_id; 264 uint32_t board; 265 uint32_t slot; 266 uint32_t info; 267 } bitcmd_info_t; 268 269 typedef struct { 270 uint32_t cmd_id; 271 uint32_t result; 272 } bitcmd_resp_t; 273 274 typedef enum { SGHSC_RB_EMPTY, SGHSC_RB_FLOAT, 275 SGHSC_RB_FULL } sghsc_rb_state_t; 276 277 typedef struct sghsc_event { 278 int type; 279 int node_id; 280 int board; 281 int slot; 282 int info; 283 } sghsc_event_t; 284 285 typedef struct sghsc_rb_head { 286 sghsc_event_t *buf; 287 int put_idx; 288 int get_idx; 289 int size; 290 sghsc_rb_state_t state; 291 } sghsc_rb_head_t; 292 293 #ifdef __cplusplus 294 } 295 #endif 296 297 #endif /* _SYS_SGHSC_H */ 298