xref: /titanic_52/usr/src/uts/sun4u/os/cpc_subr.c (revision 7fd791373689a6af05e27efec3b1ab556e02aa23)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
23  */
24 
25 /*
26  * sun4u common CPC subroutines.
27  */
28 
29 #include <sys/types.h>
30 #include <sys/time.h>
31 #include <sys/atomic.h>
32 #include <sys/thread.h>
33 #include <sys/regset.h>
34 #include <sys/archsystm.h>
35 #include <sys/machsystm.h>
36 #include <sys/cpc_impl.h>
37 #include <sys/cpc_ultra.h>
38 #include <sys/sunddi.h>
39 #include <sys/intr.h>
40 #include <sys/ivintr.h>
41 #include <sys/x_call.h>
42 #include <sys/cpuvar.h>
43 #include <sys/machcpuvar.h>
44 #include <sys/cpc_pcbe.h>
45 #include <sys/modctl.h>
46 #include <sys/sdt.h>
47 #include <sys/kcpc.h>
48 
49 uint64_t	cpc_level15_inum = 0;	/* used in interrupt.s */
50 int		cpc_has_overflow_intr;	/* set in cheetah.c */
51 
52 extern kcpc_ctx_t *kcpc_overflow_intr(caddr_t arg, uint64_t bitmap);
53 extern int kcpc_counts_include_idle;
54 
55 /*
56  * Called on the boot CPU during startup.
57  */
58 void
59 kcpc_hw_init(void)
60 {
61 	if ((cpc_has_overflow_intr) && (cpc_level15_inum == 0)) {
62 		cpc_level15_inum = add_softintr(PIL_15,
63 		    kcpc_hw_overflow_intr, NULL, SOFTINT_MT);
64 	}
65 
66 	/*
67 	 * Make sure the boot CPU gets set up.
68 	 */
69 	kcpc_hw_startup_cpu(CPU->cpu_flags);
70 }
71 
72 /*
73  * Prepare for CPC interrupts and install an idle thread CPC context.
74  */
75 void
76 kcpc_hw_startup_cpu(ushort_t cpflags)
77 {
78 	cpu_t		*cp = CPU;
79 	kthread_t	*t = cp->cpu_idle_thread;
80 
81 	ASSERT(t->t_bound_cpu == cp);
82 
83 	if (cpc_has_overflow_intr && (cpflags & CPU_FROZEN) == 0) {
84 		int pstate_save = disable_vec_intr();
85 
86 		ASSERT(cpc_level15_inum != 0);
87 
88 		intr_enqueue_req(PIL_15, cpc_level15_inum);
89 		enable_vec_intr(pstate_save);
90 	}
91 
92 	mutex_init(&cp->cpu_cpc_ctxlock, "cpu_cpc_ctxlock", MUTEX_DEFAULT, 0);
93 
94 	if (kcpc_counts_include_idle)
95 		return;
96 
97 	installctx(t, cp, kcpc_idle_save, kcpc_idle_restore, NULL, NULL,
98 	    NULL, NULL);
99 }
100 
101 /*
102  * Examine the processor and load an appropriate PCBE.
103  */
104 int
105 kcpc_hw_load_pcbe(void)
106 {
107 	uint64_t	ver = ultra_getver();
108 
109 	return (kcpc_pcbe_tryload(NULL, ULTRA_VER_MANUF(ver),
110 	    ULTRA_VER_IMPL(ver), ULTRA_VER_MASK(ver)));
111 }
112 
113 /*ARGSUSED*/
114 int
115 kcpc_hw_cpu_hook(processorid_t cpuid, ulong_t *kcpc_cpumap)
116 {
117 	return (0);
118 }
119 
120 int
121 kcpc_hw_lwp_hook(void)
122 {
123 	return (0);
124 }
125