1*7c478bd9Sstevel@tonic-gate# 2*7c478bd9Sstevel@tonic-gate# CDDL HEADER START 3*7c478bd9Sstevel@tonic-gate# 4*7c478bd9Sstevel@tonic-gate# The contents of this file are subject to the terms of the 5*7c478bd9Sstevel@tonic-gate# Common Development and Distribution License, Version 1.0 only 6*7c478bd9Sstevel@tonic-gate# (the "License"). You may not use this file except in compliance 7*7c478bd9Sstevel@tonic-gate# with the License. 8*7c478bd9Sstevel@tonic-gate# 9*7c478bd9Sstevel@tonic-gate# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*7c478bd9Sstevel@tonic-gate# or http://www.opensolaris.org/os/licensing. 11*7c478bd9Sstevel@tonic-gate# See the License for the specific language governing permissions 12*7c478bd9Sstevel@tonic-gate# and limitations under the License. 13*7c478bd9Sstevel@tonic-gate# 14*7c478bd9Sstevel@tonic-gate# When distributing Covered Code, include this CDDL HEADER in each 15*7c478bd9Sstevel@tonic-gate# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*7c478bd9Sstevel@tonic-gate# If applicable, add the following below this CDDL HEADER, with the 17*7c478bd9Sstevel@tonic-gate# fields enclosed by brackets "[]" replaced with your own identifying 18*7c478bd9Sstevel@tonic-gate# information: Portions Copyright [yyyy] [name of copyright owner] 19*7c478bd9Sstevel@tonic-gate# 20*7c478bd9Sstevel@tonic-gate# CDDL HEADER END 21*7c478bd9Sstevel@tonic-gate# 22*7c478bd9Sstevel@tonic-gate# 23*7c478bd9Sstevel@tonic-gate# Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*7c478bd9Sstevel@tonic-gate# Use is subject to license terms. 25*7c478bd9Sstevel@tonic-gate# 26*7c478bd9Sstevel@tonic-gate#pragma ident "%Z%%M% %I% %E% SMI" 27*7c478bd9Sstevel@tonic-gate# 28*7c478bd9Sstevel@tonic-gate 29*7c478bd9Sstevel@tonic-gatename="ppm" parent="pseudo" instance=0; 30*7c478bd9Sstevel@tonic-gate 31*7c478bd9Sstevel@tonic-gate# 32*7c478bd9Sstevel@tonic-gate# ppm configuration format 33*7c478bd9Sstevel@tonic-gate# 34*7c478bd9Sstevel@tonic-gate# "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights 35*7c478bd9Sstevel@tonic-gate# the nature of the domain; 36*7c478bd9Sstevel@tonic-gate# 37*7c478bd9Sstevel@tonic-gate# "domain_xxx-model" - PM model: CPU, PCI, PCI_PROP, FET or LED. 38*7c478bd9Sstevel@tonic-gate# 39*7c478bd9Sstevel@tonic-gate# "domain_xxx-propname" - a property name that is exported by device in 40*7c478bd9Sstevel@tonic-gate# a domain. Currently, it is used by PCI_PROP model to identify devices 41*7c478bd9Sstevel@tonic-gate# that are to have their clocks stopped when all power-manageable devices 42*7c478bd9Sstevel@tonic-gate# in the domain are at D3 power level. 43*7c478bd9Sstevel@tonic-gate# 44*7c478bd9Sstevel@tonic-gate# "domain-xxx-devices" - a list of prom path match patterns to match devices 45*7c478bd9Sstevel@tonic-gate# that fall into "domain_xxx", where wildcard '*' is allowed by observing 46*7c478bd9Sstevel@tonic-gate# the following expectations: 47*7c478bd9Sstevel@tonic-gate# . a single wildcard with exact match up to (but exclude) the wildcard 48*7c478bd9Sstevel@tonic-gate# which then terminates the match pattern; 49*7c478bd9Sstevel@tonic-gate# . a single wildcard that does not terminate a match pattern must 50*7c478bd9Sstevel@tonic-gate# match driver name (followed by '@'); 51*7c478bd9Sstevel@tonic-gate# . with two wildcard occurences, the first is to match driver name, 52*7c478bd9Sstevel@tonic-gate# the second function id, as well as the last character of the match 53*7c478bd9Sstevel@tonic-gate# pattern. 54*7c478bd9Sstevel@tonic-gate# 55*7c478bd9Sstevel@tonic-gate# "domain-xxx-ctrl" - blank space separated definitions in the form of 56*7c478bd9Sstevel@tonic-gate# keyword=definition [keyword=definition...] 57*7c478bd9Sstevel@tonic-gate# The keywords are as follows, where 'method' must come before mask as it 58*7c478bd9Sstevel@tonic-gate# tells how to store 'mask' and 'val'. Missing 'val' defaults to 0. 59*7c478bd9Sstevel@tonic-gate# 60*7c478bd9Sstevel@tonic-gate# which keywords apply depends on cmd. There are two sets as shown below. 61*7c478bd9Sstevel@tonic-gate# Here is the first: 62*7c478bd9Sstevel@tonic-gate# cmd=[CPU_GO | LED_ON | LED_OFF | FET_ON | FET_OFF | CLK_ON | CLK_OFF] 63*7c478bd9Sstevel@tonic-gate# path=<prompath> - control device's prom pathname (includes minor) 64*7c478bd9Sstevel@tonic-gate# method=[KIO|I2CKIO] This selects a method which may be 65*7c478bd9Sstevel@tonic-gate# an ioctl that sets a single value or an i2c ioctl that 66*7c478bd9Sstevel@tonic-gate# takes a value and a mask to access gpio register 67*7c478bd9Sstevel@tonic-gate# iord=<integer> - value of ioctl command for reading 68*7c478bd9Sstevel@tonic-gate# iowr=<integer> - value of ioctl command for writing 69*7c478bd9Sstevel@tonic-gate# val=<integer> - a single integer value, generally the value to which 70*7c478bd9Sstevel@tonic-gate# the relevant bits of a register will be set 71*7c478bd9Sstevel@tonic-gate# mask=<integer> - which bits of val are relevant (if method is I2CKIO) 72*7c478bd9Sstevel@tonic-gate# 73*7c478bd9Sstevel@tonic-gate# Here is the second: 74*7c478bd9Sstevel@tonic-gate# cmd=[CPU_NEXT | PRE_CHNG | POST_CHNG] 75*7c478bd9Sstevel@tonic-gate# path=<prompath> - control device's prom pathname, including minor 76*7c478bd9Sstevel@tonic-gate# method=[CPUSPEEDKIO | VCORE] This selects a method that uses 77*7c478bd9Sstevel@tonic-gate# information like cpu speed index, value for 78*7c478bd9Sstevel@tonic-gate# adjust cpu core voltage, delays, etc. 79*7c478bd9Sstevel@tonic-gate# iowr=<integer> - value of ioctl write command 80*7c478bd9Sstevel@tonic-gate# speeds=<integer> - indicates the number of cpu speeds that are 81*7c478bd9Sstevel@tonic-gate# supported 82*7c478bd9Sstevel@tonic-gate 83*7c478bd9Sstevel@tonic-gateppm-domains="domain_cpu", "domain_scsifet1", "domain_scsifet2", 84*7c478bd9Sstevel@tonic-gate "domain_idefet", "domain_led", "domain_pcislot_0", "domain_pcislot_1", 85*7c478bd9Sstevel@tonic-gate "domain_pcislot_2", "domain_pcislot_3", "domain_pcislot_4", 86*7c478bd9Sstevel@tonic-gate "domain_pcislot_5"; 87*7c478bd9Sstevel@tonic-gate 88*7c478bd9Sstevel@tonic-gate 89*7c478bd9Sstevel@tonic-gate# 90*7c478bd9Sstevel@tonic-gate# 0x6a02 is JBPPMIOC_NEXT (('j' << 8) | 2) 91*7c478bd9Sstevel@tonic-gate# 0x6a03 is JBPPMIOC_GO (('j' << 8) | 3) 92*7c478bd9Sstevel@tonic-gate# 0x6c02 is M1535PPMIOC_SET (('l' << 8) | 2) 93*7c478bd9Sstevel@tonic-gate# 'delay' unit is us(microsecond) 94*7c478bd9Sstevel@tonic-gate# 95*7c478bd9Sstevel@tonic-gatedomain_cpu-devices="/SUNW,UltraSPARC-IIIi@*"; 96*7c478bd9Sstevel@tonic-gatedomain_cpu-model="CPU"; 97*7c478bd9Sstevel@tonic-gatedomain_cpu-control= 98*7c478bd9Sstevel@tonic-gate "cmd=CPU_NEXT path=/ppm@1e,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3", 99*7c478bd9Sstevel@tonic-gate "cmd=CPU_NEXT path=/ppm@1c,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3", 100*7c478bd9Sstevel@tonic-gate "cmd=PRE_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=4 delay=150000", 101*7c478bd9Sstevel@tonic-gate "cmd=CPU_GO path=/ppm@1e,0:jbus-ppm method=KIO iowr=0x6a03 val=0", 102*7c478bd9Sstevel@tonic-gate "cmd=POST_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=5"; 103*7c478bd9Sstevel@tonic-gate 104*7c478bd9Sstevel@tonic-gate# 105*7c478bd9Sstevel@tonic-gate# iowr -- 0x4D82 is GPIO_SET_OUTPUT per sys/i2c/clients/i2c_gpio.h file 106*7c478bd9Sstevel@tonic-gate# iord -- 0x4D80 is GPIO_GET_INPUT per sys/i2c/clients/i2c_gpio.h file 107*7c478bd9Sstevel@tonic-gate# mask -- bit mask for control pin 108*7c478bd9Sstevel@tonic-gate# val -- pin value to set on/off 109*7c478bd9Sstevel@tonic-gate# delay -- minimum delay between FET off and FET on 110*7c478bd9Sstevel@tonic-gate# post_delay -- delay after turning on/off the FET 111*7c478bd9Sstevel@tonic-gate# 112*7c478bd9Sstevel@tonic-gatedomain_scsifet1-devices = "/pci@1d,700000/scsi@3/sd@0,0", "/pci@1d,700000/scsi@4/sd@0,0"; 113*7c478bd9Sstevel@tonic-gatedomain_scsifet1-model = "FET"; 114*7c478bd9Sstevel@tonic-gatedomain_scsifet1-control = 115*7c478bd9Sstevel@tonic-gate "cmd=FET_ON path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x80 val=0x80 post_delay=1500000", 116*7c478bd9Sstevel@tonic-gate "cmd=FET_OFF path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x80 val=0"; 117*7c478bd9Sstevel@tonic-gate 118*7c478bd9Sstevel@tonic-gatedomain_scsifet2-devices = "/pci@1d,700000/scsi@3/sd@1,0", "/pci@1d,700000/scsi@4/sd@1,0"; 119*7c478bd9Sstevel@tonic-gatedomain_scsifet2-model = "FET"; 120*7c478bd9Sstevel@tonic-gatedomain_scsifet2-control = 121*7c478bd9Sstevel@tonic-gate "cmd=FET_ON path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0x02 post_delay=1500000", 122*7c478bd9Sstevel@tonic-gate "cmd=FET_OFF path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0"; 123*7c478bd9Sstevel@tonic-gate 124*7c478bd9Sstevel@tonic-gate 125*7c478bd9Sstevel@tonic-gate# 126*7c478bd9Sstevel@tonic-gate# If we power up ide fet after powering up uata controller, atapi ide dvd 127*7c478bd9Sstevel@tonic-gate# stuck at low power - a problem under investigation. Until the problem is 128*7c478bd9Sstevel@tonic-gate# solved, we work around it by applying the fet to ide controller. 129*7c478bd9Sstevel@tonic-gate# 130*7c478bd9Sstevel@tonic-gatedomain_idefet-devices = "/pci@1e,600000/ide@d"; 131*7c478bd9Sstevel@tonic-gatedomain_idefet-model = "FET"; 132*7c478bd9Sstevel@tonic-gatedomain_idefet-control = 133*7c478bd9Sstevel@tonic-gate "cmd=FET_ON path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x10 val=0x10 delay=1000000 post_delay=1000000", 134*7c478bd9Sstevel@tonic-gate "cmd=FET_OFF path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x10 val=0"; 135*7c478bd9Sstevel@tonic-gate 136*7c478bd9Sstevel@tonic-gate# 137*7c478bd9Sstevel@tonic-gate# iord -- 0x6c01 is M1535PPMIOC_GET (('l' << 8) | 1) 138*7c478bd9Sstevel@tonic-gate# iowr -- 0x6c02 is M1535PPMIOC_SET (('l' << 8) | 2) 139*7c478bd9Sstevel@tonic-gate# 140*7c478bd9Sstevel@tonic-gate# Enchilada: SPLED drive low 141*7c478bd9Sstevel@tonic-gate# Grover: SPLED driver high 142*7c478bd9Sstevel@tonic-gate# note: no device to claim in this domain 143*7c478bd9Sstevel@tonic-gate# 144*7c478bd9Sstevel@tonic-gatedomain_led-devices = ""; 145*7c478bd9Sstevel@tonic-gatedomain_led-model = "LED"; 146*7c478bd9Sstevel@tonic-gatedomain_led-control = 147*7c478bd9Sstevel@tonic-gate "cmd=LED_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=0", 148*7c478bd9Sstevel@tonic-gate "cmd=LED_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=1"; 149*7c478bd9Sstevel@tonic-gate 150*7c478bd9Sstevel@tonic-gate 151*7c478bd9Sstevel@tonic-gate# 152*7c478bd9Sstevel@tonic-gate# Note, in ppm.conf file, the pci slot is counted from the inner most 153*7c478bd9Sstevel@tonic-gate# slot toward outer most in increasing order, according to Enchilada 154*7c478bd9Sstevel@tonic-gate# motherboard schematic. The onboard physical slots however, may have 155*7c478bd9Sstevel@tonic-gate# been labled differently - it's been said that prior to rev G, the 156*7c478bd9Sstevel@tonic-gate# slots are labeled/counted from inside to outside, but starting from 157*7c478bd9Sstevel@tonic-gate# rev G slots will be labeled/counted from outside to inside. 158*7c478bd9Sstevel@tonic-gate# 159*7c478bd9Sstevel@tonic-gate 160*7c478bd9Sstevel@tonic-gate# slot 0, PCI2B segment, 66mhz 161*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI2B_1) = 0x2540 162*7c478bd9Sstevel@tonic-gate# iord = (ICS951601_READ_CLOCK | ICS951601_PCI2B_1) = 0x1540 163*7c478bd9Sstevel@tonic-gate# 164*7c478bd9Sstevel@tonic-gatedomain_pcislot_0-devices = "/pci@1f,700000/*@2,*", "/pci@1f,700000/*@2"; 165*7c478bd9Sstevel@tonic-gatedomain_pcislot_0-model = "PCI"; 166*7c478bd9Sstevel@tonic-gatedomain_pcislot_0-control = 167*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=1", 168*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=0"; 169*7c478bd9Sstevel@tonic-gate 170*7c478bd9Sstevel@tonic-gate# 171*7c478bd9Sstevel@tonic-gate# slot 1, PCI2A segment, 33mhz 172*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_5) = 0x2320 173*7c478bd9Sstevel@tonic-gate# 174*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-devices = "/pci@1e,600000/*@2,*", "/pci@1e,600000/*@2"; 175*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-model = "PCI_PROP"; 176*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-propname = "nonidle-bus-clock-pm"; 177*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-control = 178*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=1", 179*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=0"; 180*7c478bd9Sstevel@tonic-gate 181*7c478bd9Sstevel@tonic-gate# 182*7c478bd9Sstevel@tonic-gate# slot 2, PCI1A segment, 66mhz 183*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI2A_0) = 0x2420 184*7c478bd9Sstevel@tonic-gate# 185*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-devices = "/pci@1c,600000/*@2,*", "/pci@1c,600000/*@2"; 186*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-model = "PCI_PROP"; 187*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-propname = "nonidle-bus-clock-pm"; 188*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-control = 189*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2420 iord=0x1420 val=1", 190*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2420 iord=0x1420 val=0"; 191*7c478bd9Sstevel@tonic-gate 192*7c478bd9Sstevel@tonic-gate# 193*7c478bd9Sstevel@tonic-gate# slot 3, PCI1B segment, 66mhz 194*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1B_0) = 0x2404 195*7c478bd9Sstevel@tonic-gate# 196*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-devices = "/pci@1d,700000/*@2,*", "/pci@1d,700000/*@2"; 197*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-model = "PCI_PROP"; 198*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-propname = "nonidle-bus-clock-pm"; 199*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-control = 200*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2404 iord=0x1404 val=1", 201*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2404 iord=0x1404 val=0"; 202*7c478bd9Sstevel@tonic-gate 203*7c478bd9Sstevel@tonic-gate# 204*7c478bd9Sstevel@tonic-gate# slot 4, PCI2A segment, 33mhz 205*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_1) = 0x2302 206*7c478bd9Sstevel@tonic-gate# 207*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-devices = "/pci@1e,600000/*@3,*", "/pci@1e,600000/*@3"; 208*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-model = "PCI_PROP"; 209*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-propname = "nonidle-bus-clock-pm"; 210*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-control = 211*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2302 iord=0x1302 val=1", 212*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2302 iord=0x1302 val=0"; 213*7c478bd9Sstevel@tonic-gate 214*7c478bd9Sstevel@tonic-gate# 215*7c478bd9Sstevel@tonic-gate# slot 5, PCI2A segment, 33mhz 216*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_2) = 0x2304 217*7c478bd9Sstevel@tonic-gate# 218*7c478bd9Sstevel@tonic-gatedomain_pcislot_5-devices = "/pci@1e,600000/*@4,*", "/pci@1e,600000/*@4"; 219*7c478bd9Sstevel@tonic-gatedomain_pcislot_5-model = "PCI_PROP"; 220*7c478bd9Sstevel@tonic-gatedomain_pcislot_5-propname = "nonidle-bus-clock-pm"; 221*7c478bd9Sstevel@tonic-gatedomain_pcislot_5-control = 222*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2304 iord=0x1304 val=1", 223*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2304 iord=0x1304 val=0"; 224