xref: /titanic_52/usr/src/uts/sun4u/cpu/mach_cpu_module.c (revision b6c3f7863936abeae522e48a13887dddeb691a45)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/cpu_module.h>
30 #include <vm/page.h>
31 #include <vm/seg_map.h>
32 
33 void
34 cpu_fiximp(pnode_t dnode)
35 {}
36 
37 void
38 ce_err(void)
39 {}
40 
41 void
42 ce_err_tl1(void)
43 {}
44 
45 void
46 async_err(void)
47 {}
48 
49 void
50 cpu_flush_ecache(void)
51 {}
52 
53 void
54 cpu_disable_errors(void)
55 {}
56 
57 /* It could be removed later if prom enables error handling */
58 void
59 cpu_enable_errors(void)
60 {}
61 
62 /*ARGSUSED*/
63 void
64 cpu_faulted_enter(struct cpu *cp)
65 {}
66 
67 /*ARGSUSED*/
68 void
69 cpu_faulted_exit(struct cpu *cp)
70 {}
71 
72 /*ARGSUSED*/
73 void
74 cpu_ce_count_unum(struct async_flt *ecc, int len, char *unum)
75 {}
76 
77 /*ARGSUSED*/
78 void
79 cpu_ce_scrub_mem_err(struct async_flt *ecc, boolean_t triedcpulogout)
80 {}
81 
82 /*ARGSUSED*/
83 void
84 cpu_ce_log_err(struct async_flt *ecc, errorq_elem_t *eqep)
85 {}
86 
87 /*ARGSUSED*/
88 void
89 cpu_ue_log_err(struct async_flt *ecc)
90 {}
91 
92 /*ARGSUSED*/
93 int
94 ce_scrub_xdiag_recirc(struct async_flt *aflt, errorq_t *eqp,
95     errorq_elem_t *eqep, size_t afltoffset)
96 { return (0); }
97 
98 /*ARGSUSED*/
99 char *
100 flt_to_error_type(struct async_flt *aflt)
101 { return (NULL); }
102 
103 int
104 cpu_aflt_size(void)
105 { return (0); }
106 
107 void
108 cpu_async_panic_callb(void)
109 {}
110 
111 /*ARGSUSED*/
112 void
113 cpu_check_allcpus(struct async_flt *aflt)
114 {}
115 
116 /*ARGSUSED*/
117 int
118 cpu_get_mem_sid(char *unum, char *buf, int buflen, int *lenp)
119 { return (ENOTSUP); }
120 
121 /*ARGSUSED*/
122 int
123 cpu_get_mem_offset(uint64_t flt_addr, uint64_t *offp)
124 { return (ENOTSUP); }
125 
126 /*ARGSUSED*/
127 int
128 cpu_get_mem_addr(char *unum, char *sid, uint64_t offset,
129     uint64_t *addrp)
130 { return (ENOTSUP); }
131 
132 /*ARGSUSED*/
133 int
134 cpu_get_mem_unum(int synd_stat, ushort_t synd, uint64_t afsr, uint64_t afar,
135     int cpuid, int flt_in_memory, ushort_t flt_status, char *buf,
136     int buflen, int *lenp)
137 { return (ENOTSUP); }
138 
139 /*ARGSUSED*/
140 int
141 cpu_get_mem_unum_aflt(int synd_stat, struct async_flt *aflt,
142     char *buf, int buflen, int *lenp)
143 { return (ENOTSUP); }
144 
145 /*ARGSUSED*/
146 int
147 cpu_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp)
148 { return (ENOTSUP); }
149 
150 /*ARGSUSED*/
151 int
152 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
153     char *buf, int buflen, int *lenp)
154 { return (ENOTSUP); }
155 
156 /*ARGSUSED*/
157 size_t
158 cpu_get_name_bufsize()
159 { return (0); }
160 
161 /*ARGSUSED*/
162 int
163 cpu_get_mem_info(uint64_t synd, uint64_t afar,
164     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
165     int *segsp, int *banksp, int *mcidp)
166 { return (ENOTSUP); }
167 
168 /*ARGSUSED*/
169 void
170 cpu_ereport_post(struct async_flt *aflt)
171 {}
172 
173 /*ARGSUSED*/
174 void
175 cpu_run_bus_error_handlers(struct async_flt *aflt, int expected)
176 {}
177 
178 void
179 cpu_errorq_dispatch(char *error_class, void *payload, size_t payload_sz,
180     errorq_t *eqp, uint_t flag)
181 {}
182 
183 void
184 clr_datapath(void)
185 {}
186 
187 /*ARGSUSED*/
188 void
189 read_ecc_data(struct async_flt *ecc, short verbose, short ce_err)
190 {}
191 
192 /*ARGSUSED*/
193 void
194 itlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag)
195 {}
196 
197 /*ARGSUSED*/
198 void
199 dtlb_rd_entry(uint_t entry, tte_t *tte, uint64_t *va_tag)
200 {}
201 
202 /*
203  * tick operations
204  */
205 
206 void
207 cpu_clearticknpt(void)
208 { }
209 
210 /*
211  * Ecache scrub operations
212  */
213 void
214 cpu_init_cache_scrub(void)
215 {}
216 
217 /*ARGSUSED*/
218 void
219 cpu_busy_ecache_scrub(struct cpu *cp)
220 {}
221 
222 /*ARGSUSED*/
223 void
224 cpu_idle_ecache_scrub(struct cpu *cp)
225 {}
226 
227 /* ARGSUSED */
228 void
229 cpu_check_ce(int flag, uint64_t pa, caddr_t va, uint_t bpp)
230 {}
231 
232 /* ARGSUSED */
233 void
234 prefetch_page_w(void *pp)
235 {
236 #define	ECACHE_SUBBLOCKS_PER_PAGE	2
237 #define	ECACHE_SUBBLOCK_SIZE_BYTES	64
238 #define	ECACHE_PAGE_BYTE_MAX	\
239 	(ECACHE_SUBBLOCKS_PER_PAGE*ECACHE_SUBBLOCK_SIZE_BYTES+1)
240 
241 	/*
242 	 * The following line is intended to cause an error
243 	 * whenever the sun4u page_t grows beyond 128
244 	 * bytes.
245 	 *
246 	 * If you get an error here, you'll need to change
247 	 * the 'prefetch_page_w' assembly language code
248 	 * (see also prefetch_page_w prologue comment)
249 	 */
250 	/*LINTED*/
251 	volatile int garbage[ECACHE_PAGE_BYTE_MAX - sizeof (page_t)];
252 }
253 
254 /* ARGSUSED */
255 void
256 prefetch_page_r(void *pp)
257 {
258 #define	ECACHE_SUBBLOCKS_PER_PAGE	2
259 #define	ECACHE_SUBBLOCK_SIZE_BYTES	64
260 #define	ECACHE_PAGE_BYTE_MAX	\
261 	(ECACHE_SUBBLOCKS_PER_PAGE*ECACHE_SUBBLOCK_SIZE_BYTES+1)
262 
263 	/*
264 	 * The following line is intended to cause an error
265 	 * whenever the sun4u page_t grows beyond 128
266 	 * bytes.
267 	 *
268 	 * If you get an error here, you'll need to change
269 	 * the 'prefetch_page_r' assembly language code
270 	 * (see also prefetch_page_w prologue comment)
271 	 */
272 	/*LINTED*/
273 	volatile int garbage[ECACHE_PAGE_BYTE_MAX - sizeof (page_t)];
274 }
275 
276 
277 #ifdef	SEGKPM_SUPPORT
278 #define	SMAP_SIZE	80
279 #else
280 #define	SMAP_SIZE	56
281 #endif
282 
283 /* ARGSUSED */
284 void
285 prefetch_smap_w(void *smp)
286 {
287 
288 	/*
289 	 * The following lines are intended to cause an error
290 	 * whenever the smap object size changes from the current
291 	 * size of 48 bytes.  If you get an error here, you'll
292 	 * need to update the code in the 'prefetch_smap_w' assembly
293 	 * language code.
294 	 */
295 	/*LINTED*/
296 	volatile int smap_size_changed [SMAP_SIZE - sizeof (struct smap) + 1];
297 	volatile int smap_size_changed2 [sizeof (struct smap) - SMAP_SIZE + 1];
298 }
299 
300 void
301 kdi_flush_caches(void)
302 {}
303 
304 /*ARGSUSED*/
305 void
306 mmu_init_kernel_pgsz(struct hat *hat)
307 {
308 }
309 
310 size_t
311 mmu_get_kernel_lpsize(size_t value)
312 {
313 	return (value);
314 }
315