1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/sysmacros.h> 32 #include <sys/sunddi.h> 33 #include <sys/esunddi.h> 34 35 #include <sys/platform_module.h> 36 #include <sys/errno.h> 37 #include <sys/cpu_sgnblk_defs.h> 38 #include <sys/rmc_comm_dp.h> 39 #include <sys/rmc_comm_drvintf.h> 40 #include <sys/modctl.h> 41 #include <sys/lgrp.h> 42 #include <sys/memnode.h> 43 #include <sys/promif.h> 44 45 #define SHARED_MI2CV_PATH "/i2c@1f,520000" 46 static dev_info_t *shared_mi2cv_dip; 47 static kmutex_t mi2cv_mutex; 48 49 int (*p2get_mem_unum)(int, uint64_t, char *, int, int *); 50 static void cpu_sgn_update(ushort_t, uchar_t, uchar_t, int); 51 int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; 52 53 void 54 startup_platform(void) 55 { 56 mutex_init(&mi2cv_mutex, NULL, NULL, NULL); 57 } 58 59 int 60 set_platform_tsb_spares() 61 { 62 return (0); 63 } 64 65 void 66 set_platform_defaults(void) 67 { 68 extern char *tod_module_name; 69 /* Set appropriate tod module */ 70 if (tod_module_name == NULL) 71 tod_module_name = "todm5823"; 72 73 cpu_sgn_func = cpu_sgn_update; 74 } 75 76 /* 77 * Definitions for accessing the pci config space of the isa node 78 * of Southbridge. 79 */ 80 static ddi_acc_handle_t isa_handle = NULL; /* handle for isa pci space */ 81 82 /* 83 * Definition for accessing rmclomv 84 */ 85 #define RMCLOMV_PATHNAME "/pseudo/rmclomv@0" 86 87 void 88 load_platform_drivers(void) 89 { 90 /* 91 * It is OK to return error because 'us' driver is not available 92 * in all clusters (e.g. missing in Core cluster). 93 */ 94 (void) i_ddi_attach_hw_nodes("us"); 95 96 97 /* 98 * mc-us3i must stay loaded for plat_get_mem_unum() 99 */ 100 if (i_ddi_attach_hw_nodes("mc-us3i") != DDI_SUCCESS) 101 cmn_err(CE_WARN, "mc-us3i driver failed to install"); 102 (void) ddi_hold_driver(ddi_name_to_major("mc-us3i")); 103 104 /* 105 * load the power button driver 106 */ 107 if (i_ddi_attach_hw_nodes("power") != DDI_SUCCESS) 108 cmn_err(CE_WARN, "power button driver failed to install"); 109 (void) ddi_hold_driver(ddi_name_to_major("power")); 110 111 /* 112 * load the GPIO driver for the ALOM reset and watchdog lines 113 */ 114 if (i_ddi_attach_hw_nodes("pmugpio") != DDI_SUCCESS) 115 cmn_err(CE_WARN, "pmugpio failed to install"); 116 else { 117 extern int watchdog_enable, watchdog_available; 118 extern int disable_watchdog_on_exit; 119 120 /* 121 * Disable an active h/w watchdog timer upon exit to OBP. 122 */ 123 disable_watchdog_on_exit = 1; 124 125 watchdog_enable = 1; 126 watchdog_available = 1; 127 } 128 (void) ddi_hold_driver(ddi_name_to_major("pmugpio")); 129 130 /* 131 * Figure out which mi2cv dip is shared with OBP for the nvram 132 * device, so the lock can be acquired. 133 */ 134 shared_mi2cv_dip = e_ddi_hold_devi_by_path(SHARED_MI2CV_PATH, 0); 135 136 /* 137 * Load the environmentals driver (rmclomv) 138 * 139 * We need this driver to handle events from the RMC when state 140 * changes occur in the environmental data. 141 */ 142 if (i_ddi_attach_hw_nodes("rmc_comm") != DDI_SUCCESS) { 143 cmn_err(CE_WARN, "rmc_comm failed to install"); 144 } else { 145 (void) ddi_hold_driver(ddi_name_to_major("rmc_comm")); 146 147 if (e_ddi_hold_devi_by_path(RMCLOMV_PATHNAME, 0) == NULL) { 148 cmn_err(CE_WARN, "Could not install rmclomv driver\n"); 149 } 150 } 151 /* 152 * create a handle to the rmc_comm_request_nowait() function 153 * inside the rmc_comm module. 154 * 155 * The Seattle/Boston todm5823 driver will use this handle to 156 * use the rmc_comm_request_nowait() function to send time/date 157 * updates to ALOM. 158 */ 159 rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) 160 modgetsymvalue("rmc_comm_request_nowait", 0); 161 } 162 163 /* 164 * This routine is needed if a device error or timeout occurs before the 165 * driver is loaded. 166 */ 167 /*ARGSUSED*/ 168 int 169 plat_ide_chipreset(dev_info_t *dip, int chno) 170 { 171 int ret = DDI_SUCCESS; 172 173 if (isa_handle == NULL) { 174 return (DDI_FAILURE); 175 } 176 177 /* 178 * This will be filled in with the reset logic 179 * for the ULI1573 when that becomes available. 180 * currently this is just a stub. 181 */ 182 return (ret); 183 } 184 185 186 /*ARGSUSED*/ 187 int 188 plat_cpu_poweron(struct cpu *cp) 189 { 190 return (ENOTSUP); /* not supported on this platform */ 191 } 192 193 /*ARGSUSED*/ 194 int 195 plat_cpu_poweroff(struct cpu *cp) 196 { 197 return (ENOTSUP); /* not supported on this platform */ 198 } 199 200 /*ARGSUSED*/ 201 void 202 plat_freelist_process(int mnode) 203 { 204 } 205 206 char *platform_module_list[] = { 207 "mi2cv", 208 "pca9556", 209 (char *)0 210 }; 211 212 /*ARGSUSED*/ 213 void 214 plat_tod_fault(enum tod_fault_type tod_bad) 215 { 216 } 217 218 /*ARGSUSED*/ 219 int 220 plat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id, 221 int flt_in_memory, ushort_t flt_status, char *buf, int buflen, int *lenp) 222 { 223 if (flt_in_memory && (p2get_mem_unum != NULL)) 224 return (p2get_mem_unum(synd_code, P2ALIGN(flt_addr, 8), 225 buf, buflen, lenp)); 226 else 227 return (ENOTSUP); 228 } 229 230 /* 231 * This platform hook gets called from mc_add_mem_unum_label() in the mc-us3i 232 * driver giving each platform the opportunity to add platform 233 * specific label information to the unum for ECC error logging purposes. 234 */ 235 /*ARGSUSED*/ 236 void 237 plat_add_mem_unum_label(char *unum, int mcid, int bank, int dimm) 238 { 239 char old_unum[UNUM_NAMLEN]; 240 int printed; 241 int buflen = UNUM_NAMLEN; 242 243 strcpy(old_unum, unum); 244 printed = snprintf(unum, buflen, "C%d/P0/B%d", mcid, bank); 245 buflen -= printed; 246 unum += printed; 247 248 if (dimm != -1) { 249 printed = snprintf(unum, buflen, "/D%d", dimm); 250 buflen -= printed; 251 unum += printed; 252 } 253 254 snprintf(unum, buflen, ": %s", old_unum); 255 } 256 257 /*ARGSUSED*/ 258 int 259 plat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp) 260 { 261 if (snprintf(buf, buflen, "MB") >= buflen) { 262 return (ENOSPC); 263 } else { 264 *lenp = strlen(buf); 265 return (0); 266 } 267 } 268 269 /* 270 * Our nodename has been set, pass it along to the RMC. 271 */ 272 void 273 plat_nodename_set(void) 274 { 275 rmc_comm_msg_t req; /* request */ 276 int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; 277 278 /* 279 * find the symbol for the mailbox routine 280 */ 281 rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) 282 modgetsymvalue("rmc_comm_request_response", 0); 283 284 if (rmc_req_res == NULL) { 285 return; 286 } 287 288 /* 289 * construct the message telling the RMC our nodename 290 */ 291 req.msg_type = DP_SET_CPU_NODENAME; 292 req.msg_len = strlen(utsname.nodename) + 1; 293 req.msg_bytes = 0; 294 req.msg_buf = (caddr_t)utsname.nodename; 295 296 /* 297 * ship it 298 */ 299 (void) (rmc_req_res)(&req, NULL, 2000); 300 } 301 302 sig_state_t current_sgn; 303 304 /* 305 * cpu signatures - we're only interested in the overall system 306 * "signature" on this platform - not individual cpu signatures 307 */ 308 /*ARGSUSED*/ 309 static void 310 cpu_sgn_update(ushort_t sig, uchar_t state, uchar_t sub_state, int cpuid) 311 { 312 dp_cpu_signature_t signature; 313 rmc_comm_msg_t req; /* request */ 314 int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; 315 int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; 316 317 318 /* 319 * Differentiate a panic reboot from a non-panic reboot in the 320 * setting of the substate of the signature. 321 * 322 * If the new substate is REBOOT and we're rebooting due to a panic, 323 * then set the new substate to a special value indicating a panic 324 * reboot, SIGSUBST_PANIC_REBOOT. 325 * 326 * A panic reboot is detected by a current (previous) signature 327 * state of SIGST_EXIT, and a new signature substate of SIGSUBST_REBOOT. 328 * The domain signature state SIGST_EXIT is used as the panic flow 329 * progresses. 330 * 331 * At the end of the panic flow, the reboot occurs but we should know 332 * one that was involuntary, something that may be quite useful to know 333 * at OBP level. 334 */ 335 if (state == SIGST_EXIT && sub_state == SIGSUBST_REBOOT) { 336 if (current_sgn.state_t.state == SIGST_EXIT && 337 current_sgn.state_t.sub_state != SIGSUBST_REBOOT) 338 sub_state = SIGSUBST_PANIC_REBOOT; 339 } 340 341 /* 342 * offline and detached states only apply to a specific cpu 343 * so ignore them. 344 */ 345 if (state == SIGST_OFFLINE || state == SIGST_DETACHED) { 346 return; 347 } 348 349 current_sgn.signature = CPU_SIG_BLD(sig, state, sub_state); 350 351 /* 352 * find the symbol for the mailbox routine 353 */ 354 rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) 355 modgetsymvalue("rmc_comm_request_response", 0); 356 if (rmc_req_res == NULL) { 357 return; 358 } 359 360 /* 361 * find the symbol for the mailbox routine 362 */ 363 rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) 364 modgetsymvalue("rmc_comm_request_nowait", 0); 365 if (rmc_req_now == NULL) { 366 return; 367 } 368 369 signature.cpu_id = -1; 370 signature.sig = sig; 371 signature.states = state; 372 signature.sub_state = sub_state; 373 req.msg_type = DP_SET_CPU_SIGNATURE; 374 req.msg_len = (int)(sizeof (signature)); 375 req.msg_bytes = 0; 376 req.msg_buf = (caddr_t)&signature; 377 378 /* 379 * ship it 380 * - note that for panic or reboot need to send with nowait/urgent 381 */ 382 if (state == SIGST_EXIT && (sub_state == SIGSUBST_HALT || 383 sub_state == SIGSUBST_REBOOT || sub_state == SIGSUBST_ENVIRON || 384 sub_state == SIGSUBST_PANIC_REBOOT)) 385 (void) (rmc_req_now)(&req, RMC_COMM_DREQ_URGENT); 386 else 387 (void) (rmc_req_res)(&req, NULL, 2000); 388 } 389 390 /* 391 * Fiesta support for lgroups. 392 * 393 * On fiesta platform, an lgroup platform handle == CPU id 394 */ 395 396 /* 397 * Macro for extracting the CPU number from the CPU id 398 */ 399 #define CPUID_TO_LGRP(id) ((id) & 0x7) 400 #define PLATFORM_MC_SHIFT 36 401 402 /* 403 * Return the platform handle for the lgroup containing the given CPU 404 */ 405 void * 406 plat_lgrp_cpu_to_hand(processorid_t id) 407 { 408 return ((void *)(uintptr_t)CPUID_TO_LGRP(id)); 409 } 410 411 /* 412 * Platform specific lgroup initialization 413 */ 414 void 415 plat_lgrp_init(void) 416 { 417 pnode_t curnode; 418 char tmp_name[MAXSYSNAME]; 419 int portid; 420 int cpucnt = 0; 421 int max_portid = -1; 422 extern uint32_t lgrp_expand_proc_thresh; 423 extern uint32_t lgrp_expand_proc_diff; 424 extern pgcnt_t lgrp_mem_free_thresh; 425 extern uint32_t lgrp_loadavg_tolerance; 426 extern uint32_t lgrp_loadavg_max_effect; 427 extern uint32_t lgrp_load_thresh; 428 extern lgrp_mem_policy_t lgrp_mem_policy_root; 429 430 /* 431 * Count the number of CPUs installed to determine if 432 * NUMA optimization should be enabled or not. 433 * 434 * All CPU nodes reside in the root node and have a 435 * device type "cpu". 436 */ 437 curnode = prom_rootnode(); 438 for (curnode = prom_childnode(curnode); curnode; 439 curnode = prom_nextnode(curnode)) { 440 bzero(tmp_name, MAXSYSNAME); 441 if (prom_getproplen(curnode, OBP_NAME) < MAXSYSNAME) { 442 if (prom_getprop(curnode, OBP_NAME, 443 (caddr_t)tmp_name) == -1 || prom_getprop(curnode, 444 OBP_DEVICETYPE, tmp_name) == -1 || strcmp(tmp_name, 445 "cpu") != 0) 446 continue; 447 448 cpucnt++; 449 if (prom_getprop(curnode, "portid", (caddr_t)&portid) != 450 -1 && portid > max_portid) 451 max_portid = portid; 452 } 453 } 454 if (cpucnt <= 1) 455 max_mem_nodes = 1; 456 else if (max_portid >= 0 && max_portid < MAX_MEM_NODES) 457 max_mem_nodes = max_portid + 1; 458 459 /* 460 * Set tuneables for fiesta architecture 461 * 462 * lgrp_expand_proc_thresh is the minimum load on the lgroups 463 * this process is currently running on before considering 464 * expanding threads to another lgroup. 465 * 466 * lgrp_expand_proc_diff determines how much less the remote lgroup 467 * must be loaded before expanding to it. 468 * 469 * Optimize for memory bandwidth by spreading multi-threaded 470 * program to different lgroups. 471 */ 472 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; 473 lgrp_expand_proc_diff = lgrp_loadavg_max_effect / 2; 474 lgrp_loadavg_tolerance = lgrp_loadavg_max_effect / 2; 475 lgrp_mem_free_thresh = 1; /* home lgrp must have some memory */ 476 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; 477 lgrp_mem_policy_root = LGRP_MEM_POLICY_NEXT; 478 lgrp_load_thresh = 0; 479 480 mem_node_pfn_shift = PLATFORM_MC_SHIFT - MMU_PAGESHIFT; 481 } 482 483 /* 484 * Return latency between "from" and "to" lgroups 485 * 486 * This latency number can only be used for relative comparison 487 * between lgroups on the running system, cannot be used across platforms, 488 * and may not reflect the actual latency. It is platform and implementation 489 * specific, so platform gets to decide its value. It would be nice if the 490 * number was at least proportional to make comparisons more meaningful though. 491 * NOTE: The numbers below are supposed to be load latencies for uncached 492 * memory divided by 10. 493 */ 494 int 495 plat_lgrp_latency(void *from, void *to) 496 { 497 /* 498 * Return remote latency when there are more than two lgroups 499 * (root and child) and getting latency between two different 500 * lgroups or root is involved 501 */ 502 if (lgrp_optimizations() && (from != to || from == 503 (void *) LGRP_DEFAULT_HANDLE || to == (void *) LGRP_DEFAULT_HANDLE)) 504 return (17); 505 else 506 return (12); 507 } 508 509 int 510 plat_pfn_to_mem_node(pfn_t pfn) 511 { 512 ASSERT(max_mem_nodes > 1); 513 return (pfn >> mem_node_pfn_shift); 514 } 515 516 /* 517 * Assign memnode to lgroups 518 */ 519 void 520 plat_fill_mc(pnode_t nodeid) 521 { 522 int portid; 523 524 /* 525 * Memory controller portid == global CPU id 526 */ 527 if ((prom_getprop(nodeid, "portid", (caddr_t)&portid) == -1) || 528 (portid < 0)) 529 return; 530 531 if (portid < max_mem_nodes) 532 plat_assign_lgrphand_to_mem_node((lgrp_handle_t)portid, portid); 533 } 534 535 /* ARGSUSED */ 536 void 537 plat_build_mem_nodes(u_longlong_t *list, size_t nelems) 538 { 539 size_t elem; 540 pfn_t basepfn; 541 pgcnt_t npgs; 542 543 /* 544 * Boot install lists are arranged <addr, len>, <addr, len>, ... 545 */ 546 for (elem = 0; elem < nelems; elem += 2) { 547 basepfn = btop(list[elem]); 548 npgs = btop(list[elem+1]); 549 mem_node_add_slice(basepfn, basepfn + npgs - 1); 550 } 551 } 552 553 /* 554 * Common locking enter code 555 */ 556 void 557 plat_setprop_enter(void) 558 { 559 mutex_enter(&mi2cv_mutex); 560 } 561 562 /* 563 * Common locking exit code 564 */ 565 void 566 plat_setprop_exit(void) 567 { 568 mutex_exit(&mi2cv_mutex); 569 } 570 571 /* 572 * Called by mi2cv driver 573 */ 574 void 575 plat_shared_i2c_enter(dev_info_t *i2cnexus_dip) 576 { 577 if (i2cnexus_dip == shared_mi2cv_dip) { 578 plat_setprop_enter(); 579 } 580 } 581 582 /* 583 * Called by mi2cv driver 584 */ 585 void 586 plat_shared_i2c_exit(dev_info_t *i2cnexus_dip) 587 { 588 if (i2cnexus_dip == shared_mi2cv_dip) { 589 plat_setprop_exit(); 590 } 591 } 592 593 /* 594 * Called by todm5823 driver 595 */ 596 void 597 plat_rmc_comm_req(struct rmc_comm_msg *request) 598 { 599 if (rmc_req_now) 600 (void) rmc_req_now(request, 0); 601 } 602