1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/sysmacros.h> 32 #include <sys/sunddi.h> 33 #include <sys/esunddi.h> 34 35 #include <sys/platform_module.h> 36 #include <sys/errno.h> 37 #include <sys/cpu_sgnblk_defs.h> 38 #include <sys/rmc_comm_dp.h> 39 #include <sys/rmc_comm_drvintf.h> 40 #include <sys/modctl.h> 41 #include <sys/lgrp.h> 42 #include <sys/memnode.h> 43 #include <sys/promif.h> 44 45 #define SHARED_MI2CV_PATH "/i2c@1f,520000" 46 static dev_info_t *shared_mi2cv_dip; 47 static kmutex_t mi2cv_mutex; 48 49 int (*p2get_mem_unum)(int, uint64_t, char *, int, int *); 50 static void cpu_sgn_update(ushort_t, uchar_t, uchar_t, int); 51 int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; 52 53 void 54 startup_platform(void) 55 { 56 mutex_init(&mi2cv_mutex, NULL, NULL, NULL); 57 } 58 59 int 60 set_platform_tsb_spares() 61 { 62 return (0); 63 } 64 65 void 66 set_platform_defaults(void) 67 { 68 extern char *tod_module_name; 69 /* Set appropriate tod module */ 70 if (tod_module_name == NULL) 71 tod_module_name = "todm5823"; 72 73 cpu_sgn_func = cpu_sgn_update; 74 } 75 76 /* 77 * these two dummy functions are loaded over the original 78 * todm5823 set and clear_power_alarm functions. On Boston 79 * these functions are not supported, and thus we need to provide 80 * dummy functions that just returns. 81 * On Boston, clock chip is not persistant across reboots, 82 * and moreover it has a bug sending memory access. 83 * This fix is done by writing over the original 84 * tod_ops function pointer with our dummy replacement functions. 85 */ 86 /*ARGSUSED*/ 87 static void 88 dummy_todm5823_set_power_alarm(timestruc_t ts) 89 { 90 } 91 92 static void 93 dummy_todm5823_clear_power_alarm(void) 94 { 95 } 96 97 /* 98 * Definitions for accessing the pci config space of the isa node 99 * of Southbridge. 100 */ 101 static ddi_acc_handle_t isa_handle = NULL; /* handle for isa pci space */ 102 103 /* 104 * Definition for accessing rmclomv 105 */ 106 #define RMCLOMV_PATHNAME "/pseudo/rmclomv@0" 107 108 void 109 load_platform_drivers(void) 110 { 111 /* 112 * It is OK to return error because 'us' driver is not available 113 * in all clusters (e.g. missing in Core cluster). 114 */ 115 (void) i_ddi_attach_hw_nodes("us"); 116 117 118 /* 119 * mc-us3i must stay loaded for plat_get_mem_unum() 120 */ 121 if (i_ddi_attach_hw_nodes("mc-us3i") != DDI_SUCCESS) 122 cmn_err(CE_WARN, "mc-us3i driver failed to install"); 123 (void) ddi_hold_driver(ddi_name_to_major("mc-us3i")); 124 125 /* 126 * load the power button driver 127 */ 128 if (i_ddi_attach_hw_nodes("power") != DDI_SUCCESS) 129 cmn_err(CE_WARN, "power button driver failed to install"); 130 (void) ddi_hold_driver(ddi_name_to_major("power")); 131 132 /* 133 * load the GPIO driver for the ALOM reset and watchdog lines 134 */ 135 if (i_ddi_attach_hw_nodes("pmugpio") != DDI_SUCCESS) 136 cmn_err(CE_WARN, "pmugpio failed to install"); 137 else { 138 extern int watchdog_enable, watchdog_available; 139 extern int disable_watchdog_on_exit; 140 141 /* 142 * Disable an active h/w watchdog timer upon exit to OBP. 143 */ 144 disable_watchdog_on_exit = 1; 145 146 watchdog_enable = 1; 147 watchdog_available = 1; 148 } 149 (void) ddi_hold_driver(ddi_name_to_major("pmugpio")); 150 151 /* 152 * Figure out which mi2cv dip is shared with OBP for the nvram 153 * device, so the lock can be acquired. 154 */ 155 shared_mi2cv_dip = e_ddi_hold_devi_by_path(SHARED_MI2CV_PATH, 0); 156 157 /* 158 * Load the environmentals driver (rmclomv) 159 * 160 * We need this driver to handle events from the RMC when state 161 * changes occur in the environmental data. 162 */ 163 if (i_ddi_attach_hw_nodes("rmc_comm") != DDI_SUCCESS) { 164 cmn_err(CE_WARN, "rmc_comm failed to install"); 165 } else { 166 (void) ddi_hold_driver(ddi_name_to_major("rmc_comm")); 167 168 if (e_ddi_hold_devi_by_path(RMCLOMV_PATHNAME, 0) == NULL) { 169 cmn_err(CE_WARN, "Could not install rmclomv driver\n"); 170 } 171 } 172 173 /* 174 * These two dummy functions are loaded over the original 175 * todm5823 set and clear_power_alarm functions. On Boston, 176 * these functionalities are not supported. 177 * The load_platform_drivers(void) is called from post_startup() 178 * which is after all the initialization of the tod module is 179 * finished, then we replace 2 of the tod_ops function pointers 180 * with our dummy version. 181 */ 182 tod_ops.tod_set_power_alarm = dummy_todm5823_set_power_alarm; 183 tod_ops.tod_clear_power_alarm = dummy_todm5823_clear_power_alarm; 184 185 /* 186 * create a handle to the rmc_comm_request_nowait() function 187 * inside the rmc_comm module. 188 * 189 * The Seattle/Boston todm5823 driver will use this handle to 190 * use the rmc_comm_request_nowait() function to send time/date 191 * updates to ALOM. 192 */ 193 rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) 194 modgetsymvalue("rmc_comm_request_nowait", 0); 195 } 196 197 /* 198 * This routine is needed if a device error or timeout occurs before the 199 * driver is loaded. 200 */ 201 /*ARGSUSED*/ 202 int 203 plat_ide_chipreset(dev_info_t *dip, int chno) 204 { 205 int ret = DDI_SUCCESS; 206 207 if (isa_handle == NULL) { 208 return (DDI_FAILURE); 209 } 210 211 /* 212 * This will be filled in with the reset logic 213 * for the ULI1573 when that becomes available. 214 * currently this is just a stub. 215 */ 216 return (ret); 217 } 218 219 220 /*ARGSUSED*/ 221 int 222 plat_cpu_poweron(struct cpu *cp) 223 { 224 return (ENOTSUP); /* not supported on this platform */ 225 } 226 227 /*ARGSUSED*/ 228 int 229 plat_cpu_poweroff(struct cpu *cp) 230 { 231 return (ENOTSUP); /* not supported on this platform */ 232 } 233 234 /*ARGSUSED*/ 235 void 236 plat_freelist_process(int mnode) 237 { 238 } 239 240 char *platform_module_list[] = { 241 "mi2cv", 242 "pca9556", 243 (char *)0 244 }; 245 246 /*ARGSUSED*/ 247 void 248 plat_tod_fault(enum tod_fault_type tod_bad) 249 { 250 } 251 252 /*ARGSUSED*/ 253 int 254 plat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id, 255 int flt_in_memory, ushort_t flt_status, char *buf, int buflen, int *lenp) 256 { 257 if (flt_in_memory && (p2get_mem_unum != NULL)) 258 return (p2get_mem_unum(synd_code, P2ALIGN(flt_addr, 8), 259 buf, buflen, lenp)); 260 else 261 return (ENOTSUP); 262 } 263 264 /* 265 * This platform hook gets called from mc_add_mem_unum_label() in the mc-us3i 266 * driver giving each platform the opportunity to add platform 267 * specific label information to the unum for ECC error logging purposes. 268 */ 269 /*ARGSUSED*/ 270 void 271 plat_add_mem_unum_label(char *unum, int mcid, int bank, int dimm) 272 { 273 char old_unum[UNUM_NAMLEN]; 274 int printed; 275 int buflen = UNUM_NAMLEN; 276 277 strcpy(old_unum, unum); 278 printed = snprintf(unum, buflen, "MB/C%d/P0/B%d", mcid, bank); 279 buflen -= printed; 280 unum += printed; 281 282 if (dimm != -1) { 283 printed = snprintf(unum, buflen, "/D%d", dimm); 284 buflen -= printed; 285 unum += printed; 286 } 287 288 snprintf(unum, buflen, ": %s", old_unum); 289 } 290 291 /*ARGSUSED*/ 292 int 293 plat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp) 294 { 295 if (snprintf(buf, buflen, "MB/C%d", cpuid) >= buflen) { 296 return (ENOSPC); 297 } else { 298 *lenp = strlen(buf); 299 return (0); 300 } 301 } 302 303 /* 304 * Our nodename has been set, pass it along to the RMC. 305 */ 306 void 307 plat_nodename_set(void) 308 { 309 rmc_comm_msg_t req; /* request */ 310 int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; 311 312 /* 313 * find the symbol for the mailbox routine 314 */ 315 rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) 316 modgetsymvalue("rmc_comm_request_response", 0); 317 318 if (rmc_req_res == NULL) { 319 return; 320 } 321 322 /* 323 * construct the message telling the RMC our nodename 324 */ 325 req.msg_type = DP_SET_CPU_NODENAME; 326 req.msg_len = strlen(utsname.nodename) + 1; 327 req.msg_bytes = 0; 328 req.msg_buf = (caddr_t)utsname.nodename; 329 330 /* 331 * ship it 332 */ 333 (void) (rmc_req_res)(&req, NULL, 2000); 334 } 335 336 sig_state_t current_sgn; 337 338 /* 339 * cpu signatures - we're only interested in the overall system 340 * "signature" on this platform - not individual cpu signatures 341 */ 342 /*ARGSUSED*/ 343 static void 344 cpu_sgn_update(ushort_t sig, uchar_t state, uchar_t sub_state, int cpuid) 345 { 346 dp_cpu_signature_t signature; 347 rmc_comm_msg_t req; /* request */ 348 int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL; 349 int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL; 350 351 352 /* 353 * Differentiate a panic reboot from a non-panic reboot in the 354 * setting of the substate of the signature. 355 * 356 * If the new substate is REBOOT and we're rebooting due to a panic, 357 * then set the new substate to a special value indicating a panic 358 * reboot, SIGSUBST_PANIC_REBOOT. 359 * 360 * A panic reboot is detected by a current (previous) signature 361 * state of SIGST_EXIT, and a new signature substate of SIGSUBST_REBOOT. 362 * The domain signature state SIGST_EXIT is used as the panic flow 363 * progresses. 364 * 365 * At the end of the panic flow, the reboot occurs but we should know 366 * one that was involuntary, something that may be quite useful to know 367 * at OBP level. 368 */ 369 if (state == SIGST_EXIT && sub_state == SIGSUBST_REBOOT) { 370 if (current_sgn.state_t.state == SIGST_EXIT && 371 current_sgn.state_t.sub_state != SIGSUBST_REBOOT) 372 sub_state = SIGSUBST_PANIC_REBOOT; 373 } 374 375 /* 376 * offline and detached states only apply to a specific cpu 377 * so ignore them. 378 */ 379 if (state == SIGST_OFFLINE || state == SIGST_DETACHED) { 380 return; 381 } 382 383 current_sgn.signature = CPU_SIG_BLD(sig, state, sub_state); 384 385 /* 386 * find the symbol for the mailbox routine 387 */ 388 rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t)) 389 modgetsymvalue("rmc_comm_request_response", 0); 390 if (rmc_req_res == NULL) { 391 return; 392 } 393 394 /* 395 * find the symbol for the mailbox routine 396 */ 397 rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t)) 398 modgetsymvalue("rmc_comm_request_nowait", 0); 399 if (rmc_req_now == NULL) { 400 return; 401 } 402 403 signature.cpu_id = -1; 404 signature.sig = sig; 405 signature.states = state; 406 signature.sub_state = sub_state; 407 req.msg_type = DP_SET_CPU_SIGNATURE; 408 req.msg_len = (int)(sizeof (signature)); 409 req.msg_bytes = 0; 410 req.msg_buf = (caddr_t)&signature; 411 412 /* 413 * ship it 414 * - note that for panic or reboot need to send with nowait/urgent 415 */ 416 if (state == SIGST_EXIT && (sub_state == SIGSUBST_HALT || 417 sub_state == SIGSUBST_REBOOT || sub_state == SIGSUBST_ENVIRON || 418 sub_state == SIGSUBST_PANIC_REBOOT)) 419 (void) (rmc_req_now)(&req, RMC_COMM_DREQ_URGENT); 420 else 421 (void) (rmc_req_now)(&req, 0); 422 } 423 424 /* 425 * Fiesta support for lgroups. 426 * 427 * On fiesta platform, an lgroup platform handle == CPU id 428 */ 429 430 /* 431 * Macro for extracting the CPU number from the CPU id 432 */ 433 #define CPUID_TO_LGRP(id) ((id) & 0x7) 434 #define PLATFORM_MC_SHIFT 36 435 436 /* 437 * Return the platform handle for the lgroup containing the given CPU 438 */ 439 void * 440 plat_lgrp_cpu_to_hand(processorid_t id) 441 { 442 return ((void *)(uintptr_t)CPUID_TO_LGRP(id)); 443 } 444 445 /* 446 * Platform specific lgroup initialization 447 */ 448 void 449 plat_lgrp_init(void) 450 { 451 pnode_t curnode; 452 char tmp_name[sizeof (OBP_CPU) + 1]; /* extra padding */ 453 int portid; 454 int cpucnt = 0; 455 int max_portid = -1; 456 extern uint32_t lgrp_expand_proc_thresh; 457 extern uint32_t lgrp_expand_proc_diff; 458 extern pgcnt_t lgrp_mem_free_thresh; 459 extern uint32_t lgrp_loadavg_tolerance; 460 extern uint32_t lgrp_loadavg_max_effect; 461 extern uint32_t lgrp_load_thresh; 462 extern lgrp_mem_policy_t lgrp_mem_policy_root; 463 464 /* 465 * Count the number of CPUs installed to determine if 466 * NUMA optimization should be enabled or not. 467 * 468 * All CPU nodes reside in the root node and have a 469 * device type "cpu". 470 */ 471 curnode = prom_rootnode(); 472 for (curnode = prom_childnode(curnode); curnode; 473 curnode = prom_nextnode(curnode)) { 474 bzero(tmp_name, sizeof (tmp_name)); 475 if (prom_bounded_getprop(curnode, OBP_DEVICETYPE, tmp_name, 476 sizeof (OBP_CPU)) == -1 || strcmp(tmp_name, OBP_CPU) != 0) 477 continue; 478 479 cpucnt++; 480 481 if (prom_getprop(curnode, "portid", (caddr_t)&portid) != 482 -1 && portid > max_portid) 483 max_portid = portid; 484 } 485 if (cpucnt <= 1) 486 max_mem_nodes = 1; 487 else if (max_portid >= 0 && max_portid < MAX_MEM_NODES) 488 max_mem_nodes = max_portid + 1; 489 490 /* 491 * Set tuneables for fiesta architecture 492 * 493 * lgrp_expand_proc_thresh is the minimum load on the lgroups 494 * this process is currently running on before considering 495 * expanding threads to another lgroup. 496 * 497 * lgrp_expand_proc_diff determines how much less the remote lgroup 498 * must be loaded before expanding to it. 499 * 500 * Optimize for memory bandwidth by spreading multi-threaded 501 * program to different lgroups. 502 */ 503 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; 504 lgrp_expand_proc_diff = lgrp_loadavg_max_effect / 2; 505 lgrp_loadavg_tolerance = lgrp_loadavg_max_effect / 2; 506 lgrp_mem_free_thresh = 1; /* home lgrp must have some memory */ 507 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; 508 lgrp_mem_policy_root = LGRP_MEM_POLICY_NEXT; 509 lgrp_load_thresh = 0; 510 511 mem_node_pfn_shift = PLATFORM_MC_SHIFT - MMU_PAGESHIFT; 512 } 513 514 /* 515 * Return latency between "from" and "to" lgroups 516 * 517 * This latency number can only be used for relative comparison 518 * between lgroups on the running system, cannot be used across platforms, 519 * and may not reflect the actual latency. It is platform and implementation 520 * specific, so platform gets to decide its value. It would be nice if the 521 * number was at least proportional to make comparisons more meaningful though. 522 * NOTE: The numbers below are supposed to be load latencies for uncached 523 * memory divided by 10. 524 */ 525 int 526 plat_lgrp_latency(void *from, void *to) 527 { 528 /* 529 * Return remote latency when there are more than two lgroups 530 * (root and child) and getting latency between two different 531 * lgroups or root is involved 532 */ 533 if (lgrp_optimizations() && (from != to || from == 534 (void *) LGRP_DEFAULT_HANDLE || to == (void *) LGRP_DEFAULT_HANDLE)) 535 return (17); 536 else 537 return (12); 538 } 539 540 int 541 plat_pfn_to_mem_node(pfn_t pfn) 542 { 543 ASSERT(max_mem_nodes > 1); 544 return (pfn >> mem_node_pfn_shift); 545 } 546 547 /* 548 * Assign memnode to lgroups 549 */ 550 void 551 plat_fill_mc(pnode_t nodeid) 552 { 553 int portid; 554 555 /* 556 * Memory controller portid == global CPU id 557 */ 558 if ((prom_getprop(nodeid, "portid", (caddr_t)&portid) == -1) || 559 (portid < 0)) 560 return; 561 562 if (portid < max_mem_nodes) 563 plat_assign_lgrphand_to_mem_node((lgrp_handle_t)portid, portid); 564 } 565 566 /* ARGSUSED */ 567 void 568 plat_build_mem_nodes(u_longlong_t *list, size_t nelems) 569 { 570 size_t elem; 571 pfn_t basepfn; 572 pgcnt_t npgs; 573 574 /* 575 * Boot install lists are arranged <addr, len>, <addr, len>, ... 576 */ 577 for (elem = 0; elem < nelems; elem += 2) { 578 basepfn = btop(list[elem]); 579 npgs = btop(list[elem+1]); 580 mem_node_add_slice(basepfn, basepfn + npgs - 1); 581 } 582 } 583 584 /* 585 * Common locking enter code 586 */ 587 void 588 plat_setprop_enter(void) 589 { 590 mutex_enter(&mi2cv_mutex); 591 } 592 593 /* 594 * Common locking exit code 595 */ 596 void 597 plat_setprop_exit(void) 598 { 599 mutex_exit(&mi2cv_mutex); 600 } 601 602 /* 603 * Called by mi2cv driver 604 */ 605 void 606 plat_shared_i2c_enter(dev_info_t *i2cnexus_dip) 607 { 608 if (i2cnexus_dip == shared_mi2cv_dip) { 609 plat_setprop_enter(); 610 } 611 } 612 613 /* 614 * Called by mi2cv driver 615 */ 616 void 617 plat_shared_i2c_exit(dev_info_t *i2cnexus_dip) 618 { 619 if (i2cnexus_dip == shared_mi2cv_dip) { 620 plat_setprop_exit(); 621 } 622 } 623 624 /* 625 * Called by todm5823 driver 626 */ 627 void 628 plat_rmc_comm_req(struct rmc_comm_msg *request) 629 { 630 if (rmc_req_now) 631 (void) rmc_req_now(request, 0); 632 } 633