1d3cf9c7dSdf157793 /* 2d3cf9c7dSdf157793 * CDDL HEADER START 3d3cf9c7dSdf157793 * 4d3cf9c7dSdf157793 * The contents of this file are subject to the terms of the 5f63f7506Sanovick * Common Development and Distribution License (the "License"). 6f63f7506Sanovick * You may not use this file except in compliance with the License. 7d3cf9c7dSdf157793 * 8d3cf9c7dSdf157793 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9d3cf9c7dSdf157793 * or http://www.opensolaris.org/os/licensing. 10d3cf9c7dSdf157793 * See the License for the specific language governing permissions 11d3cf9c7dSdf157793 * and limitations under the License. 12d3cf9c7dSdf157793 * 13d3cf9c7dSdf157793 * When distributing Covered Code, include this CDDL HEADER in each 14d3cf9c7dSdf157793 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15d3cf9c7dSdf157793 * If applicable, add the following below this CDDL HEADER, with the 16d3cf9c7dSdf157793 * fields enclosed by brackets "[]" replaced with your own identifying 17d3cf9c7dSdf157793 * information: Portions Copyright [yyyy] [name of copyright owner] 18d3cf9c7dSdf157793 * 19d3cf9c7dSdf157793 * CDDL HEADER END 20d3cf9c7dSdf157793 */ 21d3cf9c7dSdf157793 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ 22d3cf9c7dSdf157793 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */ 23d3cf9c7dSdf157793 /* All Rights Reserved */ 24d3cf9c7dSdf157793 25d3cf9c7dSdf157793 /* 26*0280efdcSzk194757 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 27d3cf9c7dSdf157793 * Use is subject to license terms. 28d3cf9c7dSdf157793 */ 29d3cf9c7dSdf157793 30d3cf9c7dSdf157793 #ifndef _SYS_SUDEV_H 31d3cf9c7dSdf157793 #define _SYS_SUDEV_H 32d3cf9c7dSdf157793 33d3cf9c7dSdf157793 #pragma ident "%Z%%M% %I% %E% SMI" 34d3cf9c7dSdf157793 35d3cf9c7dSdf157793 #ifdef __cplusplus 36d3cf9c7dSdf157793 extern "C" { 37d3cf9c7dSdf157793 #endif 38d3cf9c7dSdf157793 39d3cf9c7dSdf157793 #include <sys/tty.h> 40d3cf9c7dSdf157793 #include <sys/ksynch.h> 41d3cf9c7dSdf157793 #include <sys/dditypes.h> 42d3cf9c7dSdf157793 #include <sys/types.h> 43d3cf9c7dSdf157793 #include <sys/kstat.h> 44d3cf9c7dSdf157793 45d3cf9c7dSdf157793 /* 46d3cf9c7dSdf157793 * Definitions for INS8250 / 16550 chips 47d3cf9c7dSdf157793 */ 48d3cf9c7dSdf157793 49d3cf9c7dSdf157793 /* defined as offsets from the data register */ 50d3cf9c7dSdf157793 #define DAT 0 /* receive/transmit data */ 51d3cf9c7dSdf157793 #define ICR 1 /* interrupt control register */ 52d3cf9c7dSdf157793 #define ISR 2 /* interrupt status register */ 53d3cf9c7dSdf157793 #define LCR 3 /* line control register */ 54d3cf9c7dSdf157793 #define MCR 4 /* modem control register */ 55d3cf9c7dSdf157793 #define LSR 5 /* line status register */ 56d3cf9c7dSdf157793 #define MSR 6 /* modem status register */ 57f63f7506Sanovick #define SPR 7 /* scratchpad register for ST16C554D */ 58d3cf9c7dSdf157793 #define DLL 0 /* divisor latch (lsb) */ 59d3cf9c7dSdf157793 #define DLH 1 /* divisor latch (msb) */ 60d3cf9c7dSdf157793 #define FIFOR ISR /* FIFO register for 16550 */ 61d3cf9c7dSdf157793 #define OUTB(offset, value) ddi_put8(asy->asy_handle, \ 62d3cf9c7dSdf157793 asy->asy_ioaddr+offset, value) 63d3cf9c7dSdf157793 #define INB(offset) ddi_get8(asy->asy_handle, asy->asy_ioaddr+offset) 64d3cf9c7dSdf157793 65d3cf9c7dSdf157793 /* 66d3cf9c7dSdf157793 * INTEL 8210-A/B & 16450/16550 Registers Structure. 67d3cf9c7dSdf157793 */ 68d3cf9c7dSdf157793 69d3cf9c7dSdf157793 /* Line Control Register */ 70d3cf9c7dSdf157793 #define WLS0 0x01 /* word length select bit 0 */ 71d3cf9c7dSdf157793 #define WLS1 0x02 /* word length select bit 2 */ 72d3cf9c7dSdf157793 #define STB 0x04 /* number of stop bits */ 73d3cf9c7dSdf157793 #define PEN 0x08 /* parity enable */ 74d3cf9c7dSdf157793 #define EPS 0x10 /* even parity select */ 75d3cf9c7dSdf157793 #define SETBREAK 0x40 /* break key */ 76d3cf9c7dSdf157793 #define DLAB 0x80 /* divisor latch access bit */ 77d3cf9c7dSdf157793 #define RXLEN 0x03 /* # of data bits per received/xmitted char */ 78d3cf9c7dSdf157793 #define STOP1 0x00 79d3cf9c7dSdf157793 #define STOP2 0x04 80d3cf9c7dSdf157793 #define PAREN 0x08 81d3cf9c7dSdf157793 #define PAREVN 0x10 82d3cf9c7dSdf157793 #define PARMARK 0x20 83d3cf9c7dSdf157793 #define SNDBRK 0x40 84d3cf9c7dSdf157793 85d3cf9c7dSdf157793 86d3cf9c7dSdf157793 #define BITS5 0x00 /* 5 bits per char */ 87d3cf9c7dSdf157793 #define BITS6 0x01 /* 6 bits per char */ 88d3cf9c7dSdf157793 #define BITS7 0x02 /* 7 bits per char */ 89d3cf9c7dSdf157793 #define BITS8 0x03 /* 8 bits per char */ 90d3cf9c7dSdf157793 91d3cf9c7dSdf157793 /* baud rate definitions */ 92d3cf9c7dSdf157793 #define ASY110 1047 /* 110 baud rate for serial console */ 93d3cf9c7dSdf157793 #define ASY150 768 /* 150 baud rate for serial console */ 94d3cf9c7dSdf157793 #define ASY300 384 /* 300 baud rate for serial console */ 95d3cf9c7dSdf157793 #define ASY600 192 /* 600 baud rate for serial console */ 96d3cf9c7dSdf157793 #define ASY1200 96 /* 1200 baud rate for serial console */ 97d3cf9c7dSdf157793 #define ASY2400 48 /* 2400 baud rate for serial console */ 98d3cf9c7dSdf157793 #define ASY4800 24 /* 4800 baud rate for serial console */ 99d3cf9c7dSdf157793 #define ASY9600 12 /* 9600 baud rate for serial console */ 100d3cf9c7dSdf157793 101d3cf9c7dSdf157793 /* Line Status Register */ 102d3cf9c7dSdf157793 #define RCA 0x01 /* data ready */ 103d3cf9c7dSdf157793 #define OVRRUN 0x02 /* overrun error */ 104d3cf9c7dSdf157793 #define PARERR 0x04 /* parity error */ 105d3cf9c7dSdf157793 #define FRMERR 0x08 /* framing error */ 106d3cf9c7dSdf157793 #define BRKDET 0x10 /* a break has arrived */ 107d3cf9c7dSdf157793 #define XHRE 0x20 /* tx hold reg is now empty */ 108d3cf9c7dSdf157793 #define XSRE 0x40 /* tx shift reg is now empty */ 109d3cf9c7dSdf157793 #define RFBE 0x80 /* rx FIFO Buffer error */ 110d3cf9c7dSdf157793 111d3cf9c7dSdf157793 /* Interrupt Id Regisger */ 112d3cf9c7dSdf157793 #define MSTATUS 0x00 /* modem status changed */ 113d3cf9c7dSdf157793 #define NOINTERRUPT 0x01 /* no interrupt pending */ 114d3cf9c7dSdf157793 #define TxRDY 0x02 /* Transmitter Holding Register Empty */ 115d3cf9c7dSdf157793 #define RxRDY 0x04 /* Receiver Data Available */ 116d3cf9c7dSdf157793 #define FFTMOUT 0x0c /* FIFO timeout - 16550AF */ 117d3cf9c7dSdf157793 #define RSTATUS 0x06 /* Receiver Line Status */ 118d3cf9c7dSdf157793 119d3cf9c7dSdf157793 /* Interrupt Enable Register */ 120d3cf9c7dSdf157793 #define RIEN 0x01 /* Received Data Ready */ 121d3cf9c7dSdf157793 #define TIEN 0x02 /* Tx Hold Register Empty */ 122d3cf9c7dSdf157793 #define SIEN 0x04 /* Receiver Line Status */ 123d3cf9c7dSdf157793 #define MIEN 0x08 /* Modem Status */ 124d3cf9c7dSdf157793 125d3cf9c7dSdf157793 /* Modem Control Register */ 126d3cf9c7dSdf157793 #define DTR 0x01 /* Data Terminal Ready */ 127d3cf9c7dSdf157793 #define RTS 0x02 /* Request To Send */ 128d3cf9c7dSdf157793 #define OUT1 0x04 /* Aux output - not used */ 129d3cf9c7dSdf157793 #define OUT2 0x08 /* dis/enable int per INO on ALI1535D+ */ 130d3cf9c7dSdf157793 #define ASY_LOOP 0x10 /* loopback for diagnostics */ 131d3cf9c7dSdf157793 132d3cf9c7dSdf157793 /* Modem Status Register */ 133d3cf9c7dSdf157793 #define DCTS 0x01 /* Delta Clear To Send */ 134d3cf9c7dSdf157793 #define DDSR 0x02 /* Delta Data Set Ready */ 135d3cf9c7dSdf157793 #define DRI 0x04 /* Trail Edge Ring Indicator */ 136d3cf9c7dSdf157793 #define DDCD 0x08 /* Delta Data Carrier Detect */ 137d3cf9c7dSdf157793 #define CTS 0x10 /* Clear To Send */ 138d3cf9c7dSdf157793 #define DSR 0x20 /* Data Set Ready */ 139d3cf9c7dSdf157793 #define RI 0x40 /* Ring Indicator */ 140d3cf9c7dSdf157793 #define DCD 0x80 /* Data Carrier Detect */ 141d3cf9c7dSdf157793 142d3cf9c7dSdf157793 #define DELTAS(x) ((x)&(DCTS|DDSR|DRI|DDCD)) 143d3cf9c7dSdf157793 #define STATES(x) ((x)(CTS|DSR|RI|DCD)) 144d3cf9c7dSdf157793 145d3cf9c7dSdf157793 /* flags for FCR (FIFO Control register) */ 146d3cf9c7dSdf157793 #define FIFO_OFF 0x00 /* fifo disabled */ 147d3cf9c7dSdf157793 #define FIFO_ON 0x01 /* fifo enabled */ 148d3cf9c7dSdf157793 #define FIFOEN 0x8f /* fifo enabled, w/ 8 byte trigger */ 149d3cf9c7dSdf157793 #define FIFORCLR 0x8b /* Clear receiver FIFO only */ 150d3cf9c7dSdf157793 151d3cf9c7dSdf157793 #define FIFORXFLSH 0x02 /* flush receiver FIFO */ 152d3cf9c7dSdf157793 #define FIFOTXFLSH 0x04 /* flush transmitter FIFO */ 153d3cf9c7dSdf157793 #define FIFODMA 0x08 /* DMA mode 1 */ 154d3cf9c7dSdf157793 #define FIFO_TRIG_1 0x00 /* 1 byte trigger level */ 155d3cf9c7dSdf157793 #define FIFO_TRIG_4 0x40 /* 4 byte trigger level */ 156d3cf9c7dSdf157793 #define FIFO_TRIG_8 0x80 /* 8 byte trigger level */ 157d3cf9c7dSdf157793 #define FIFO_TRIG_14 0xC0 /* 14 byte trigger level */ 158d3cf9c7dSdf157793 159d3cf9c7dSdf157793 /* 160d3cf9c7dSdf157793 * Defines for ioctl calls (VP/ix) 161d3cf9c7dSdf157793 */ 162d3cf9c7dSdf157793 163d3cf9c7dSdf157793 #define AIOC ('A'<<8) 164d3cf9c7dSdf157793 #define AIOCINTTYPE (AIOC|60) /* set interrupt type */ 165d3cf9c7dSdf157793 #define AIOCDOSMODE (AIOC|61) /* set DOS mode */ 166d3cf9c7dSdf157793 #define AIOCNONDOSMODE (AIOC|62) /* reset DOS mode */ 167d3cf9c7dSdf157793 #define AIOCSERIALOUT (AIOC|63) /* serial device data write */ 168d3cf9c7dSdf157793 #define AIOCSERIALIN (AIOC|64) /* serial device data read */ 169d3cf9c7dSdf157793 #define AIOCSETSS (AIOC|65) /* set start/stop chars */ 170d3cf9c7dSdf157793 #define AIOCINFO (AIOC|66) /* tell usr what device we are */ 171d3cf9c7dSdf157793 172d3cf9c7dSdf157793 /* Ioctl alternate names used by VP/ix */ 173d3cf9c7dSdf157793 #define VPC_SERIAL_DOS AIOCDOSMODE 174d3cf9c7dSdf157793 #define VPC_SERIAL_NONDOS AIOCNONDOSMODE 175d3cf9c7dSdf157793 #define VPC_SERIAL_INFO AIOCINFO 176d3cf9c7dSdf157793 #define VPC_SERIAL_OUT AIOCSERIALOUT 177d3cf9c7dSdf157793 #define VPC_SERIAL_IN AIOCSERIALIN 178d3cf9c7dSdf157793 179d3cf9c7dSdf157793 /* Serial in/out requests */ 180d3cf9c7dSdf157793 #define SO_DIVLLSB 1 181d3cf9c7dSdf157793 #define SO_DIVLMSB 2 182d3cf9c7dSdf157793 #define SO_LCR 3 183d3cf9c7dSdf157793 #define SO_MCR 4 184d3cf9c7dSdf157793 #define SI_MSR 1 185d3cf9c7dSdf157793 #define SIO_MASK(elem) (1<<((elem)-1)) 186d3cf9c7dSdf157793 187d3cf9c7dSdf157793 #define OVERRUN 040000 188d3cf9c7dSdf157793 #define FRERROR 020000 189d3cf9c7dSdf157793 #define PERROR 010000 190d3cf9c7dSdf157793 #define S_ERRORS (PERROR|OVERRUN|FRERROR) 191d3cf9c7dSdf157793 192d3cf9c7dSdf157793 /* 193d3cf9c7dSdf157793 * Ring buffer and async line management definitions. 194d3cf9c7dSdf157793 */ 195d3cf9c7dSdf157793 #define RINGBITS 16 /* # of bits in ring ptrs */ 196d3cf9c7dSdf157793 #define RINGSIZE (1<<RINGBITS) /* size of ring */ 197d3cf9c7dSdf157793 #define RINGMASK (RINGSIZE-1) 198d3cf9c7dSdf157793 #define RINGFRAC 12 /* fraction of ring to force flush */ 199d3cf9c7dSdf157793 200d3cf9c7dSdf157793 #define RING_INIT(ap) ((ap)->async_rput = (ap)->async_rget = 0) 201d3cf9c7dSdf157793 #define RING_CNT(ap) (((ap)->async_rput - (ap)->async_rget) & RINGMASK) 202d3cf9c7dSdf157793 #define RING_FRAC(ap) ((int)RING_CNT(ap) >= (int)(RINGSIZE/RINGFRAC)) 203d3cf9c7dSdf157793 #define RING_POK(ap, n) ((int)RING_CNT(ap) < (int)(RINGSIZE-(n))) 204d3cf9c7dSdf157793 #define RING_PUT(ap, c) \ 205d3cf9c7dSdf157793 ((ap)->async_ring[(ap)->async_rput++ & RINGMASK] = (uchar_t)(c)) 206d3cf9c7dSdf157793 #define RING_UNPUT(ap) ((ap)->async_rput--) 207d3cf9c7dSdf157793 #define RING_GOK(ap, n) ((int)RING_CNT(ap) >= (int)(n)) 208d3cf9c7dSdf157793 #define RING_GET(ap) ((ap)->async_ring[(ap)->async_rget++ & RINGMASK]) 209d3cf9c7dSdf157793 #define RING_EAT(ap, n) ((ap)->async_rget += (n)) 210d3cf9c7dSdf157793 #define RING_MARK(ap, c, s) \ 211d3cf9c7dSdf157793 ((ap)->async_ring[(ap)->async_rput++ & RINGMASK] = ((uchar_t)(c)|(s))) 212d3cf9c7dSdf157793 #define RING_UNMARK(ap) \ 213d3cf9c7dSdf157793 ((ap)->async_ring[((ap)->async_rget) & RINGMASK] &= ~S_ERRORS) 214d3cf9c7dSdf157793 #define RING_ERR(ap, c) \ 215d3cf9c7dSdf157793 ((ap)->async_ring[((ap)->async_rget) & RINGMASK] & (c)) 216d3cf9c7dSdf157793 217d3cf9c7dSdf157793 /* 218d3cf9c7dSdf157793 * Serial kstats structure and macro to increment an individual kstat 219d3cf9c7dSdf157793 */ 220d3cf9c7dSdf157793 struct serial_kstats { 221d3cf9c7dSdf157793 kstat_named_t ringover; /* ring buffer overflow */ 222d3cf9c7dSdf157793 kstat_named_t siloover; /* silo overflow */ 223d3cf9c7dSdf157793 }; 224d3cf9c7dSdf157793 225d3cf9c7dSdf157793 #define INC64_KSTAT(asy, stat) (asy)->kstats.stat.value.ui64++; 226d3cf9c7dSdf157793 227d3cf9c7dSdf157793 /* 228d3cf9c7dSdf157793 * Hardware channel common data. One structure per port. 229d3cf9c7dSdf157793 * Each of the fields in this structure is required to be protected by a 230d3cf9c7dSdf157793 * mutex lock at the highest priority at which it can be altered. 231d3cf9c7dSdf157793 * The asy_flags, and asy_next fields can be altered by interrupt 232d3cf9c7dSdf157793 * handling code that must be protected by the mutex whose handle is 233d3cf9c7dSdf157793 * stored in asy_excl_hi. All others can be protected by the asy_excl 234d3cf9c7dSdf157793 * mutex, which is lower priority and adaptive. 235d3cf9c7dSdf157793 */ 236d3cf9c7dSdf157793 struct asycom { 237d3cf9c7dSdf157793 int asy_flags; /* random flags */ 238d3cf9c7dSdf157793 /* protected by asy_excl_hi lock */ 239d3cf9c7dSdf157793 uint_t asy_hwtype; /* HW type: ASY82510, etc. */ 240d3cf9c7dSdf157793 uint_t asy_use_fifo; /* HW FIFO use it or not ?? */ 241d3cf9c7dSdf157793 uint_t asy_fifo_buf; /* With FIFO = 16, otherwise = 1 */ 242d3cf9c7dSdf157793 uchar_t *asy_ioaddr; /* i/o address of ASY port */ 243d3cf9c7dSdf157793 uint_t asy_vect; /* IRQ number */ 244d3cf9c7dSdf157793 boolean_t suspended; /* TRUE if driver suspended */ 245d3cf9c7dSdf157793 caddr_t asy_priv; /* protocol private data */ 246d3cf9c7dSdf157793 dev_info_t *asy_dip; /* dev_info */ 247d3cf9c7dSdf157793 long asy_unit; /* which port */ 248d3cf9c7dSdf157793 ddi_iblock_cookie_t asy_iblock; 249d3cf9c7dSdf157793 kmutex_t *asy_excl; /* asy adaptive mutex */ 250d3cf9c7dSdf157793 kmutex_t *asy_excl_hi; /* asy spinlock mutex */ 251d3cf9c7dSdf157793 ddi_acc_handle_t asy_handle; /* ddi_get/put handle */ 252d3cf9c7dSdf157793 ushort_t asy_rsc_console; /* RSC console port */ 253d3cf9c7dSdf157793 ushort_t asy_rsc_control; /* RSC control port */ 254d3cf9c7dSdf157793 ushort_t asy_lom_console; /* LOM console port */ 255d3cf9c7dSdf157793 uint_t asy_xmit_count; /* Count the no of xmits in one intr */ 256d3cf9c7dSdf157793 uint_t asy_out_of_band_xmit; /* Out of band xmission */ 257d3cf9c7dSdf157793 uint_t asy_rx_count; /* No. of bytes rx'eved in one intr */ 258d3cf9c7dSdf157793 uchar_t asy_device_type; /* Currently used for this device */ 259d3cf9c7dSdf157793 uchar_t asy_trig_level; /* Receive FIFO trig level */ 260d3cf9c7dSdf157793 kmutex_t *asy_soft_lock; /* soft lock for gaurding softpend. */ 261d3cf9c7dSdf157793 int asysoftpend; /* Flag indicating soft int pending. */ 262d3cf9c7dSdf157793 ddi_softintr_t asy_softintr_id; 263d3cf9c7dSdf157793 ddi_iblock_cookie_t asy_soft_iblock; 264d3cf9c7dSdf157793 int asy_baud_divisor_factor; /* for different chips */ 265d3cf9c7dSdf157793 int asy_ocflags; /* old cflags used in asy_program() */ 266d3cf9c7dSdf157793 uint_t asy_cached_msr; /* a cache for the MSR register */ 267d3cf9c7dSdf157793 int asy_speed_cap; /* maximum baud rate */ 268d3cf9c7dSdf157793 kstat_t *sukstat; /* ptr to serial kstats */ 269d3cf9c7dSdf157793 struct serial_kstats kstats; /* serial kstats structure */ 270d3cf9c7dSdf157793 boolean_t inperim; /* in streams q perimeter */ 271*0280efdcSzk194757 cons_polledio_t polledio; /* polled IO functios */ 272*0280efdcSzk194757 uchar_t polled_icr; /* the value of ICR on start of poll */ 273*0280efdcSzk194757 boolean_t polled_enter; /* if asy_polled_enter was called */ 274d3cf9c7dSdf157793 }; 275d3cf9c7dSdf157793 276d3cf9c7dSdf157793 /* 277d3cf9c7dSdf157793 * Asychronous protocol private data structure for ASY. 278d3cf9c7dSdf157793 * Each of the fields in the structure is required to be protected by 279d3cf9c7dSdf157793 * the lower priority lock except the fields that are set only at 280d3cf9c7dSdf157793 * base level but cleared (with out lock) at interrupt level. 281d3cf9c7dSdf157793 */ 282d3cf9c7dSdf157793 struct asyncline { 283d3cf9c7dSdf157793 int async_flags; /* random flags */ 284d3cf9c7dSdf157793 kcondvar_t async_flags_cv; /* condition variable for flags */ 285d3cf9c7dSdf157793 dev_t async_dev; /* device major/minor numbers */ 286d3cf9c7dSdf157793 mblk_t *async_xmitblk; /* transmit: active msg block */ 287d3cf9c7dSdf157793 struct asycom *async_common; /* device common data */ 288d3cf9c7dSdf157793 tty_common_t async_ttycommon; /* tty driver common data */ 289d3cf9c7dSdf157793 bufcall_id_t async_wbufcid; /* id for pending write-side bufcall */ 290d3cf9c7dSdf157793 timeout_id_t async_polltid; /* softint poll timeout id */ 291d3cf9c7dSdf157793 292d3cf9c7dSdf157793 /* 293d3cf9c7dSdf157793 * The following fields are protected by the asy_excl_hi lock. 294d3cf9c7dSdf157793 * Some, such as async_flowc, are set only at the base level and 295d3cf9c7dSdf157793 * cleared (without the lock) only by the interrupt level. 296d3cf9c7dSdf157793 */ 297d3cf9c7dSdf157793 uchar_t *async_optr; /* output pointer */ 298d3cf9c7dSdf157793 int async_ocnt; /* output count */ 299d3cf9c7dSdf157793 uint_t async_rput; /* producing pointer for input */ 300d3cf9c7dSdf157793 uint_t async_rget; /* consuming pointer for input */ 301d3cf9c7dSdf157793 uchar_t async_flowc; /* flow control char to send */ 302d3cf9c7dSdf157793 303d3cf9c7dSdf157793 /* 304d3cf9c7dSdf157793 * Each character stuffed into the ring has two bytes associated 305d3cf9c7dSdf157793 * with it. The first byte is used to indicate special conditions 306d3cf9c7dSdf157793 * and the second byte is the actual data. The ring buffer 307d3cf9c7dSdf157793 * needs to be defined as ushort_t to accomodate this. 308d3cf9c7dSdf157793 */ 309d3cf9c7dSdf157793 ushort_t async_ring[RINGSIZE]; 310d3cf9c7dSdf157793 311d3cf9c7dSdf157793 short async_break; /* break count */ 312d3cf9c7dSdf157793 313d3cf9c7dSdf157793 union { 314d3cf9c7dSdf157793 struct { 315d3cf9c7dSdf157793 uchar_t _hw; /* overrun (hw) */ 316d3cf9c7dSdf157793 uchar_t _sw; /* overrun (sw) */ 317d3cf9c7dSdf157793 } _a; 318d3cf9c7dSdf157793 ushort_t uover_overrun; 319d3cf9c7dSdf157793 } async_uover; 320d3cf9c7dSdf157793 #define async_overrun async_uover._a.uover_overrun 321d3cf9c7dSdf157793 #define async_hw_overrun async_uover._a._hw 322d3cf9c7dSdf157793 #define async_sw_overrun async_uover._a._sw 323d3cf9c7dSdf157793 short async_ext; /* modem status change count */ 324d3cf9c7dSdf157793 short async_work; /* work to do flag */ 325d3cf9c7dSdf157793 uchar_t async_queue_full; /* Streams Queue Full */ 326d3cf9c7dSdf157793 uchar_t async_ringbuf_overflow; /* when ring buffer overflows */ 327d3cf9c7dSdf157793 timeout_id_t async_timer; /* close drain progress timer */ 328d3cf9c7dSdf157793 }; 329d3cf9c7dSdf157793 330d3cf9c7dSdf157793 /* definitions for async_flags field */ 331d3cf9c7dSdf157793 #define ASYNC_EXCL_OPEN 0x10000000 /* exclusive open */ 332d3cf9c7dSdf157793 #define ASYNC_WOPEN 0x00000001 /* waiting for open to complete */ 333d3cf9c7dSdf157793 #define ASYNC_ISOPEN 0x00000002 /* open is complete */ 334d3cf9c7dSdf157793 #define ASYNC_OUT 0x00000004 /* line being used for dialout */ 335d3cf9c7dSdf157793 #define ASYNC_CARR_ON 0x00000008 /* carrier on last time we looked */ 336d3cf9c7dSdf157793 #define ASYNC_STOPPED 0x00000010 /* output is stopped */ 337d3cf9c7dSdf157793 #define ASYNC_DELAY 0x00000020 /* waiting for delay to finish */ 338d3cf9c7dSdf157793 #define ASYNC_BREAK 0x00000040 /* waiting for break to finish */ 339d3cf9c7dSdf157793 #define ASYNC_BUSY 0x00000080 /* waiting for transmission to finish */ 340d3cf9c7dSdf157793 #define ASYNC_DRAINING 0x00000100 /* waiting for output to drain */ 341d3cf9c7dSdf157793 #define ASYNC_SERVICEIMM 0x00000200 /* queue soft interrupt as soon as */ 342d3cf9c7dSdf157793 #define ASYNC_HW_IN_FLOW 0x00000400 /* input flow control in effect */ 343d3cf9c7dSdf157793 #define ASYNC_HW_OUT_FLW 0x00000800 /* output flow control in effect */ 344d3cf9c7dSdf157793 #define ASYNC_PROGRESS 0x00001000 /* made progress on output effort */ 345d3cf9c7dSdf157793 #define ASYNC_CLOSING 0x00002000 /* closing the stream */ 346d3cf9c7dSdf157793 347d3cf9c7dSdf157793 /* asy_hwtype definitions */ 348d3cf9c7dSdf157793 #define ASY82510 0x1 349d3cf9c7dSdf157793 #define ASY16550AF 0x2 350d3cf9c7dSdf157793 #define ASY8250 0x3 /* 8250 or 16450 or 16550 */ 351f63f7506Sanovick #define ASY16C554D 0x4 /* ST16C554D */ 352d3cf9c7dSdf157793 353d3cf9c7dSdf157793 /* definitions for asy_flags field */ 354d3cf9c7dSdf157793 #define ASY_NEEDSOFT 0x00000001 355d3cf9c7dSdf157793 #define ASY_DOINGSOFT 0x00000002 356d3cf9c7dSdf157793 #define ASY_PPS 0x00000004 357d3cf9c7dSdf157793 #define ASY_PPS_EDGE 0x00000008 358d3cf9c7dSdf157793 #define ASY_IGNORE_CD 0x00000040 359d3cf9c7dSdf157793 360d3cf9c7dSdf157793 /* 361d3cf9c7dSdf157793 * Different devices this driver supports and what it is used to drive 362d3cf9c7dSdf157793 * currently 363d3cf9c7dSdf157793 */ 364d3cf9c7dSdf157793 #define ASY_KEYBOARD 0x01 365d3cf9c7dSdf157793 #define ASY_MOUSE 0x02 366d3cf9c7dSdf157793 #define ASY_SERIAL 0x03 367d3cf9c7dSdf157793 368d3cf9c7dSdf157793 /* 369d3cf9c7dSdf157793 * RSC_DEVICE defines the bit in the minor device number that specifies 370d3cf9c7dSdf157793 * the tty line is to be used for console/controlling a RSC device. 371d3cf9c7dSdf157793 */ 372d3cf9c7dSdf157793 #define RSC_DEVICE (1 << (NBITSMINOR32 - 4)) 373d3cf9c7dSdf157793 374d3cf9c7dSdf157793 /* 375d3cf9c7dSdf157793 * OUTLINE defines the high-order flag bit in the minor device number that 376d3cf9c7dSdf157793 * controls use of a tty line for dialin and dialout simultaneously. 377d3cf9c7dSdf157793 */ 378d3cf9c7dSdf157793 #define OUTLINE (1 << (NBITSMINOR32 - 1)) 379d3cf9c7dSdf157793 #define UNIT(x) (getminor(x) & ~(OUTLINE | RSC_DEVICE)) 380d3cf9c7dSdf157793 381d3cf9c7dSdf157793 /* suggested number of soft state instances */ 382d3cf9c7dSdf157793 #define SU_INITIAL_SOFT_ITEMS 0x02 383d3cf9c7dSdf157793 384d3cf9c7dSdf157793 /* 385d3cf9c7dSdf157793 * ASYSETSOFT macro to pend a soft interrupt if one isn't already pending. 386d3cf9c7dSdf157793 */ 387d3cf9c7dSdf157793 388d3cf9c7dSdf157793 #define ASYSETSOFT(asy) { \ 389d3cf9c7dSdf157793 if (mutex_tryenter(asy->asy_soft_lock)) { \ 390d3cf9c7dSdf157793 asy->asy_flags |= ASY_NEEDSOFT; \ 391d3cf9c7dSdf157793 if (!asy->asysoftpend) { \ 392d3cf9c7dSdf157793 asy->asysoftpend = 1; \ 393d3cf9c7dSdf157793 mutex_exit(asy->asy_soft_lock);\ 394d3cf9c7dSdf157793 ddi_trigger_softintr(asy->asy_softintr_id);\ 395d3cf9c7dSdf157793 } else \ 396d3cf9c7dSdf157793 mutex_exit(asy->asy_soft_lock);\ 397d3cf9c7dSdf157793 } \ 398d3cf9c7dSdf157793 } 399d3cf9c7dSdf157793 400d3cf9c7dSdf157793 #ifdef __cplusplus 401d3cf9c7dSdf157793 } 402d3cf9c7dSdf157793 #endif 403d3cf9c7dSdf157793 404d3cf9c7dSdf157793 #endif /* _SYS_SUDEV_H */ 405