xref: /titanic_52/usr/src/uts/sun4/io/px/px_msiq.h (revision 0a44ef6d9afbfe052a7e975f55ea0d2954b62a82)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_PX_MSIQ_H
27 #define	_SYS_PX_MSIQ_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifdef	__cplusplus
32 extern "C" {
33 #endif
34 
35 /*
36  * MSIQ data structure.
37  */
38 struct px_msiq {
39 	msiqid_t	msiq_id;	/* MSIQ ID */
40 	ushort_t	msiq_state;	/* MSIQ alloc state */
41 	ushort_t	msiq_refcnt;	/* # of MSIQ users */
42 	msiqhead_t	*msiq_base_p;	/* MSIQ base pointer */
43 
44 	/* Fields accessed under interrupt context */
45 	msiqhead_t	msiq_curr_head_index; /* MSIQ Curr head index */
46 	msiqhead_t	msiq_new_head_index; /* MSIQ new head index */
47 	ushort_t	msiq_recs2process; /* # of MSIQ records to process */
48 };
49 
50 #define	MSIQ_STATE_FREE		0x1
51 #define	MSIQ_STATE_INUSE	0x2
52 
53 /*
54  * MSIQ soft state structure.
55  */
56 typedef struct px_msiq_state {
57 	/* Available MSIQs */
58 	uint_t		msiq_cnt;	/* # of MSIQs */
59 	uint_t		msiq_rec_cnt;	/* # of records per MSIQ */
60 	msiqid_t	msiq_1st_msiq_id; /* First MSIQ ID */
61 	devino_t	msiq_1st_devino; /* First devino */
62 
63 	/* MSIQs specific reserved for MSI/Xs */
64 	uint_t		msiq_msi_qcnt;	/* # of MSIQs for MSI/Xs */
65 	msiqid_t	msiq_1st_msi_qid; /* First MSIQ ID for MSI/Xs */
66 	msiqid_t	msiq_next_msi_qid; /* Next MSIQ index for MSI/Xs */
67 
68 	/* MSIQs specific reserved for PCIe messages */
69 	uint_t		msiq_msg_qcnt;	/* # of MSIQs for PCIe msgs */
70 	msiqid_t	msiq_1st_msg_qid; /* First MSIQ ID for PCIe msgs */
71 	msiqid_t	msiq_next_msg_qid; /* Next MSIQ index for PCIe msgs */
72 
73 	px_msiq_t	*msiq_p;	/* Pointer to MSIQs array */
74 	void		*msiq_buf_p; /* Pointer to MSIQs array */
75 	kmutex_t	msiq_mutex;	/* Mutex for MSIQ alloc/free */
76 } px_msiq_state_t;
77 
78 /*
79  * px_msi_eq_to_devino
80  */
81 typedef struct px_msi_eq_to_devino {
82 	int	msi_eq_no;
83 	int	no_msi_eqs;
84 	int	devino_no;
85 } px_msi_eq_to_devino_t;
86 
87 /*
88  * Default MSIQ Configurations
89  */
90 #define	PX_DEFAULT_MSIQ_CNT		36
91 #define	PX_DEFAULT_MSIQ_REC_CNT		128
92 #define	PX_DEFAULT_MSIQ_1ST_MSIQ_ID	0
93 #define	PX_DEFAULT_MSIQ_1ST_DEVINO	24
94 
95 extern	int	px_msiq_attach(px_t *px_p);
96 extern	void	px_msiq_detach(px_t *px_p);
97 extern	void	px_msiq_resume(px_t *px_p);
98 
99 extern	int	px_msiq_alloc(px_t *px_p, msiq_rec_type_t rec_type,
100 		    msiqid_t *msiq_id_p);
101 extern	int	px_msiq_free(px_t *px_p, msiqid_t msiq_id);
102 
103 extern  devino_t px_msiqid_to_devino(px_t *px_p, msiqid_t msiq_id);
104 extern  msiqid_t px_devino_to_msiqid(px_t *px_p, devino_t devino);
105 
106 #ifdef	__cplusplus
107 }
108 #endif
109 
110 #endif	/* _SYS_PX_MSIQ_H */
111