1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ 23 /* All Rights Reserved */ 24 25 /* 26 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 27 * Use is subject to license terms. 28 */ 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/vmparam.h> 35 #include <sys/systm.h> 36 #include <sys/stack.h> 37 #include <sys/frame.h> 38 #include <sys/proc.h> 39 #include <sys/ucontext.h> 40 #include <sys/cpuvar.h> 41 #include <sys/asm_linkage.h> 42 #include <sys/kmem.h> 43 #include <sys/errno.h> 44 #include <sys/bootconf.h> 45 #include <sys/archsystm.h> 46 #include <sys/fpu/fpusystm.h> 47 #include <sys/debug.h> 48 #include <sys/privregs.h> 49 #include <sys/machpcb.h> 50 #include <sys/psr_compat.h> 51 #include <sys/cmn_err.h> 52 #include <sys/asi.h> 53 #include <sys/copyops.h> 54 #include <sys/model.h> 55 #include <sys/panic.h> 56 #include <sys/exec.h> 57 58 /* 59 * modify the lower 32bits of a uint64_t 60 */ 61 #define SET_LOWER_32(all, lower) \ 62 (((uint64_t)(all) & 0xffffffff00000000) | (uint32_t)(lower)) 63 64 #define MEMCPY_FPU_EN 2 /* fprs on and fpu_en == 0 */ 65 66 static uint_t mkpsr(uint64_t tstate, uint32_t fprs); 67 68 #ifdef _SYSCALL32_IMPL 69 static void fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest, 70 const struct fq32 *sfq, struct fq *dfq); 71 #endif /* _SYSCALL32_IMPL */ 72 73 /* 74 * Set floating-point registers. 75 * NOTE: 'lwp' might not correspond to 'curthread' since this is 76 * called from code in /proc to set the registers of another lwp. 77 */ 78 void 79 setfpregs(klwp_t *lwp, fpregset_t *fp) 80 { 81 struct machpcb *mpcb; 82 kfpu_t *pfp; 83 uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL); 84 model_t model = lwp_getdatamodel(lwp); 85 86 mpcb = lwptompcb(lwp); 87 pfp = lwptofpu(lwp); 88 89 /* 90 * This is always true for both "real" fp programs and memcpy fp 91 * programs, because we force fpu_en to MEMCPY_FPU_EN in getfpregs, 92 * for the memcpy and threads cases where (fpu_en == 0) && 93 * (fpu_fprs & FPRS_FEF), if setfpregs is called after getfpregs. 94 */ 95 if (fp->fpu_en) { 96 kpreempt_disable(); 97 98 if (!(pfp->fpu_en) && (!(pfp->fpu_fprs & FPRS_FEF)) && 99 fpu_exists) { 100 /* 101 * He's not currently using the FPU but wants to in his 102 * new context - arrange for this on return to userland. 103 */ 104 pfp->fpu_fprs = (uint32_t)fprs; 105 } 106 /* 107 * Get setfpregs to restore fpu_en to zero 108 * for the memcpy/threads case (where pfp->fpu_en == 0 && 109 * (pfp->fp_fprs & FPRS_FEF) == FPRS_FEF). 110 */ 111 if (fp->fpu_en == MEMCPY_FPU_EN) 112 fp->fpu_en = 0; 113 114 /* 115 * Load up a user's floating point context. 116 */ 117 if (fp->fpu_qcnt > MAXFPQ) /* plug security holes */ 118 fp->fpu_qcnt = MAXFPQ; 119 fp->fpu_q_entrysize = sizeof (struct fq); 120 121 /* 122 * For v9 kernel, copy all of the fp regs. 123 * For v8 kernel, copy v8 fp regs (lower half of v9 fp regs). 124 * Restore entire fsr for v9, only lower half for v8. 125 */ 126 (void) kcopy(fp, pfp, sizeof (fp->fpu_fr)); 127 if (model == DATAMODEL_LP64) 128 pfp->fpu_fsr = fp->fpu_fsr; 129 else 130 pfp->fpu_fsr = SET_LOWER_32(pfp->fpu_fsr, fp->fpu_fsr); 131 pfp->fpu_qcnt = fp->fpu_qcnt; 132 pfp->fpu_q_entrysize = fp->fpu_q_entrysize; 133 pfp->fpu_en = fp->fpu_en; 134 pfp->fpu_q = mpcb->mpcb_fpu_q; 135 if (fp->fpu_qcnt) 136 (void) kcopy(fp->fpu_q, pfp->fpu_q, 137 fp->fpu_qcnt * fp->fpu_q_entrysize); 138 /* FSR ignores these bits on load, so they can not be set */ 139 pfp->fpu_fsr &= ~(FSR_QNE|FSR_FTT); 140 141 /* 142 * If not the current process then resume() will handle it. 143 */ 144 if (lwp != ttolwp(curthread)) { 145 /* force resume to reload fp regs */ 146 pfp->fpu_fprs |= FPRS_FEF; 147 kpreempt_enable(); 148 return; 149 } 150 151 /* 152 * Load up FPU with new floating point context. 153 */ 154 if (fpu_exists) { 155 pfp->fpu_fprs = _fp_read_fprs(); 156 if ((pfp->fpu_fprs & FPRS_FEF) != FPRS_FEF) { 157 _fp_write_fprs(fprs); 158 pfp->fpu_fprs = (uint32_t)fprs; 159 #ifdef DEBUG 160 if (fpdispr) 161 cmn_err(CE_NOTE, 162 "setfpregs with fp disabled!\n"); 163 #endif 164 } 165 /* 166 * Load all fp regs for v9 user programs, but only 167 * load the lower half for v8[plus] programs. 168 */ 169 if (model == DATAMODEL_LP64) 170 fp_restore(pfp); 171 else 172 fp_v8_load(pfp); 173 } 174 175 kpreempt_enable(); 176 } else { 177 if ((pfp->fpu_en) || /* normal fp case */ 178 (pfp->fpu_fprs & FPRS_FEF)) { /* memcpy/threads case */ 179 /* 180 * Currently the lwp has floating point enabled. 181 * Turn off FPRS_FEF in user's fprs, saved and 182 * real copies thereof. 183 */ 184 pfp->fpu_en = 0; 185 if (fpu_exists) { 186 fprs = 0; 187 if (lwp == ttolwp(curthread)) 188 _fp_write_fprs(fprs); 189 pfp->fpu_fprs = (uint32_t)fprs; 190 } 191 } 192 } 193 } 194 195 #ifdef _SYSCALL32_IMPL 196 void 197 setfpregs32(klwp_t *lwp, fpregset32_t *fp) 198 { 199 fpregset_t fpregs; 200 201 fpuregset_32ton(fp, &fpregs, NULL, NULL); 202 setfpregs(lwp, &fpregs); 203 } 204 #endif /* _SYSCALL32_IMPL */ 205 206 /* 207 * NOTE: 'lwp' might not correspond to 'curthread' since this is 208 * called from code in /proc to set the registers of another lwp. 209 */ 210 void 211 run_fpq(klwp_t *lwp, fpregset_t *fp) 212 { 213 /* 214 * If the context being loaded up includes a floating queue, 215 * we need to simulate those instructions (since we can't reload 216 * the fpu) and pass the process any appropriate signals 217 */ 218 219 if (lwp == ttolwp(curthread)) { 220 if (fpu_exists) { 221 if (fp->fpu_qcnt) 222 fp_runq(lwp->lwp_regs); 223 } 224 } 225 } 226 227 /* 228 * Get floating-point registers. 229 * NOTE: 'lwp' might not correspond to 'curthread' since this is 230 * called from code in /proc to set the registers of another lwp. 231 */ 232 void 233 getfpregs(klwp_t *lwp, fpregset_t *fp) 234 { 235 kfpu_t *pfp; 236 model_t model = lwp_getdatamodel(lwp); 237 238 pfp = lwptofpu(lwp); 239 kpreempt_disable(); 240 if (fpu_exists && ttolwp(curthread) == lwp) 241 pfp->fpu_fprs = _fp_read_fprs(); 242 243 /* 244 * First check the fpu_en case, for normal fp programs. 245 * Next check the fprs case, for fp use by memcpy/threads. 246 */ 247 if (((fp->fpu_en = pfp->fpu_en) != 0) || 248 (pfp->fpu_fprs & FPRS_FEF)) { 249 /* 250 * Force setfpregs to restore the fp context in 251 * setfpregs for the memcpy and threads cases (where 252 * pfp->fpu_en == 0 && (pfp->fp_fprs & FPRS_FEF) == FPRS_FEF). 253 */ 254 if (pfp->fpu_en == 0) 255 fp->fpu_en = MEMCPY_FPU_EN; 256 /* 257 * If we have an fpu and the current thread owns the fp 258 * context, flush fp * registers into the pcb. Save all 259 * the fp regs for v9, xregs_getfpregs saves the upper half 260 * for v8plus. Save entire fsr for v9, only lower half for v8. 261 */ 262 if (fpu_exists && ttolwp(curthread) == lwp) { 263 if ((pfp->fpu_fprs & FPRS_FEF) != FPRS_FEF) { 264 uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL); 265 266 _fp_write_fprs(fprs); 267 pfp->fpu_fprs = fprs; 268 #ifdef DEBUG 269 if (fpdispr) 270 cmn_err(CE_NOTE, 271 "getfpregs with fp disabled!\n"); 272 #endif 273 } 274 if (model == DATAMODEL_LP64) 275 fp_fksave(pfp); 276 else 277 fp_v8_fksave(pfp); 278 } 279 (void) kcopy(pfp, fp, sizeof (fp->fpu_fr)); 280 fp->fpu_q = pfp->fpu_q; 281 if (model == DATAMODEL_LP64) 282 fp->fpu_fsr = pfp->fpu_fsr; 283 else 284 fp->fpu_fsr = (uint32_t)pfp->fpu_fsr; 285 fp->fpu_qcnt = pfp->fpu_qcnt; 286 fp->fpu_q_entrysize = pfp->fpu_q_entrysize; 287 } else { 288 int i; 289 for (i = 0; i < 32; i++) /* NaN */ 290 ((uint32_t *)fp->fpu_fr.fpu_regs)[i] = (uint32_t)-1; 291 if (model == DATAMODEL_LP64) { 292 for (i = 16; i < 32; i++) /* NaN */ 293 ((uint64_t *)fp->fpu_fr.fpu_dregs)[i] = 294 (uint64_t)-1; 295 } 296 fp->fpu_fsr = 0; 297 fp->fpu_qcnt = 0; 298 } 299 kpreempt_enable(); 300 } 301 302 #ifdef _SYSCALL32_IMPL 303 void 304 getfpregs32(klwp_t *lwp, fpregset32_t *fp) 305 { 306 fpregset_t fpregs; 307 308 getfpregs(lwp, &fpregs); 309 fpuregset_nto32(&fpregs, fp, NULL); 310 } 311 #endif /* _SYSCALL32_IMPL */ 312 313 /* 314 * Set general registers. 315 * NOTE: 'lwp' might not correspond to 'curthread' since this is 316 * called from code in /proc to set the registers of another lwp. 317 */ 318 319 /* 64-bit gregset_t */ 320 void 321 setgregs(klwp_t *lwp, gregset_t grp) 322 { 323 struct regs *rp = lwptoregs(lwp); 324 kfpu_t *fp = lwptofpu(lwp); 325 uint64_t tbits; 326 327 int current = (lwp == curthread->t_lwp); 328 329 if (current) 330 (void) save_syscall_args(); /* copy the args first */ 331 332 tbits = (((grp[REG_CCR] & TSTATE_CCR_MASK) << TSTATE_CCR_SHIFT) | 333 ((grp[REG_ASI] & TSTATE_ASI_MASK) << TSTATE_ASI_SHIFT)); 334 rp->r_tstate &= ~(((uint64_t)TSTATE_CCR_MASK << TSTATE_CCR_SHIFT) | 335 ((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT)); 336 rp->r_tstate |= tbits; 337 kpreempt_disable(); 338 fp->fpu_fprs = (uint32_t)grp[REG_FPRS]; 339 if (fpu_exists && (current) && (fp->fpu_fprs & FPRS_FEF)) 340 _fp_write_fprs(fp->fpu_fprs); 341 kpreempt_enable(); 342 343 /* 344 * pc and npc must be 4-byte aligned on sparc. 345 * We silently make it so to avoid a watchdog reset. 346 */ 347 rp->r_pc = grp[REG_PC] & ~03L; 348 rp->r_npc = grp[REG_nPC] & ~03L; 349 rp->r_y = grp[REG_Y]; 350 351 rp->r_g1 = grp[REG_G1]; 352 rp->r_g2 = grp[REG_G2]; 353 rp->r_g3 = grp[REG_G3]; 354 rp->r_g4 = grp[REG_G4]; 355 rp->r_g5 = grp[REG_G5]; 356 rp->r_g6 = grp[REG_G6]; 357 rp->r_g7 = grp[REG_G7]; 358 359 rp->r_o0 = grp[REG_O0]; 360 rp->r_o1 = grp[REG_O1]; 361 rp->r_o2 = grp[REG_O2]; 362 rp->r_o3 = grp[REG_O3]; 363 rp->r_o4 = grp[REG_O4]; 364 rp->r_o5 = grp[REG_O5]; 365 rp->r_o6 = grp[REG_O6]; 366 rp->r_o7 = grp[REG_O7]; 367 368 if (current) { 369 /* 370 * This was called from a system call, but we 371 * do not want to return via the shared window; 372 * restoring the CPU context changes everything. 373 */ 374 lwp->lwp_eosys = JUSTRETURN; 375 curthread->t_post_sys = 1; 376 } 377 } 378 379 /* 380 * Return the general registers. 381 * NOTE: 'lwp' might not correspond to 'curthread' since this is 382 * called from code in /proc to get the registers of another lwp. 383 */ 384 void 385 getgregs(klwp_t *lwp, gregset_t grp) 386 { 387 struct regs *rp = lwptoregs(lwp); 388 uint32_t fprs; 389 390 kpreempt_disable(); 391 if (fpu_exists && ttolwp(curthread) == lwp) { 392 fprs = _fp_read_fprs(); 393 } else { 394 kfpu_t *fp = lwptofpu(lwp); 395 fprs = fp->fpu_fprs; 396 } 397 kpreempt_enable(); 398 grp[REG_CCR] = (rp->r_tstate >> TSTATE_CCR_SHIFT) & TSTATE_CCR_MASK; 399 grp[REG_PC] = rp->r_pc; 400 grp[REG_nPC] = rp->r_npc; 401 grp[REG_Y] = (uint32_t)rp->r_y; 402 grp[REG_G1] = rp->r_g1; 403 grp[REG_G2] = rp->r_g2; 404 grp[REG_G3] = rp->r_g3; 405 grp[REG_G4] = rp->r_g4; 406 grp[REG_G5] = rp->r_g5; 407 grp[REG_G6] = rp->r_g6; 408 grp[REG_G7] = rp->r_g7; 409 grp[REG_O0] = rp->r_o0; 410 grp[REG_O1] = rp->r_o1; 411 grp[REG_O2] = rp->r_o2; 412 grp[REG_O3] = rp->r_o3; 413 grp[REG_O4] = rp->r_o4; 414 grp[REG_O5] = rp->r_o5; 415 grp[REG_O6] = rp->r_o6; 416 grp[REG_O7] = rp->r_o7; 417 grp[REG_ASI] = (rp->r_tstate >> TSTATE_ASI_SHIFT) & TSTATE_ASI_MASK; 418 grp[REG_FPRS] = fprs; 419 } 420 421 void 422 getgregs32(klwp_t *lwp, gregset32_t grp) 423 { 424 struct regs *rp = lwptoregs(lwp); 425 uint32_t fprs; 426 427 kpreempt_disable(); 428 if (fpu_exists && ttolwp(curthread) == lwp) { 429 fprs = _fp_read_fprs(); 430 } else { 431 kfpu_t *fp = lwptofpu(lwp); 432 fprs = fp->fpu_fprs; 433 } 434 kpreempt_enable(); 435 grp[REG_PSR] = mkpsr(rp->r_tstate, fprs); 436 grp[REG_PC] = rp->r_pc; 437 grp[REG_nPC] = rp->r_npc; 438 grp[REG_Y] = rp->r_y; 439 grp[REG_G1] = rp->r_g1; 440 grp[REG_G2] = rp->r_g2; 441 grp[REG_G3] = rp->r_g3; 442 grp[REG_G4] = rp->r_g4; 443 grp[REG_G5] = rp->r_g5; 444 grp[REG_G6] = rp->r_g6; 445 grp[REG_G7] = rp->r_g7; 446 grp[REG_O0] = rp->r_o0; 447 grp[REG_O1] = rp->r_o1; 448 grp[REG_O2] = rp->r_o2; 449 grp[REG_O3] = rp->r_o3; 450 grp[REG_O4] = rp->r_o4; 451 grp[REG_O5] = rp->r_o5; 452 grp[REG_O6] = rp->r_o6; 453 grp[REG_O7] = rp->r_o7; 454 } 455 456 /* 457 * Return the user-level PC. 458 * If in a system call, return the address of the syscall trap. 459 */ 460 greg_t 461 getuserpc() 462 { 463 return (lwptoregs(ttolwp(curthread))->r_pc); 464 } 465 466 /* 467 * Set register windows. 468 */ 469 void 470 setgwins(klwp_t *lwp, gwindows_t *gwins) 471 { 472 struct machpcb *mpcb = lwptompcb(lwp); 473 int wbcnt = gwins->wbcnt; 474 caddr_t sp; 475 int i; 476 struct rwindow32 *rwp; 477 int wbuf_rwindow_size; 478 int is64; 479 480 if (mpcb->mpcb_wstate == WSTATE_USER32) { 481 wbuf_rwindow_size = WINDOWSIZE32; 482 is64 = 0; 483 } else { 484 wbuf_rwindow_size = WINDOWSIZE64; 485 is64 = 1; 486 } 487 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW); 488 mpcb->mpcb_wbcnt = 0; 489 for (i = 0; i < wbcnt; i++) { 490 sp = (caddr_t)gwins->spbuf[i]; 491 mpcb->mpcb_spbuf[i] = sp; 492 rwp = (struct rwindow32 *) 493 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size)); 494 if (is64 && IS_V9STACK(sp)) 495 bcopy(&gwins->wbuf[i], rwp, sizeof (struct rwindow)); 496 else 497 rwindow_nto32(&gwins->wbuf[i], rwp); 498 mpcb->mpcb_wbcnt++; 499 } 500 } 501 502 void 503 setgwins32(klwp_t *lwp, gwindows32_t *gwins) 504 { 505 struct machpcb *mpcb = lwptompcb(lwp); 506 int wbcnt = gwins->wbcnt; 507 caddr_t sp; 508 int i; 509 510 struct rwindow *rwp; 511 int wbuf_rwindow_size; 512 int is64; 513 514 if (mpcb->mpcb_wstate == WSTATE_USER32) { 515 wbuf_rwindow_size = WINDOWSIZE32; 516 is64 = 0; 517 } else { 518 wbuf_rwindow_size = WINDOWSIZE64; 519 is64 = 1; 520 } 521 522 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW); 523 mpcb->mpcb_wbcnt = 0; 524 for (i = 0; i < wbcnt; i++) { 525 sp = (caddr_t)(uintptr_t)gwins->spbuf[i]; 526 mpcb->mpcb_spbuf[i] = sp; 527 rwp = (struct rwindow *) 528 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size)); 529 if (is64 && IS_V9STACK(sp)) 530 rwindow_32ton(&gwins->wbuf[i], rwp); 531 else 532 bcopy(&gwins->wbuf[i], rwp, sizeof (struct rwindow32)); 533 mpcb->mpcb_wbcnt++; 534 } 535 } 536 537 /* 538 * Get register windows. 539 * NOTE: 'lwp' might not correspond to 'curthread' since this is 540 * called from code in /proc to set the registers of another lwp. 541 */ 542 void 543 getgwins(klwp_t *lwp, gwindows_t *gwp) 544 { 545 struct machpcb *mpcb = lwptompcb(lwp); 546 int wbcnt = mpcb->mpcb_wbcnt; 547 caddr_t sp; 548 int i; 549 struct rwindow32 *rwp; 550 int wbuf_rwindow_size; 551 int is64; 552 553 if (mpcb->mpcb_wstate == WSTATE_USER32) { 554 wbuf_rwindow_size = WINDOWSIZE32; 555 is64 = 0; 556 } else { 557 wbuf_rwindow_size = WINDOWSIZE64; 558 is64 = 1; 559 } 560 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW); 561 gwp->wbcnt = wbcnt; 562 for (i = 0; i < wbcnt; i++) { 563 sp = mpcb->mpcb_spbuf[i]; 564 gwp->spbuf[i] = (greg_t *)sp; 565 rwp = (struct rwindow32 *) 566 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size)); 567 if (is64 && IS_V9STACK(sp)) 568 bcopy(rwp, &gwp->wbuf[i], sizeof (struct rwindow)); 569 else 570 rwindow_32ton(rwp, &gwp->wbuf[i]); 571 } 572 } 573 574 void 575 getgwins32(klwp_t *lwp, gwindows32_t *gwp) 576 { 577 struct machpcb *mpcb = lwptompcb(lwp); 578 int wbcnt = mpcb->mpcb_wbcnt; 579 int i; 580 struct rwindow *rwp; 581 int wbuf_rwindow_size; 582 caddr_t sp; 583 int is64; 584 585 if (mpcb->mpcb_wstate == WSTATE_USER32) { 586 wbuf_rwindow_size = WINDOWSIZE32; 587 is64 = 0; 588 } else { 589 wbuf_rwindow_size = WINDOWSIZE64; 590 is64 = 1; 591 } 592 593 ASSERT(wbcnt >= 0 && wbcnt <= SPARC_MAXREGWINDOW); 594 gwp->wbcnt = wbcnt; 595 for (i = 0; i < wbcnt; i++) { 596 sp = mpcb->mpcb_spbuf[i]; 597 rwp = (struct rwindow *) 598 (mpcb->mpcb_wbuf + (i * wbuf_rwindow_size)); 599 gwp->spbuf[i] = (caddr32_t)(uintptr_t)sp; 600 if (is64 && IS_V9STACK(sp)) 601 rwindow_nto32(rwp, &gwp->wbuf[i]); 602 else 603 bcopy(rwp, &gwp->wbuf[i], sizeof (struct rwindow32)); 604 } 605 } 606 607 /* 608 * For things that depend on register state being on the stack, 609 * copy any register windows that get saved into the window buffer 610 * (in the pcb) onto the stack. This normally gets fixed up 611 * before returning to a user program. Callers of this routine 612 * require this to happen immediately because a later kernel 613 * operation depends on window state (like instruction simulation). 614 */ 615 int 616 flush_user_windows_to_stack(caddr_t *psp) 617 { 618 int j, k; 619 caddr_t sp; 620 struct machpcb *mpcb = lwptompcb(ttolwp(curthread)); 621 int err; 622 int error = 0; 623 int wbuf_rwindow_size; 624 int rwindow_size; 625 int stack_align; 626 int watched; 627 628 flush_user_windows(); 629 630 if (mpcb->mpcb_wstate != WSTATE_USER32) 631 wbuf_rwindow_size = WINDOWSIZE64; 632 else 633 wbuf_rwindow_size = WINDOWSIZE32; 634 635 j = mpcb->mpcb_wbcnt; 636 while (j > 0) { 637 sp = mpcb->mpcb_spbuf[--j]; 638 639 if ((mpcb->mpcb_wstate != WSTATE_USER32) && 640 IS_V9STACK(sp)) { 641 sp += V9BIAS64; 642 stack_align = STACK_ALIGN64; 643 rwindow_size = WINDOWSIZE64; 644 } else { 645 /* 646 * Reduce sp to a 32 bit value. This was originally 647 * done by casting down to uint32_t and back up to 648 * caddr_t, but one compiler didn't like that, so the 649 * uintptr_t casts were added. The temporary 32 bit 650 * variable was introduced to avoid depending on all 651 * compilers to generate the desired assembly code for a 652 * quadruple cast in a single expression. 653 */ 654 caddr32_t sp32 = (uint32_t)(uintptr_t)sp; 655 sp = (caddr_t)(uintptr_t)sp32; 656 657 stack_align = STACK_ALIGN32; 658 rwindow_size = WINDOWSIZE32; 659 } 660 if (((uintptr_t)sp & (stack_align - 1)) != 0) 661 continue; 662 663 watched = watch_disable_addr(sp, rwindow_size, S_WRITE); 664 err = xcopyout(mpcb->mpcb_wbuf + 665 (j * wbuf_rwindow_size), sp, rwindow_size); 666 if (err != 0) { 667 if (psp != NULL) { 668 /* 669 * Determine the offending address. 670 * It may not be the stack pointer itself. 671 */ 672 uint_t *kaddr = (uint_t *)(mpcb->mpcb_wbuf + 673 (j * wbuf_rwindow_size)); 674 uint_t *uaddr = (uint_t *)sp; 675 676 for (k = 0; 677 k < rwindow_size / sizeof (int); 678 k++, kaddr++, uaddr++) { 679 if (suword32(uaddr, *kaddr)) 680 break; 681 } 682 683 /* can't happen? */ 684 if (k == rwindow_size / sizeof (int)) 685 uaddr = (uint_t *)sp; 686 687 *psp = (caddr_t)uaddr; 688 } 689 error = err; 690 } else { 691 /* 692 * stack was aligned and copyout succeeded; 693 * move other windows down. 694 */ 695 mpcb->mpcb_wbcnt--; 696 for (k = j; k < mpcb->mpcb_wbcnt; k++) { 697 mpcb->mpcb_spbuf[k] = mpcb->mpcb_spbuf[k+1]; 698 bcopy( 699 mpcb->mpcb_wbuf + 700 ((k+1) * wbuf_rwindow_size), 701 mpcb->mpcb_wbuf + 702 (k * wbuf_rwindow_size), 703 wbuf_rwindow_size); 704 } 705 } 706 if (watched) 707 watch_enable_addr(sp, rwindow_size, S_WRITE); 708 } /* while there are windows in the wbuf */ 709 return (error); 710 } 711 712 static int 713 copy_return_window32(int dotwo) 714 { 715 klwp_t *lwp = ttolwp(curthread); 716 struct machpcb *mpcb = lwptompcb(lwp); 717 struct rwindow32 rwindow32; 718 caddr_t sp1; 719 caddr_t sp2; 720 721 (void) flush_user_windows_to_stack(NULL); 722 if (mpcb->mpcb_rsp[0] == NULL) { 723 /* 724 * Reduce r_sp to a 32 bit value before storing it in sp1. This 725 * was originally done by casting down to uint32_t and back up 726 * to caddr_t, but that generated complaints under one compiler. 727 * The uintptr_t cast was added to address that, and the 728 * temporary 32 bit variable was introduced to avoid depending 729 * on all compilers to generate the desired assembly code for a 730 * triple cast in a single expression. 731 */ 732 caddr32_t sp1_32 = (uint32_t)lwptoregs(lwp)->r_sp; 733 sp1 = (caddr_t)(uintptr_t)sp1_32; 734 735 if ((copyin_nowatch(sp1, &rwindow32, 736 sizeof (struct rwindow32))) == 0) 737 mpcb->mpcb_rsp[0] = sp1; 738 rwindow_32ton(&rwindow32, &mpcb->mpcb_rwin[0]); 739 } 740 mpcb->mpcb_rsp[1] = NULL; 741 if (dotwo && mpcb->mpcb_rsp[0] != NULL && 742 (sp2 = (caddr_t)mpcb->mpcb_rwin[0].rw_fp) != NULL) { 743 if ((copyin_nowatch(sp2, &rwindow32, 744 sizeof (struct rwindow32)) == 0)) 745 mpcb->mpcb_rsp[1] = sp2; 746 rwindow_32ton(&rwindow32, &mpcb->mpcb_rwin[1]); 747 } 748 return (mpcb->mpcb_rsp[0] != NULL); 749 } 750 751 int 752 copy_return_window(int dotwo) 753 { 754 proc_t *p = ttoproc(curthread); 755 klwp_t *lwp; 756 struct machpcb *mpcb; 757 caddr_t sp1; 758 caddr_t sp2; 759 760 if (p->p_model == DATAMODEL_ILP32) 761 return (copy_return_window32(dotwo)); 762 763 lwp = ttolwp(curthread); 764 mpcb = lwptompcb(lwp); 765 (void) flush_user_windows_to_stack(NULL); 766 if (mpcb->mpcb_rsp[0] == NULL) { 767 sp1 = (caddr_t)lwptoregs(lwp)->r_sp + STACK_BIAS; 768 if ((copyin_nowatch(sp1, &mpcb->mpcb_rwin[0], 769 sizeof (struct rwindow)) == 0)) 770 mpcb->mpcb_rsp[0] = sp1 - STACK_BIAS; 771 } 772 mpcb->mpcb_rsp[1] = NULL; 773 if (dotwo && mpcb->mpcb_rsp[0] != NULL && 774 (sp2 = (caddr_t)mpcb->mpcb_rwin[0].rw_fp) != NULL) { 775 sp2 += STACK_BIAS; 776 if ((copyin_nowatch(sp2, &mpcb->mpcb_rwin[1], 777 sizeof (struct rwindow)) == 0)) 778 mpcb->mpcb_rsp[1] = sp2 - STACK_BIAS; 779 } 780 return (mpcb->mpcb_rsp[0] != NULL); 781 } 782 783 /* 784 * Clear registers on exec(2). 785 */ 786 void 787 setregs(uarg_t *args) 788 { 789 struct regs *rp; 790 klwp_t *lwp = ttolwp(curthread); 791 kfpu_t *fpp = lwptofpu(lwp); 792 struct machpcb *mpcb = lwptompcb(lwp); 793 proc_t *p = ttoproc(curthread); 794 795 /* 796 * Initialize user registers. 797 */ 798 (void) save_syscall_args(); /* copy args from registers first */ 799 rp = lwptoregs(lwp); 800 rp->r_g1 = rp->r_g2 = rp->r_g3 = rp->r_g4 = rp->r_g5 = 801 rp->r_g6 = rp->r_o0 = rp->r_o1 = rp->r_o2 = 802 rp->r_o3 = rp->r_o4 = rp->r_o5 = rp->r_o7 = 0; 803 if (p->p_model == DATAMODEL_ILP32) 804 rp->r_tstate = TSTATE_USER32; 805 else 806 rp->r_tstate = TSTATE_USER64; 807 if (!fpu_exists) 808 rp->r_tstate &= ~TSTATE_PEF; 809 rp->r_g7 = args->thrptr; 810 rp->r_pc = args->entry; 811 rp->r_npc = args->entry + 4; 812 rp->r_y = 0; 813 curthread->t_post_sys = 1; 814 lwp->lwp_eosys = JUSTRETURN; 815 lwp->lwp_pcb.pcb_trap0addr = NULL; /* no trap 0 handler */ 816 /* 817 * Clear the fixalignment flag 818 */ 819 p->p_fixalignment = 0; 820 821 /* 822 * Throw out old user windows, init window buf. 823 */ 824 trash_user_windows(); 825 826 if (p->p_model == DATAMODEL_LP64 && 827 mpcb->mpcb_wstate != WSTATE_USER64) { 828 ASSERT(mpcb->mpcb_wbcnt == 0); 829 kmem_free(mpcb->mpcb_wbuf, MAXWIN * sizeof (struct rwindow32)); 830 mpcb->mpcb_wbuf = kmem_alloc(MAXWIN * 831 sizeof (struct rwindow64), KM_SLEEP); 832 ASSERT(((uintptr_t)mpcb->mpcb_wbuf & 7) == 0); 833 mpcb->mpcb_wstate = WSTATE_USER64; 834 } else if (p->p_model == DATAMODEL_ILP32 && 835 mpcb->mpcb_wstate != WSTATE_USER32) { 836 ASSERT(mpcb->mpcb_wbcnt == 0); 837 kmem_free(mpcb->mpcb_wbuf, MAXWIN * sizeof (struct rwindow64)); 838 mpcb->mpcb_wbuf = kmem_alloc(MAXWIN * 839 sizeof (struct rwindow32), KM_SLEEP); 840 mpcb->mpcb_wstate = WSTATE_USER32; 841 } 842 mpcb->mpcb_pa = va_to_pa(mpcb); 843 mpcb->mpcb_wbuf_pa = va_to_pa(mpcb->mpcb_wbuf); 844 845 /* 846 * Here we initialize minimal fpu state. 847 * The rest is done at the first floating 848 * point instruction that a process executes 849 * or by the lib_psr memcpy routines. 850 */ 851 if (fpu_exists) { 852 extern void _fp_write_fprs(unsigned); 853 _fp_write_fprs(0); 854 } 855 fpp->fpu_en = 0; 856 fpp->fpu_fprs = 0; 857 } 858 859 void 860 lwp_swapin(kthread_t *tp) 861 { 862 struct machpcb *mpcb = lwptompcb(ttolwp(tp)); 863 864 mpcb->mpcb_pa = va_to_pa(mpcb); 865 mpcb->mpcb_wbuf_pa = va_to_pa(mpcb->mpcb_wbuf); 866 } 867 868 /* 869 * Construct the execution environment for the user's signal 870 * handler and arrange for control to be given to it on return 871 * to userland. The library code now calls setcontext() to 872 * clean up after the signal handler, so sigret() is no longer 873 * needed. 874 */ 875 int 876 sendsig(int sig, k_siginfo_t *sip, void (*hdlr)()) 877 { 878 /* 879 * 'volatile' is needed to ensure that values are 880 * correct on the error return from on_fault(). 881 */ 882 volatile int minstacksz; /* min stack required to catch signal */ 883 int newstack = 0; /* if true, switching to altstack */ 884 label_t ljb; 885 caddr_t sp; 886 struct regs *volatile rp; 887 klwp_t *lwp = ttolwp(curthread); 888 proc_t *volatile p = ttoproc(curthread); 889 int fpq_size = 0; 890 struct sigframe { 891 struct frame frwin; 892 ucontext_t uc; 893 }; 894 siginfo_t *sip_addr; 895 struct sigframe *volatile fp; 896 ucontext_t *volatile tuc = NULL; 897 char *volatile xregs = NULL; 898 volatile size_t xregs_size = 0; 899 gwindows_t *volatile gwp = NULL; 900 volatile int gwin_size = 0; 901 kfpu_t *fpp; 902 struct machpcb *mpcb; 903 volatile int watched = 0; 904 volatile int watched2 = 0; 905 caddr_t tos; 906 907 /* 908 * Make sure the current last user window has been flushed to 909 * the stack save area before we change the sp. 910 * Restore register window if a debugger modified it. 911 */ 912 (void) flush_user_windows_to_stack(NULL); 913 if (lwp->lwp_pcb.pcb_xregstat != XREGNONE) 914 xregrestore(lwp, 0); 915 916 mpcb = lwptompcb(lwp); 917 rp = lwptoregs(lwp); 918 919 /* 920 * Clear the watchpoint return stack pointers. 921 */ 922 mpcb->mpcb_rsp[0] = NULL; 923 mpcb->mpcb_rsp[1] = NULL; 924 925 minstacksz = sizeof (struct sigframe); 926 927 /* 928 * We know that sizeof (siginfo_t) is stack-aligned: 929 * 128 bytes for ILP32, 256 bytes for LP64. 930 */ 931 if (sip != NULL) 932 minstacksz += sizeof (siginfo_t); 933 934 /* 935 * These two fields are pointed to by ABI structures and may 936 * be of arbitrary length. Size them now so we know how big 937 * the signal frame has to be. 938 */ 939 fpp = lwptofpu(lwp); 940 fpp->fpu_fprs = _fp_read_fprs(); 941 if ((fpp->fpu_en) || (fpp->fpu_fprs & FPRS_FEF)) { 942 fpq_size = fpp->fpu_q_entrysize * fpp->fpu_qcnt; 943 minstacksz += SA(fpq_size); 944 } 945 946 mpcb = lwptompcb(lwp); 947 if (mpcb->mpcb_wbcnt != 0) { 948 gwin_size = (mpcb->mpcb_wbcnt * sizeof (struct rwindow)) + 949 (SPARC_MAXREGWINDOW * sizeof (caddr_t)) + sizeof (long); 950 minstacksz += SA(gwin_size); 951 } 952 953 /* 954 * Extra registers, if support by this platform, may be of arbitrary 955 * length. Size them now so we know how big the signal frame has to be. 956 * For sparcv9 _LP64 user programs, use asrs instead of the xregs. 957 */ 958 minstacksz += SA(xregs_size); 959 960 /* 961 * Figure out whether we will be handling this signal on 962 * an alternate stack specified by the user. Then allocate 963 * and validate the stack requirements for the signal handler 964 * context. on_fault will catch any faults. 965 */ 966 newstack = (sigismember(&u.u_sigonstack, sig) && 967 !(lwp->lwp_sigaltstack.ss_flags & (SS_ONSTACK|SS_DISABLE))); 968 969 tos = (caddr_t)rp->r_sp + STACK_BIAS; 970 /* 971 * Force proper stack pointer alignment, even in the face of a 972 * misaligned stack pointer from user-level before the signal. 973 * Don't use the SA() macro because that rounds up, not down. 974 */ 975 tos = (caddr_t)((uintptr_t)tos & ~(STACK_ALIGN - 1ul)); 976 977 if (newstack != 0) { 978 fp = (struct sigframe *) 979 (SA((uintptr_t)lwp->lwp_sigaltstack.ss_sp) + 980 SA((int)lwp->lwp_sigaltstack.ss_size) - STACK_ALIGN - 981 SA(minstacksz)); 982 } else { 983 /* 984 * If we were unable to flush all register windows to 985 * the stack and we are not now on an alternate stack, 986 * just dump core with a SIGSEGV back in psig(). 987 */ 988 if (sig == SIGSEGV && 989 mpcb->mpcb_wbcnt != 0 && 990 !(lwp->lwp_sigaltstack.ss_flags & SS_ONSTACK)) 991 return (0); 992 fp = (struct sigframe *)(tos - SA(minstacksz)); 993 /* 994 * Could call grow here, but stack growth now handled below 995 * in code protected by on_fault(). 996 */ 997 } 998 sp = (caddr_t)fp + sizeof (struct sigframe); 999 1000 /* 1001 * Make sure process hasn't trashed its stack. 1002 */ 1003 if ((caddr_t)fp >= p->p_usrstack || 1004 (caddr_t)fp + SA(minstacksz) >= p->p_usrstack) { 1005 #ifdef DEBUG 1006 printf("sendsig: bad signal stack cmd=%s, pid=%d, sig=%d\n", 1007 PTOU(p)->u_comm, p->p_pid, sig); 1008 printf("sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n", 1009 (void *)fp, (void *)hdlr, rp->r_pc); 1010 printf("fp above USRSTACK\n"); 1011 #endif 1012 return (0); 1013 } 1014 1015 watched = watch_disable_addr((caddr_t)fp, SA(minstacksz), S_WRITE); 1016 if (on_fault(&ljb)) 1017 goto badstack; 1018 1019 tuc = kmem_alloc(sizeof (ucontext_t), KM_SLEEP); 1020 savecontext(tuc, lwp->lwp_sigoldmask); 1021 1022 /* 1023 * save extra register state if it exists 1024 */ 1025 if (xregs_size != 0) { 1026 xregs_setptr(lwp, tuc, sp); 1027 xregs = kmem_alloc(xregs_size, KM_SLEEP); 1028 xregs_get(lwp, xregs); 1029 copyout_noerr(xregs, sp, xregs_size); 1030 kmem_free(xregs, xregs_size); 1031 xregs = NULL; 1032 sp += SA(xregs_size); 1033 } 1034 1035 copyout_noerr(tuc, &fp->uc, sizeof (*tuc)); 1036 kmem_free(tuc, sizeof (*tuc)); 1037 tuc = NULL; 1038 1039 if (sip != NULL) { 1040 zoneid_t zoneid; 1041 1042 uzero(sp, sizeof (siginfo_t)); 1043 if (SI_FROMUSER(sip) && 1044 (zoneid = p->p_zone->zone_id) != GLOBAL_ZONEID && 1045 zoneid != sip->si_zoneid) { 1046 k_siginfo_t sani_sip = *sip; 1047 sani_sip.si_pid = p->p_zone->zone_zsched->p_pid; 1048 sani_sip.si_uid = 0; 1049 sani_sip.si_ctid = -1; 1050 sani_sip.si_zoneid = zoneid; 1051 copyout_noerr(&sani_sip, sp, sizeof (sani_sip)); 1052 } else { 1053 copyout_noerr(sip, sp, sizeof (*sip)); 1054 } 1055 sip_addr = (siginfo_t *)sp; 1056 sp += sizeof (siginfo_t); 1057 1058 if (sig == SIGPROF && 1059 curthread->t_rprof != NULL && 1060 curthread->t_rprof->rp_anystate) { 1061 /* 1062 * We stand on our head to deal with 1063 * the real time profiling signal. 1064 * Fill in the stuff that doesn't fit 1065 * in a normal k_siginfo structure. 1066 */ 1067 int i = sip->si_nsysarg; 1068 while (--i >= 0) { 1069 sulword_noerr( 1070 (ulong_t *)&sip_addr->si_sysarg[i], 1071 (ulong_t)lwp->lwp_arg[i]); 1072 } 1073 copyout_noerr(curthread->t_rprof->rp_state, 1074 sip_addr->si_mstate, 1075 sizeof (curthread->t_rprof->rp_state)); 1076 } 1077 } else { 1078 sip_addr = (siginfo_t *)NULL; 1079 } 1080 1081 /* 1082 * When flush_user_windows_to_stack() can't save all the 1083 * windows to the stack, it puts them in the lwp's pcb. 1084 */ 1085 if (gwin_size != 0) { 1086 gwp = kmem_alloc(gwin_size, KM_SLEEP); 1087 getgwins(lwp, gwp); 1088 sulword_noerr(&fp->uc.uc_mcontext.gwins, (ulong_t)sp); 1089 copyout_noerr(gwp, sp, gwin_size); 1090 kmem_free(gwp, gwin_size); 1091 gwp = NULL; 1092 sp += SA(gwin_size); 1093 } else 1094 sulword_noerr(&fp->uc.uc_mcontext.gwins, (ulong_t)NULL); 1095 1096 if (fpq_size != 0) { 1097 struct fq *fqp = (struct fq *)sp; 1098 sulword_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, (ulong_t)fqp); 1099 copyout_noerr(mpcb->mpcb_fpu_q, fqp, fpq_size); 1100 1101 /* 1102 * forget the fp queue so that the signal handler can run 1103 * without being harrassed--it will do a setcontext that will 1104 * re-establish the queue if there still is one 1105 * 1106 * NOTE: fp_runq() relies on the qcnt field being zeroed here 1107 * to terminate its processing of the queue after signal 1108 * delivery. 1109 */ 1110 mpcb->mpcb_fpu->fpu_qcnt = 0; 1111 sp += SA(fpq_size); 1112 1113 /* Also, syscall needs to know about this */ 1114 mpcb->mpcb_flags |= FP_TRAPPED; 1115 1116 } else { 1117 sulword_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, (ulong_t)NULL); 1118 suword8_noerr(&fp->uc.uc_mcontext.fpregs.fpu_qcnt, 0); 1119 } 1120 1121 1122 /* 1123 * Since we flushed the user's windows and we are changing his 1124 * stack pointer, the window that the user will return to will 1125 * be restored from the save area in the frame we are setting up. 1126 * We copy in save area for old stack pointer so that debuggers 1127 * can do a proper stack backtrace from the signal handler. 1128 */ 1129 if (mpcb->mpcb_wbcnt == 0) { 1130 watched2 = watch_disable_addr(tos, sizeof (struct rwindow), 1131 S_READ); 1132 ucopy(tos, &fp->frwin, sizeof (struct rwindow)); 1133 } 1134 1135 lwp->lwp_oldcontext = (uintptr_t)&fp->uc; 1136 1137 if (newstack != 0) { 1138 lwp->lwp_sigaltstack.ss_flags |= SS_ONSTACK; 1139 1140 if (lwp->lwp_ustack) { 1141 copyout_noerr(&lwp->lwp_sigaltstack, 1142 (stack_t *)lwp->lwp_ustack, sizeof (stack_t)); 1143 } 1144 } 1145 1146 no_fault(); 1147 mpcb->mpcb_wbcnt = 0; /* let user go on */ 1148 1149 if (watched2) 1150 watch_enable_addr(tos, sizeof (struct rwindow), S_READ); 1151 if (watched) 1152 watch_enable_addr((caddr_t)fp, SA(minstacksz), S_WRITE); 1153 1154 /* 1155 * Set up user registers for execution of signal handler. 1156 */ 1157 rp->r_sp = (uintptr_t)fp - STACK_BIAS; 1158 rp->r_pc = (uintptr_t)hdlr; 1159 rp->r_npc = (uintptr_t)hdlr + 4; 1160 /* make sure %asi is ASI_PNF */ 1161 rp->r_tstate &= ~((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT); 1162 rp->r_tstate |= ((uint64_t)ASI_PNF << TSTATE_ASI_SHIFT); 1163 rp->r_o0 = sig; 1164 rp->r_o1 = (uintptr_t)sip_addr; 1165 rp->r_o2 = (uintptr_t)&fp->uc; 1166 /* 1167 * Don't set lwp_eosys here. sendsig() is called via psig() after 1168 * lwp_eosys is handled, so setting it here would affect the next 1169 * system call. 1170 */ 1171 return (1); 1172 1173 badstack: 1174 no_fault(); 1175 if (watched2) 1176 watch_enable_addr(tos, sizeof (struct rwindow), S_READ); 1177 if (watched) 1178 watch_enable_addr((caddr_t)fp, SA(minstacksz), S_WRITE); 1179 if (tuc) 1180 kmem_free(tuc, sizeof (ucontext_t)); 1181 if (xregs) 1182 kmem_free(xregs, xregs_size); 1183 if (gwp) 1184 kmem_free(gwp, gwin_size); 1185 #ifdef DEBUG 1186 printf("sendsig: bad signal stack cmd=%s, pid=%d, sig=%d\n", 1187 PTOU(p)->u_comm, p->p_pid, sig); 1188 printf("on fault, sigsp = %p, action = %p, upc = 0x%lx\n", 1189 (void *)fp, (void *)hdlr, rp->r_pc); 1190 #endif 1191 return (0); 1192 } 1193 1194 1195 #ifdef _SYSCALL32_IMPL 1196 1197 /* 1198 * Construct the execution environment for the user's signal 1199 * handler and arrange for control to be given to it on return 1200 * to userland. The library code now calls setcontext() to 1201 * clean up after the signal handler, so sigret() is no longer 1202 * needed. 1203 */ 1204 int 1205 sendsig32(int sig, k_siginfo_t *sip, void (*hdlr)()) 1206 { 1207 /* 1208 * 'volatile' is needed to ensure that values are 1209 * correct on the error return from on_fault(). 1210 */ 1211 volatile int minstacksz; /* min stack required to catch signal */ 1212 int newstack = 0; /* if true, switching to altstack */ 1213 label_t ljb; 1214 caddr_t sp; 1215 struct regs *volatile rp; 1216 klwp_t *lwp = ttolwp(curthread); 1217 proc_t *volatile p = ttoproc(curthread); 1218 struct fq32 fpu_q[MAXFPQ]; /* to hold floating queue */ 1219 struct fq32 *dfq = NULL; 1220 size_t fpq_size = 0; 1221 struct sigframe32 { 1222 struct frame32 frwin; 1223 ucontext32_t uc; 1224 }; 1225 struct sigframe32 *volatile fp; 1226 siginfo32_t *sip_addr; 1227 ucontext32_t *volatile tuc = NULL; 1228 char *volatile xregs = NULL; 1229 volatile int xregs_size = 0; 1230 gwindows32_t *volatile gwp = NULL; 1231 volatile size_t gwin_size = 0; 1232 kfpu_t *fpp; 1233 struct machpcb *mpcb; 1234 volatile int watched = 0; 1235 volatile int watched2 = 0; 1236 caddr_t tos; 1237 1238 /* 1239 * Make sure the current last user window has been flushed to 1240 * the stack save area before we change the sp. 1241 * Restore register window if a debugger modified it. 1242 */ 1243 (void) flush_user_windows_to_stack(NULL); 1244 if (lwp->lwp_pcb.pcb_xregstat != XREGNONE) 1245 xregrestore(lwp, 0); 1246 1247 mpcb = lwptompcb(lwp); 1248 rp = lwptoregs(lwp); 1249 1250 /* 1251 * Clear the watchpoint return stack pointers. 1252 */ 1253 mpcb->mpcb_rsp[0] = NULL; 1254 mpcb->mpcb_rsp[1] = NULL; 1255 1256 minstacksz = sizeof (struct sigframe32); 1257 1258 if (sip != NULL) 1259 minstacksz += sizeof (siginfo32_t); 1260 1261 /* 1262 * These two fields are pointed to by ABI structures and may 1263 * be of arbitrary length. Size them now so we know how big 1264 * the signal frame has to be. 1265 */ 1266 fpp = lwptofpu(lwp); 1267 fpp->fpu_fprs = _fp_read_fprs(); 1268 if ((fpp->fpu_en) || (fpp->fpu_fprs & FPRS_FEF)) { 1269 fpq_size = sizeof (struct fpq32) * fpp->fpu_qcnt; 1270 minstacksz += fpq_size; 1271 dfq = fpu_q; 1272 } 1273 1274 mpcb = lwptompcb(lwp); 1275 if (mpcb->mpcb_wbcnt != 0) { 1276 gwin_size = (mpcb->mpcb_wbcnt * sizeof (struct rwindow32)) + 1277 (SPARC_MAXREGWINDOW * sizeof (caddr32_t)) + 1278 sizeof (int32_t); 1279 minstacksz += gwin_size; 1280 } 1281 1282 /* 1283 * Extra registers, if supported by this platform, may be of arbitrary 1284 * length. Size them now so we know how big the signal frame has to be. 1285 */ 1286 xregs_size = xregs_getsize(p); 1287 minstacksz += SA32(xregs_size); 1288 1289 /* 1290 * Figure out whether we will be handling this signal on 1291 * an alternate stack specified by the user. Then allocate 1292 * and validate the stack requirements for the signal handler 1293 * context. on_fault will catch any faults. 1294 */ 1295 newstack = (sigismember(&u.u_sigonstack, sig) && 1296 !(lwp->lwp_sigaltstack.ss_flags & (SS_ONSTACK|SS_DISABLE))); 1297 1298 tos = (void *)(uintptr_t)(uint32_t)rp->r_sp; 1299 /* 1300 * Force proper stack pointer alignment, even in the face of a 1301 * misaligned stack pointer from user-level before the signal. 1302 * Don't use the SA32() macro because that rounds up, not down. 1303 */ 1304 tos = (caddr_t)((uintptr_t)tos & ~(STACK_ALIGN32 - 1ul)); 1305 1306 if (newstack != 0) { 1307 fp = (struct sigframe32 *) 1308 (SA32((uintptr_t)lwp->lwp_sigaltstack.ss_sp) + 1309 SA32((int)lwp->lwp_sigaltstack.ss_size) - 1310 STACK_ALIGN32 - 1311 SA32(minstacksz)); 1312 } else { 1313 /* 1314 * If we were unable to flush all register windows to 1315 * the stack and we are not now on an alternate stack, 1316 * just dump core with a SIGSEGV back in psig(). 1317 */ 1318 if (sig == SIGSEGV && 1319 mpcb->mpcb_wbcnt != 0 && 1320 !(lwp->lwp_sigaltstack.ss_flags & SS_ONSTACK)) 1321 return (0); 1322 fp = (struct sigframe32 *)(tos - SA32(minstacksz)); 1323 /* 1324 * Could call grow here, but stack growth now handled below 1325 * in code protected by on_fault(). 1326 */ 1327 } 1328 sp = (caddr_t)fp + sizeof (struct sigframe32); 1329 1330 /* 1331 * Make sure process hasn't trashed its stack. 1332 */ 1333 if ((caddr_t)fp >= p->p_usrstack || 1334 (caddr_t)fp + SA32(minstacksz) >= p->p_usrstack) { 1335 #ifdef DEBUG 1336 printf("sendsig32: bad signal stack cmd=%s, pid=%d, sig=%d\n", 1337 PTOU(p)->u_comm, p->p_pid, sig); 1338 printf("sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n", 1339 (void *)fp, (void *)hdlr, rp->r_pc); 1340 printf("fp above USRSTACK32\n"); 1341 #endif 1342 return (0); 1343 } 1344 1345 watched = watch_disable_addr((caddr_t)fp, SA32(minstacksz), S_WRITE); 1346 if (on_fault(&ljb)) 1347 goto badstack; 1348 1349 tuc = kmem_alloc(sizeof (ucontext32_t), KM_SLEEP); 1350 savecontext32(tuc, lwp->lwp_sigoldmask, dfq); 1351 1352 /* 1353 * save extra register state if it exists 1354 */ 1355 if (xregs_size != 0) { 1356 xregs_setptr32(lwp, tuc, (caddr32_t)(uintptr_t)sp); 1357 xregs = kmem_alloc(xregs_size, KM_SLEEP); 1358 xregs_get(lwp, xregs); 1359 copyout_noerr(xregs, sp, xregs_size); 1360 kmem_free(xregs, xregs_size); 1361 xregs = NULL; 1362 sp += SA32(xregs_size); 1363 } 1364 1365 copyout_noerr(tuc, &fp->uc, sizeof (*tuc)); 1366 kmem_free(tuc, sizeof (*tuc)); 1367 tuc = NULL; 1368 1369 if (sip != NULL) { 1370 siginfo32_t si32; 1371 zoneid_t zoneid; 1372 1373 siginfo_kto32(sip, &si32); 1374 if (SI_FROMUSER(sip) && 1375 (zoneid = p->p_zone->zone_id) != GLOBAL_ZONEID && 1376 zoneid != sip->si_zoneid) { 1377 si32.si_pid = p->p_zone->zone_zsched->p_pid; 1378 si32.si_uid = 0; 1379 si32.si_ctid = -1; 1380 si32.si_zoneid = zoneid; 1381 } 1382 uzero(sp, sizeof (siginfo32_t)); 1383 copyout_noerr(&si32, sp, sizeof (siginfo32_t)); 1384 sip_addr = (siginfo32_t *)sp; 1385 sp += sizeof (siginfo32_t); 1386 1387 if (sig == SIGPROF && 1388 curthread->t_rprof != NULL && 1389 curthread->t_rprof->rp_anystate) { 1390 /* 1391 * We stand on our head to deal with 1392 * the real time profiling signal. 1393 * Fill in the stuff that doesn't fit 1394 * in a normal k_siginfo structure. 1395 */ 1396 int i = sip->si_nsysarg; 1397 while (--i >= 0) { 1398 suword32_noerr(&sip_addr->si_sysarg[i], 1399 (uint32_t)lwp->lwp_arg[i]); 1400 } 1401 copyout_noerr(curthread->t_rprof->rp_state, 1402 sip_addr->si_mstate, 1403 sizeof (curthread->t_rprof->rp_state)); 1404 } 1405 } else { 1406 sip_addr = NULL; 1407 } 1408 1409 /* 1410 * When flush_user_windows_to_stack() can't save all the 1411 * windows to the stack, it puts them in the lwp's pcb. 1412 */ 1413 if (gwin_size != 0) { 1414 gwp = kmem_alloc(gwin_size, KM_SLEEP); 1415 getgwins32(lwp, gwp); 1416 suword32_noerr(&fp->uc.uc_mcontext.gwins, 1417 (uint32_t)(uintptr_t)sp); 1418 copyout_noerr(gwp, sp, gwin_size); 1419 kmem_free(gwp, gwin_size); 1420 gwp = NULL; 1421 sp += gwin_size; 1422 } else { 1423 suword32_noerr(&fp->uc.uc_mcontext.gwins, (uint32_t)NULL); 1424 } 1425 1426 if (fpq_size != 0) { 1427 /* 1428 * Update the (already copied out) fpu32.fpu_q pointer 1429 * from NULL to the 32-bit address on the user's stack 1430 * where we then copyout the fq32 to. 1431 */ 1432 struct fq32 *fqp = (struct fq32 *)sp; 1433 suword32_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, 1434 (uint32_t)(uintptr_t)fqp); 1435 copyout_noerr(dfq, fqp, fpq_size); 1436 1437 /* 1438 * forget the fp queue so that the signal handler can run 1439 * without being harrassed--it will do a setcontext that will 1440 * re-establish the queue if there still is one 1441 * 1442 * NOTE: fp_runq() relies on the qcnt field being zeroed here 1443 * to terminate its processing of the queue after signal 1444 * delivery. 1445 */ 1446 mpcb->mpcb_fpu->fpu_qcnt = 0; 1447 sp += fpq_size; 1448 1449 /* Also, syscall needs to know about this */ 1450 mpcb->mpcb_flags |= FP_TRAPPED; 1451 1452 } else { 1453 suword32_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, 1454 (uint32_t)NULL); 1455 suword8_noerr(&fp->uc.uc_mcontext.fpregs.fpu_qcnt, 0); 1456 } 1457 1458 1459 /* 1460 * Since we flushed the user's windows and we are changing his 1461 * stack pointer, the window that the user will return to will 1462 * be restored from the save area in the frame we are setting up. 1463 * We copy in save area for old stack pointer so that debuggers 1464 * can do a proper stack backtrace from the signal handler. 1465 */ 1466 if (mpcb->mpcb_wbcnt == 0) { 1467 watched2 = watch_disable_addr(tos, sizeof (struct rwindow32), 1468 S_READ); 1469 ucopy(tos, &fp->frwin, sizeof (struct rwindow32)); 1470 } 1471 1472 lwp->lwp_oldcontext = (uintptr_t)&fp->uc; 1473 1474 if (newstack != 0) { 1475 lwp->lwp_sigaltstack.ss_flags |= SS_ONSTACK; 1476 if (lwp->lwp_ustack) { 1477 stack32_t stk32; 1478 1479 stk32.ss_sp = 1480 (caddr32_t)(uintptr_t)lwp->lwp_sigaltstack.ss_sp; 1481 stk32.ss_size = (size32_t)lwp->lwp_sigaltstack.ss_size; 1482 stk32.ss_flags = (int32_t)lwp->lwp_sigaltstack.ss_flags; 1483 1484 copyout_noerr(&stk32, (stack32_t *)lwp->lwp_ustack, 1485 sizeof (stack32_t)); 1486 } 1487 } 1488 1489 no_fault(); 1490 mpcb->mpcb_wbcnt = 0; /* let user go on */ 1491 1492 if (watched2) 1493 watch_enable_addr(tos, sizeof (struct rwindow32), S_READ); 1494 if (watched) 1495 watch_enable_addr((caddr_t)fp, SA32(minstacksz), S_WRITE); 1496 1497 /* 1498 * Set up user registers for execution of signal handler. 1499 */ 1500 rp->r_sp = (uintptr_t)fp; 1501 rp->r_pc = (uintptr_t)hdlr; 1502 rp->r_npc = (uintptr_t)hdlr + 4; 1503 /* make sure %asi is ASI_PNF */ 1504 rp->r_tstate &= ~((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT); 1505 rp->r_tstate |= ((uint64_t)ASI_PNF << TSTATE_ASI_SHIFT); 1506 rp->r_o0 = sig; 1507 rp->r_o1 = (uintptr_t)sip_addr; 1508 rp->r_o2 = (uintptr_t)&fp->uc; 1509 /* 1510 * Don't set lwp_eosys here. sendsig() is called via psig() after 1511 * lwp_eosys is handled, so setting it here would affect the next 1512 * system call. 1513 */ 1514 return (1); 1515 1516 badstack: 1517 no_fault(); 1518 if (watched2) 1519 watch_enable_addr(tos, sizeof (struct rwindow32), S_READ); 1520 if (watched) 1521 watch_enable_addr((caddr_t)fp, SA32(minstacksz), S_WRITE); 1522 if (tuc) 1523 kmem_free(tuc, sizeof (*tuc)); 1524 if (xregs) 1525 kmem_free(xregs, xregs_size); 1526 if (gwp) 1527 kmem_free(gwp, gwin_size); 1528 #ifdef DEBUG 1529 printf("sendsig32: bad signal stack cmd=%s, pid=%d, sig=%d\n", 1530 PTOU(p)->u_comm, p->p_pid, sig); 1531 printf("on fault, sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n", 1532 (void *)fp, (void *)hdlr, rp->r_pc); 1533 #endif 1534 return (0); 1535 } 1536 1537 #endif /* _SYSCALL32_IMPL */ 1538 1539 1540 /* 1541 * load user registers into lwp. 1542 * thrptr ignored for sparc. 1543 */ 1544 /* ARGSUSED2 */ 1545 void 1546 lwp_load(klwp_t *lwp, gregset_t grp, uintptr_t thrptr) 1547 { 1548 setgregs(lwp, grp); 1549 if (lwptoproc(lwp)->p_model == DATAMODEL_ILP32) 1550 lwptoregs(lwp)->r_tstate = TSTATE_USER32; 1551 else 1552 lwptoregs(lwp)->r_tstate = TSTATE_USER64; 1553 1554 if (!fpu_exists) 1555 lwptoregs(lwp)->r_tstate &= ~TSTATE_PEF; 1556 lwp->lwp_eosys = JUSTRETURN; 1557 lwptot(lwp)->t_post_sys = 1; 1558 } 1559 1560 /* 1561 * set syscall()'s return values for a lwp. 1562 */ 1563 void 1564 lwp_setrval(klwp_t *lwp, int v1, int v2) 1565 { 1566 struct regs *rp = lwptoregs(lwp); 1567 1568 rp->r_tstate &= ~TSTATE_IC; 1569 rp->r_o0 = v1; 1570 rp->r_o1 = v2; 1571 } 1572 1573 /* 1574 * set stack pointer for a lwp 1575 */ 1576 void 1577 lwp_setsp(klwp_t *lwp, caddr_t sp) 1578 { 1579 struct regs *rp = lwptoregs(lwp); 1580 rp->r_sp = (uintptr_t)sp; 1581 } 1582 1583 /* 1584 * Take any PCB specific actions that are required or flagged in the PCB. 1585 */ 1586 extern void trap_async_hwerr(void); 1587 #pragma weak trap_async_hwerr 1588 1589 void 1590 lwp_pcb_exit(void) 1591 { 1592 klwp_t *lwp = ttolwp(curthread); 1593 1594 if (lwp->lwp_pcb.pcb_flags & ASYNC_HWERR) { 1595 trap_async_hwerr(); 1596 } 1597 } 1598 1599 /* 1600 * Invalidate the saved user register windows in the pcb struct 1601 * for the current thread. They will no longer be preserved. 1602 */ 1603 void 1604 lwp_clear_uwin(void) 1605 { 1606 struct machpcb *m = lwptompcb(ttolwp(curthread)); 1607 1608 /* 1609 * This has the effect of invalidating all (any) of the 1610 * user level windows that are currently sitting in the 1611 * kernel buffer. 1612 */ 1613 m->mpcb_wbcnt = 0; 1614 } 1615 1616 static uint_t 1617 mkpsr(uint64_t tstate, uint_t fprs) 1618 { 1619 uint_t psr, icc; 1620 1621 psr = tstate & TSTATE_CWP_MASK; 1622 if (tstate & TSTATE_PRIV) 1623 psr |= PSR_PS; 1624 if (fprs & FPRS_FEF) 1625 psr |= PSR_EF; 1626 icc = (uint_t)(tstate >> PSR_TSTATE_CC_SHIFT) & PSR_ICC; 1627 psr |= icc; 1628 psr |= V9_PSR_IMPLVER; 1629 return (psr); 1630 } 1631 1632 void 1633 sync_icache(caddr_t va, uint_t len) 1634 { 1635 caddr_t end; 1636 1637 end = va + len; 1638 va = (caddr_t)((uintptr_t)va & -8l); /* sparc needs 8-byte align */ 1639 while (va < end) { 1640 doflush(va); 1641 va += 8; 1642 } 1643 } 1644 1645 #ifdef _SYSCALL32_IMPL 1646 1647 /* 1648 * Copy the floating point queue if and only if there is a queue and a place 1649 * to copy it to. Let xregs take care of the other fp regs, for v8plus. 1650 * The issue is that while we are handling the fq32 in sendsig, we 1651 * still need a 64-bit pointer to it, and the caddr32_t in fpregset32_t 1652 * will not suffice, so we have the third parameter to this function. 1653 */ 1654 void 1655 fpuregset_nto32(const fpregset_t *src, fpregset32_t *dest, struct fq32 *dfq) 1656 { 1657 int i; 1658 1659 bzero(dest, sizeof (*dest)); 1660 for (i = 0; i < 32; i++) 1661 dest->fpu_fr.fpu_regs[i] = src->fpu_fr.fpu_regs[i]; 1662 dest->fpu_q = NULL; 1663 dest->fpu_fsr = (uint32_t)src->fpu_fsr; 1664 dest->fpu_qcnt = src->fpu_qcnt; 1665 dest->fpu_q_entrysize = sizeof (struct fpq32); 1666 dest->fpu_en = src->fpu_en; 1667 1668 if ((src->fpu_qcnt) && (dfq != NULL)) { 1669 struct fq *sfq = src->fpu_q; 1670 for (i = 0; i < src->fpu_qcnt; i++, dfq++, sfq++) { 1671 dfq->FQu.fpq.fpq_addr = 1672 (caddr32_t)(uintptr_t)sfq->FQu.fpq.fpq_addr; 1673 dfq->FQu.fpq.fpq_instr = sfq->FQu.fpq.fpq_instr; 1674 } 1675 } 1676 } 1677 1678 /* 1679 * Copy the floating point queue if and only if there is a queue and a place 1680 * to copy it to. Let xregs take care of the other fp regs, for v8plus. 1681 * The *dfq is required to escape the bzero in both this function and in 1682 * ucontext_32ton. The *sfq is required because once the fq32 is copied 1683 * into the kernel, in setcontext, then we need a 64-bit pointer to it. 1684 */ 1685 static void 1686 fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest, 1687 const struct fq32 *sfq, struct fq *dfq) 1688 { 1689 int i; 1690 1691 bzero(dest, sizeof (*dest)); 1692 for (i = 0; i < 32; i++) 1693 dest->fpu_fr.fpu_regs[i] = src->fpu_fr.fpu_regs[i]; 1694 dest->fpu_q = dfq; 1695 dest->fpu_fsr = (uint64_t)src->fpu_fsr; 1696 if ((dest->fpu_qcnt = src->fpu_qcnt) > 0) 1697 dest->fpu_q_entrysize = sizeof (struct fpq); 1698 else 1699 dest->fpu_q_entrysize = 0; 1700 dest->fpu_en = src->fpu_en; 1701 1702 if ((src->fpu_qcnt) && (sfq) && (dfq)) { 1703 for (i = 0; i < src->fpu_qcnt; i++, dfq++, sfq++) { 1704 dfq->FQu.fpq.fpq_addr = 1705 (unsigned int *)(uintptr_t)sfq->FQu.fpq.fpq_addr; 1706 dfq->FQu.fpq.fpq_instr = sfq->FQu.fpq.fpq_instr; 1707 } 1708 } 1709 } 1710 1711 void 1712 ucontext_32ton(const ucontext32_t *src, ucontext_t *dest, 1713 const struct fq32 *sfq, struct fq *dfq) 1714 { 1715 int i; 1716 1717 bzero(dest, sizeof (*dest)); 1718 1719 dest->uc_flags = src->uc_flags; 1720 dest->uc_link = (ucontext_t *)(uintptr_t)src->uc_link; 1721 1722 for (i = 0; i < 4; i++) { 1723 dest->uc_sigmask.__sigbits[i] = src->uc_sigmask.__sigbits[i]; 1724 } 1725 1726 dest->uc_stack.ss_sp = (void *)(uintptr_t)src->uc_stack.ss_sp; 1727 dest->uc_stack.ss_size = (size_t)src->uc_stack.ss_size; 1728 dest->uc_stack.ss_flags = src->uc_stack.ss_flags; 1729 1730 /* REG_CCR is 0, skip over it and handle it after this loop */ 1731 for (i = 1; i < _NGREG32; i++) 1732 dest->uc_mcontext.gregs[i] = 1733 (greg_t)(uint32_t)src->uc_mcontext.gregs[i]; 1734 dest->uc_mcontext.gregs[REG_CCR] = 1735 (src->uc_mcontext.gregs[REG_PSR] & PSR_ICC) >> PSR_ICC_SHIFT; 1736 dest->uc_mcontext.gregs[REG_ASI] = ASI_PNF; 1737 /* 1738 * A valid fpregs is only copied in if (uc.uc_flags & UC_FPU), 1739 * otherwise there is no guarantee that anything in fpregs is valid. 1740 */ 1741 if (src->uc_flags & UC_FPU) { 1742 dest->uc_mcontext.gregs[REG_FPRS] = 1743 ((src->uc_mcontext.fpregs.fpu_en) ? 1744 (FPRS_DU|FPRS_DL|FPRS_FEF) : 0); 1745 } else { 1746 dest->uc_mcontext.gregs[REG_FPRS] = 0; 1747 } 1748 dest->uc_mcontext.gwins = 1749 (gwindows_t *)(uintptr_t)src->uc_mcontext.gwins; 1750 if (src->uc_flags & UC_FPU) { 1751 fpuregset_32ton(&src->uc_mcontext.fpregs, 1752 &dest->uc_mcontext.fpregs, sfq, dfq); 1753 } 1754 } 1755 1756 void 1757 rwindow_nto32(struct rwindow *src, struct rwindow32 *dest) 1758 { 1759 greg_t *s = (greg_t *)src; 1760 greg32_t *d = (greg32_t *)dest; 1761 int i; 1762 1763 for (i = 0; i < 16; i++) 1764 *d++ = (greg32_t)*s++; 1765 } 1766 1767 void 1768 rwindow_32ton(struct rwindow32 *src, struct rwindow *dest) 1769 { 1770 greg32_t *s = (greg32_t *)src; 1771 greg_t *d = (greg_t *)dest; 1772 int i; 1773 1774 for (i = 0; i < 16; i++) 1775 *d++ = (uint32_t)*s++; 1776 } 1777 1778 #endif /* _SYSCALL32_IMPL */ 1779 1780 /* 1781 * The panic code invokes panic_saveregs() to record the contents of a 1782 * regs structure into the specified panic_data structure for debuggers. 1783 */ 1784 void 1785 panic_saveregs(panic_data_t *pdp, struct regs *rp) 1786 { 1787 panic_nv_t *pnv = PANICNVGET(pdp); 1788 1789 PANICNVADD(pnv, "tstate", rp->r_tstate); 1790 PANICNVADD(pnv, "g1", rp->r_g1); 1791 PANICNVADD(pnv, "g2", rp->r_g2); 1792 PANICNVADD(pnv, "g3", rp->r_g3); 1793 PANICNVADD(pnv, "g4", rp->r_g4); 1794 PANICNVADD(pnv, "g5", rp->r_g5); 1795 PANICNVADD(pnv, "g6", rp->r_g6); 1796 PANICNVADD(pnv, "g7", rp->r_g7); 1797 PANICNVADD(pnv, "o0", rp->r_o0); 1798 PANICNVADD(pnv, "o1", rp->r_o1); 1799 PANICNVADD(pnv, "o2", rp->r_o2); 1800 PANICNVADD(pnv, "o3", rp->r_o3); 1801 PANICNVADD(pnv, "o4", rp->r_o4); 1802 PANICNVADD(pnv, "o5", rp->r_o5); 1803 PANICNVADD(pnv, "o6", rp->r_o6); 1804 PANICNVADD(pnv, "o7", rp->r_o7); 1805 PANICNVADD(pnv, "pc", (ulong_t)rp->r_pc); 1806 PANICNVADD(pnv, "npc", (ulong_t)rp->r_npc); 1807 PANICNVADD(pnv, "y", (uint32_t)rp->r_y); 1808 1809 PANICNVSET(pdp, pnv); 1810 } 1811