xref: /titanic_52/usr/src/uts/sparc/sys/cmpregs.h (revision 0eb822a1c0c2bea495647510b75f77f0e57633eb)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_CMPREGS_H
28 #define	_CMPREGS_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 #define	ASI_CMP_SHARED		0x41	/* shared CMP registers */
37 #define	ASI_CMP_PER_CORE	0x63	/* core-local CMP registers */
38 
39 /*
40  * Core ID Register
41  *
42  *   |-----------------------|
43  *   |MAX_CORE_ID|---|CORE_ID|
44  *   |-----------------------|
45  *    21       16     5     0
46  */
47 #define	ASI_CORE_ID		0x10	/* ASI 0x63, VA 0x10 */
48 #define	COREID_MASK		0x3f
49 
50 
51 /*
52  * Error Steering Register
53  *
54  *   |-------|
55  *   |CORE_ID|
56  *   |-------|
57  *    5     0
58  */
59 #define	ASI_CMP_ERROR_STEERING	0x40	/* ASI 0x41, VA 0x40 */
60 
61 /*
62  * Core Running
63  *
64  *   |------------------------------|
65  *   |       |core running (status) |
66  *   |------------------------------|
67  *            1                    0
68  */
69 #define	ASI_CORE_RUNNING_STATUS	0x58	/* ASI 0x41, VA 0x58 */
70 #define	ASI_CORE_RUNNING_RW	0x50	/* ASI 0x41, VA 0x50 */
71 
72 #ifdef	__cplusplus
73 }
74 #endif
75 
76 #endif /* _CMPREGS_H */
77