xref: /titanic_52/usr/src/uts/intel/ia32/os/archdep.c (revision f808c858fa61e7769218966759510a8b1190dfcf)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T	*/
28 /*	  All Rights Reserved  	*/
29 
30 
31 #pragma ident	"%Z%%M%	%I%	%E% SMI"
32 
33 #include <sys/param.h>
34 #include <sys/types.h>
35 #include <sys/vmparam.h>
36 #include <sys/systm.h>
37 #include <sys/signal.h>
38 #include <sys/stack.h>
39 #include <sys/regset.h>
40 #include <sys/privregs.h>
41 #include <sys/frame.h>
42 #include <sys/proc.h>
43 #include <sys/psw.h>
44 #include <sys/siginfo.h>
45 #include <sys/cpuvar.h>
46 #include <sys/asm_linkage.h>
47 #include <sys/kmem.h>
48 #include <sys/errno.h>
49 #include <sys/bootconf.h>
50 #include <sys/archsystm.h>
51 #include <sys/debug.h>
52 #include <sys/elf.h>
53 #include <sys/spl.h>
54 #include <sys/time.h>
55 #include <sys/atomic.h>
56 #include <sys/sysmacros.h>
57 #include <sys/cmn_err.h>
58 #include <sys/modctl.h>
59 #include <sys/kobj.h>
60 #include <sys/panic.h>
61 #include <sys/reboot.h>
62 #include <sys/time.h>
63 #include <sys/fp.h>
64 #include <sys/x86_archext.h>
65 #include <sys/auxv.h>
66 #include <sys/auxv_386.h>
67 #include <sys/dtrace.h>
68 
69 extern const struct fnsave_state x87_initial;
70 extern const struct fxsave_state sse_initial;
71 
72 /*
73  * Map an fnsave-formatted save area into an fxsave-formatted save area.
74  *
75  * Most fields are the same width, content and semantics.  However
76  * the tag word is compressed.
77  */
78 static void
79 fnsave_to_fxsave(const struct fnsave_state *fn, struct fxsave_state *fx)
80 {
81 	uint_t i, tagbits;
82 
83 	fx->fx_fcw = fn->f_fcw;
84 	fx->fx_fsw = fn->f_fsw;
85 
86 	/*
87 	 * copy element by element (because of holes)
88 	 */
89 	for (i = 0; i < 8; i++)
90 		bcopy(&fn->f_st[i].fpr_16[0], &fx->fx_st[i].fpr_16[0],
91 		    sizeof (fn->f_st[0].fpr_16)); /* 80-bit x87-style floats */
92 
93 	/*
94 	 * synthesize compressed tag bits
95 	 */
96 	fx->fx_fctw = 0;
97 	for (tagbits = fn->f_ftw, i = 0; i < 8; i++, tagbits >>= 2)
98 		if ((tagbits & 3) != 3)
99 			fx->fx_fctw |= (1 << i);
100 
101 	fx->fx_fop = fn->f_fop;
102 
103 #if defined(__amd64)
104 	fx->fx_rip = (uint64_t)fn->f_eip;
105 	fx->fx_rdp = (uint64_t)fn->f_dp;
106 #else
107 	fx->fx_eip = fn->f_eip;
108 	fx->fx_cs = fn->f_cs;
109 	fx->__fx_ign0 = 0;
110 	fx->fx_dp = fn->f_dp;
111 	fx->fx_ds = fn->f_ds;
112 	fx->__fx_ign1 = 0;
113 #endif
114 }
115 
116 /*
117  * Map from an fxsave-format save area to an fnsave-format save area.
118  */
119 static void
120 fxsave_to_fnsave(const struct fxsave_state *fx, struct fnsave_state *fn)
121 {
122 	uint_t i, top, tagbits;
123 
124 	fn->f_fcw = fx->fx_fcw;
125 	fn->__f_ign0 = 0;
126 	fn->f_fsw = fx->fx_fsw;
127 	fn->__f_ign1 = 0;
128 
129 	top = (fx->fx_fsw & FPS_TOP) >> 11;
130 
131 	/*
132 	 * copy element by element (because of holes)
133 	 */
134 	for (i = 0; i < 8; i++)
135 		bcopy(&fx->fx_st[i].fpr_16[0], &fn->f_st[i].fpr_16[0],
136 		    sizeof (fn->f_st[0].fpr_16)); /* 80-bit x87-style floats */
137 
138 	/*
139 	 * synthesize uncompressed tag bits
140 	 */
141 	fn->f_ftw = 0;
142 	for (tagbits = fx->fx_fctw, i = 0; i < 8; i++, tagbits >>= 1) {
143 		uint_t ibit, expo;
144 		const uint16_t *fpp;
145 		static const uint16_t zero[5] = { 0, 0, 0, 0, 0 };
146 
147 		if ((tagbits & 1) == 0) {
148 			fn->f_ftw |= 3 << (i << 1);	/* empty */
149 			continue;
150 		}
151 
152 		/*
153 		 * (tags refer to *physical* registers)
154 		 */
155 		fpp = &fx->fx_st[(i - top + 8) & 7].fpr_16[0];
156 		ibit = fpp[3] >> 15;
157 		expo = fpp[4] & 0x7fff;
158 
159 		if (ibit && expo != 0 && expo != 0x7fff)
160 			continue;			/* valid fp number */
161 
162 		if (bcmp(fpp, &zero, sizeof (zero)))
163 			fn->f_ftw |= 2 << (i << 1);	/* NaN */
164 		else
165 			fn->f_ftw |= 1 << (i << 1);	/* fp zero */
166 	}
167 
168 	fn->f_fop = fx->fx_fop;
169 
170 	fn->__f_ign2 = 0;
171 #if defined(__amd64)
172 	fn->f_eip = (uint32_t)fx->fx_rip;
173 	fn->f_cs = U32CS_SEL;
174 	fn->f_dp = (uint32_t)fx->fx_rdp;
175 	fn->f_ds = UDS_SEL;
176 #else
177 	fn->f_eip = fx->fx_eip;
178 	fn->f_cs = fx->fx_cs;
179 	fn->f_dp = fx->fx_dp;
180 	fn->f_ds = fx->fx_ds;
181 #endif
182 	fn->__f_ign3 = 0;
183 }
184 
185 /*
186  * Map from an fpregset_t into an fxsave-format save area
187  */
188 static void
189 fpregset_to_fxsave(const fpregset_t *fp, struct fxsave_state *fx)
190 {
191 #if defined(__amd64)
192 	bcopy(fp, fx, sizeof (*fx));
193 #else
194 	const struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
195 
196 	fnsave_to_fxsave((const struct fnsave_state *)fc, fx);
197 	fx->fx_mxcsr = fc->mxcsr;
198 	bcopy(&fc->xmm[0], &fx->fx_xmm[0], sizeof (fc->xmm));
199 #endif
200 	/*
201 	 * avoid useless #gp exceptions - mask reserved bits
202 	 */
203 	fx->fx_mxcsr &= sse_mxcsr_mask;
204 }
205 
206 /*
207  * Map from an fxsave-format save area into a fpregset_t
208  */
209 static void
210 fxsave_to_fpregset(const struct fxsave_state *fx, fpregset_t *fp)
211 {
212 #if defined(__amd64)
213 	bcopy(fx, fp, sizeof (*fx));
214 #else
215 	struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
216 
217 	fxsave_to_fnsave(fx, (struct fnsave_state *)fc);
218 	fc->mxcsr = fx->fx_mxcsr;
219 	bcopy(&fx->fx_xmm[0], &fc->xmm[0], sizeof (fc->xmm));
220 #endif
221 }
222 
223 #if defined(_SYSCALL32_IMPL)
224 static void
225 fpregset32_to_fxsave(const fpregset32_t *fp, struct fxsave_state *fx)
226 {
227 	const struct fpchip32_state *fc = &fp->fp_reg_set.fpchip_state;
228 
229 	fnsave_to_fxsave((const struct fnsave_state *)fc, fx);
230 	/*
231 	 * avoid useless #gp exceptions - mask reserved bits
232 	 */
233 	fx->fx_mxcsr = sse_mxcsr_mask & fc->mxcsr;
234 	bcopy(&fc->xmm[0], &fx->fx_xmm[0], sizeof (fc->xmm));
235 }
236 
237 static void
238 fxsave_to_fpregset32(const struct fxsave_state *fx, fpregset32_t *fp)
239 {
240 	struct fpchip32_state *fc = &fp->fp_reg_set.fpchip_state;
241 
242 	fxsave_to_fnsave(fx, (struct fnsave_state *)fc);
243 	fc->mxcsr = fx->fx_mxcsr;
244 	bcopy(&fx->fx_xmm[0], &fc->xmm[0], sizeof (fc->xmm));
245 }
246 
247 static void
248 fpregset_nto32(const fpregset_t *src, fpregset32_t *dst)
249 {
250 	fxsave_to_fpregset32((struct fxsave_state *)src, dst);
251 	dst->fp_reg_set.fpchip_state.status =
252 	    src->fp_reg_set.fpchip_state.status;
253 	dst->fp_reg_set.fpchip_state.xstatus =
254 	    src->fp_reg_set.fpchip_state.xstatus;
255 }
256 
257 static void
258 fpregset_32ton(const fpregset32_t *src, fpregset_t *dst)
259 {
260 	fpregset32_to_fxsave(src, (struct fxsave_state *)dst);
261 	dst->fp_reg_set.fpchip_state.status =
262 	    src->fp_reg_set.fpchip_state.status;
263 	dst->fp_reg_set.fpchip_state.xstatus =
264 	    src->fp_reg_set.fpchip_state.xstatus;
265 }
266 #endif
267 
268 /*
269  * Set floating-point registers from a native fpregset_t.
270  */
271 void
272 setfpregs(klwp_t *lwp, fpregset_t *fp)
273 {
274 	struct fpu_ctx *fpu = &lwp->lwp_pcb.pcb_fpu;
275 
276 	if (fpu->fpu_flags & FPU_EN) {
277 		if (!(fpu->fpu_flags & FPU_VALID)) {
278 			/*
279 			 * FPU context is still active, release the
280 			 * ownership.
281 			 */
282 			fp_free(fpu, 0);
283 		}
284 #if !defined(__amd64)
285 		if (fp_kind == __FP_SSE) {
286 #endif
287 			fpregset_to_fxsave(fp, &fpu->fpu_regs.kfpu_u.kfpu_fx);
288 			fpu->fpu_regs.kfpu_xstatus =
289 			    fp->fp_reg_set.fpchip_state.xstatus;
290 #if !defined(__amd64)
291 		} else
292 			bcopy(fp, &fpu->fpu_regs.kfpu_u.kfpu_fn,
293 			    sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
294 #endif
295 		fpu->fpu_regs.kfpu_status = fp->fp_reg_set.fpchip_state.status;
296 		fpu->fpu_flags |= FPU_VALID;
297 
298 		/*
299 		 * If we are changing the fpu_flags in the current context,
300 		 * disable floating point (turn on CR0_TS bit) to track
301 		 * FPU_VALID after clearing any errors (frstor chokes
302 		 * otherwise)
303 		 */
304 		if (lwp == ttolwp(curthread)) {
305 			(void) fperr_reset();
306 			fpdisable();
307 		}
308 	} else {
309 		/*
310 		 * If we are trying to change the FPU state of a thread which
311 		 * hasn't yet initialized floating point, store the state in
312 		 * the pcb and indicate that the state is valid.  When the
313 		 * thread enables floating point, it will use this state instead
314 		 * of the default state.
315 		 */
316 #if !defined(__amd64)
317 		if (fp_kind == __FP_SSE) {
318 #endif
319 			fpregset_to_fxsave(fp, &fpu->fpu_regs.kfpu_u.kfpu_fx);
320 			fpu->fpu_regs.kfpu_xstatus =
321 			    fp->fp_reg_set.fpchip_state.xstatus;
322 #if !defined(__amd64)
323 		} else
324 			bcopy(fp, &fpu->fpu_regs.kfpu_u.kfpu_fn,
325 			    sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
326 #endif
327 		fpu->fpu_regs.kfpu_status = fp->fp_reg_set.fpchip_state.status;
328 		fpu->fpu_flags |= FPU_VALID;
329 	}
330 }
331 
332 /*
333  * Get floating-point registers into a native fpregset_t.
334  */
335 void
336 getfpregs(klwp_t *lwp, fpregset_t *fp)
337 {
338 	struct fpu_ctx *fpu = &lwp->lwp_pcb.pcb_fpu;
339 
340 	kpreempt_disable();
341 	if (fpu->fpu_flags & FPU_EN) {
342 		/*
343 		 * If we have FPU hw and the thread's pcb doesn't have
344 		 * a valid FPU state then get the state from the hw.
345 		 */
346 		if (fpu_exists && ttolwp(curthread) == lwp &&
347 		    !(fpu->fpu_flags & FPU_VALID))
348 			fp_save(fpu); /* get the current FPU state */
349 	}
350 
351 	/*
352 	 * There are 3 possible cases we have to be aware of here:
353 	 *
354 	 * 1. FPU is enabled.  FPU state is stored in the current LWP.
355 	 *
356 	 * 2. FPU is not enabled, and there have been no intervening /proc
357 	 *    modifications.  Return initial FPU state.
358 	 *
359 	 * 3. FPU is not enabled, but a /proc consumer has modified FPU state.
360 	 *    FPU state is stored in the current LWP.
361 	 */
362 	if ((fpu->fpu_flags & FPU_EN) || (fpu->fpu_flags & FPU_VALID)) {
363 		/*
364 		 * Cases 1 and 3.
365 		 */
366 #if !defined(__amd64)
367 		if (fp_kind == __FP_SSE) {
368 #endif
369 			fxsave_to_fpregset(&fpu->fpu_regs.kfpu_u.kfpu_fx, fp);
370 			fp->fp_reg_set.fpchip_state.xstatus =
371 			    fpu->fpu_regs.kfpu_xstatus;
372 #if !defined(__amd64)
373 		} else
374 			bcopy(&fpu->fpu_regs.kfpu_u.kfpu_fn, fp,
375 			    sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
376 #endif
377 		fp->fp_reg_set.fpchip_state.status = fpu->fpu_regs.kfpu_status;
378 	} else {
379 		/*
380 		 * Case 2.
381 		 */
382 #if !defined(__amd64)
383 		if (fp_kind == __FP_SSE) {
384 #endif
385 			fxsave_to_fpregset(&sse_initial, fp);
386 			fp->fp_reg_set.fpchip_state.xstatus =
387 			    fpu->fpu_regs.kfpu_xstatus;
388 #if !defined(__amd64)
389 		} else
390 			bcopy(&x87_initial, fp, sizeof (x87_initial));
391 #endif
392 		fp->fp_reg_set.fpchip_state.status = fpu->fpu_regs.kfpu_status;
393 	}
394 	kpreempt_enable();
395 }
396 
397 #if defined(_SYSCALL32_IMPL)
398 
399 /*
400  * Set floating-point registers from an fpregset32_t.
401  */
402 void
403 setfpregs32(klwp_t *lwp, fpregset32_t *fp)
404 {
405 	fpregset_t fpregs;
406 
407 	fpregset_32ton(fp, &fpregs);
408 	setfpregs(lwp, &fpregs);
409 }
410 
411 /*
412  * Get floating-point registers into an fpregset32_t.
413  */
414 void
415 getfpregs32(klwp_t *lwp, fpregset32_t *fp)
416 {
417 	fpregset_t fpregs;
418 
419 	getfpregs(lwp, &fpregs);
420 	fpregset_nto32(&fpregs, fp);
421 }
422 
423 #endif	/* _SYSCALL32_IMPL */
424 
425 /*
426  * Return the general registers
427  */
428 void
429 getgregs(klwp_t *lwp, gregset_t grp)
430 {
431 	struct regs *rp = lwptoregs(lwp);
432 #if defined(__amd64)
433 	struct pcb *pcb = &lwp->lwp_pcb;
434 	int thisthread = lwptot(lwp) == curthread;
435 
436 	grp[REG_RDI] = rp->r_rdi;
437 	grp[REG_RSI] = rp->r_rsi;
438 	grp[REG_RDX] = rp->r_rdx;
439 	grp[REG_RCX] = rp->r_rcx;
440 	grp[REG_R8] = rp->r_r8;
441 	grp[REG_R9] = rp->r_r9;
442 	grp[REG_RAX] = rp->r_rax;
443 	grp[REG_RBX] = rp->r_rbx;
444 	grp[REG_RBP] = rp->r_rbp;
445 	grp[REG_R10] = rp->r_r10;
446 	grp[REG_R11] = rp->r_r11;
447 	grp[REG_R12] = rp->r_r12;
448 	grp[REG_R13] = rp->r_r13;
449 	grp[REG_R14] = rp->r_r14;
450 	grp[REG_R15] = rp->r_r15;
451 	grp[REG_FSBASE] = pcb->pcb_fsbase;
452 	grp[REG_GSBASE] = pcb->pcb_gsbase;
453 	if (thisthread)
454 		kpreempt_disable();
455 	if (pcb->pcb_flags & RUPDATE_PENDING) {
456 		grp[REG_DS] = pcb->pcb_ds;
457 		grp[REG_ES] = pcb->pcb_es;
458 		grp[REG_FS] = pcb->pcb_fs;
459 		grp[REG_GS] = pcb->pcb_gs;
460 	} else {
461 		grp[REG_DS] = rp->r_ds;
462 		grp[REG_ES] = rp->r_es;
463 		grp[REG_FS] = rp->r_fs;
464 		grp[REG_GS] = rp->r_gs;
465 	}
466 	if (thisthread)
467 		kpreempt_enable();
468 	grp[REG_TRAPNO] = rp->r_trapno;
469 	grp[REG_ERR] = rp->r_err;
470 	grp[REG_RIP] = rp->r_rip;
471 	grp[REG_CS] = rp->r_cs;
472 	grp[REG_SS] = rp->r_ss;
473 	grp[REG_RFL] = rp->r_rfl;
474 	grp[REG_RSP] = rp->r_rsp;
475 #else
476 	bcopy(&rp->r_gs, grp, sizeof (gregset_t));
477 #endif
478 }
479 
480 #if defined(_SYSCALL32_IMPL)
481 
482 void
483 getgregs32(klwp_t *lwp, gregset32_t grp)
484 {
485 	struct regs *rp = lwptoregs(lwp);
486 	struct pcb *pcb = &lwp->lwp_pcb;
487 	int thisthread = lwptot(lwp) == curthread;
488 
489 	if (thisthread)
490 		kpreempt_disable();
491 	if (pcb->pcb_flags & RUPDATE_PENDING) {
492 		grp[GS] = (uint16_t)pcb->pcb_gs;
493 		grp[FS] = (uint16_t)pcb->pcb_fs;
494 		grp[DS] = (uint16_t)pcb->pcb_ds;
495 		grp[ES] = (uint16_t)pcb->pcb_es;
496 	} else {
497 		grp[GS] = (uint16_t)rp->r_gs;
498 		grp[FS] = (uint16_t)rp->r_fs;
499 		grp[DS] = (uint16_t)rp->r_ds;
500 		grp[ES] = (uint16_t)rp->r_es;
501 	}
502 	if (thisthread)
503 		kpreempt_enable();
504 	grp[EDI] = (greg32_t)rp->r_rdi;
505 	grp[ESI] = (greg32_t)rp->r_rsi;
506 	grp[EBP] = (greg32_t)rp->r_rbp;
507 	grp[ESP] = 0;
508 	grp[EBX] = (greg32_t)rp->r_rbx;
509 	grp[EDX] = (greg32_t)rp->r_rdx;
510 	grp[ECX] = (greg32_t)rp->r_rcx;
511 	grp[EAX] = (greg32_t)rp->r_rax;
512 	grp[TRAPNO] = (greg32_t)rp->r_trapno;
513 	grp[ERR] = (greg32_t)rp->r_err;
514 	grp[EIP] = (greg32_t)rp->r_rip;
515 	grp[CS] = (uint16_t)rp->r_cs;
516 	grp[EFL] = (greg32_t)rp->r_rfl;
517 	grp[UESP] = (greg32_t)rp->r_rsp;
518 	grp[SS] = (uint16_t)rp->r_ss;
519 }
520 
521 void
522 ucontext_32ton(const ucontext32_t *src, ucontext_t *dst)
523 {
524 	mcontext_t *dmc = &dst->uc_mcontext;
525 	const mcontext32_t *smc = &src->uc_mcontext;
526 
527 	bzero(dst, sizeof (*dst));
528 	dst->uc_flags = src->uc_flags;
529 	dst->uc_link = (ucontext_t *)(uintptr_t)src->uc_link;
530 
531 	bcopy(&src->uc_sigmask, &dst->uc_sigmask, sizeof (dst->uc_sigmask));
532 
533 	dst->uc_stack.ss_sp = (void *)(uintptr_t)src->uc_stack.ss_sp;
534 	dst->uc_stack.ss_size = (size_t)src->uc_stack.ss_size;
535 	dst->uc_stack.ss_flags = src->uc_stack.ss_flags;
536 
537 	dmc->gregs[REG_GS] = (greg_t)(uint32_t)smc->gregs[GS];
538 	dmc->gregs[REG_FS] = (greg_t)(uint32_t)smc->gregs[FS];
539 	dmc->gregs[REG_ES] = (greg_t)(uint32_t)smc->gregs[ES];
540 	dmc->gregs[REG_DS] = (greg_t)(uint32_t)smc->gregs[DS];
541 	dmc->gregs[REG_RDI] = (greg_t)(uint32_t)smc->gregs[EDI];
542 	dmc->gregs[REG_RSI] = (greg_t)(uint32_t)smc->gregs[ESI];
543 	dmc->gregs[REG_RBP] = (greg_t)(uint32_t)smc->gregs[EBP];
544 	dmc->gregs[REG_RBX] = (greg_t)(uint32_t)smc->gregs[EBX];
545 	dmc->gregs[REG_RDX] = (greg_t)(uint32_t)smc->gregs[EDX];
546 	dmc->gregs[REG_RCX] = (greg_t)(uint32_t)smc->gregs[ECX];
547 	dmc->gregs[REG_RAX] = (greg_t)(uint32_t)smc->gregs[EAX];
548 	dmc->gregs[REG_TRAPNO] = (greg_t)(uint32_t)smc->gregs[TRAPNO];
549 	dmc->gregs[REG_ERR] = (greg_t)(uint32_t)smc->gregs[ERR];
550 	dmc->gregs[REG_RIP] = (greg_t)(uint32_t)smc->gregs[EIP];
551 	dmc->gregs[REG_CS] = (greg_t)(uint32_t)smc->gregs[CS];
552 	dmc->gregs[REG_RFL] = (greg_t)(uint32_t)smc->gregs[EFL];
553 	dmc->gregs[REG_RSP] = (greg_t)(uint32_t)smc->gregs[UESP];
554 	dmc->gregs[REG_SS] = (greg_t)(uint32_t)smc->gregs[SS];
555 
556 	/*
557 	 * A valid fpregs is only copied in if uc.uc_flags has UC_FPU set
558 	 * otherwise there is no guarantee that anything in fpregs is valid.
559 	 */
560 	if (src->uc_flags & UC_FPU)
561 		fpregset_32ton(&src->uc_mcontext.fpregs,
562 		    &dst->uc_mcontext.fpregs);
563 }
564 
565 #endif	/* _SYSCALL32_IMPL */
566 
567 /*
568  * Return the user-level PC.
569  * If in a system call, return the address of the syscall trap.
570  */
571 greg_t
572 getuserpc()
573 {
574 	greg_t upc = lwptoregs(ttolwp(curthread))->r_pc;
575 	uint32_t insn;
576 
577 	if (curthread->t_sysnum == 0)
578 		return (upc);
579 
580 	/*
581 	 * We might've gotten here from sysenter (0xf 0x34),
582 	 * syscall (0xf 0x5) or lcall (0x9a 0 0 0 0 0x27 0).
583 	 *
584 	 * Go peek at the binary to figure it out..
585 	 */
586 	if (fuword32((void *)(upc - 2), &insn) != -1 &&
587 	    (insn & 0xffff) == 0x340f || (insn & 0xffff) == 0x050f)
588 		return (upc - 2);
589 	return (upc - 7);
590 }
591 
592 /*
593  * Protect segment registers from non-user privilege levels and GDT selectors
594  * other than USER_CS, USER_DS and lwp FS and GS values.  If the segment
595  * selector is non-null and not USER_CS/USER_DS, we make sure that the
596  * TI bit is set to point into the LDT and that the RPL is set to 3.
597  *
598  * Since struct regs stores each 16-bit segment register as a 32-bit greg_t, we
599  * also explicitly zero the top 16 bits since they may be coming from the
600  * user's address space via setcontext(2) or /proc.
601  */
602 
603 /*ARGSUSED*/
604 static greg_t
605 fix_segreg(greg_t sr, model_t datamodel)
606 {
607 	switch (sr &= 0xffff) {
608 #if defined(__amd64)
609 	/*
610 	 * If lwp attempts to switch data model then force their
611 	 * code selector to be null selector.
612 	 */
613 	case U32CS_SEL:
614 		if (datamodel == DATAMODEL_NATIVE)
615 			return (0);
616 		else
617 			return (sr);
618 
619 	case UCS_SEL:
620 		if (datamodel == DATAMODEL_ILP32)
621 			return (0);
622 #elif defined(__i386)
623 	case UCS_SEL:
624 #endif
625 	/*FALLTHROUGH*/
626 	case UDS_SEL:
627 	case LWPFS_SEL:
628 	case LWPGS_SEL:
629 	case 0:
630 		return (sr);
631 	default:
632 		break;
633 	}
634 
635 	/*
636 	 * Force it into the LDT in ring 3 for 32-bit processes, which by
637 	 * default do not have an LDT, so that any attempt to use an invalid
638 	 * selector will reference the (non-existant) LDT, and cause a #gp fault
639 	 * for the process.
640 	 *
641 	 * 64-bit processes get the null gdt selector since they
642 	 * are not allowed to have a private LDT.
643 	 */
644 #if defined(__amd64)
645 	return (datamodel == DATAMODEL_ILP32 ? (sr | SEL_TI_LDT | SEL_UPL) : 0);
646 #elif defined(__i386)
647 	return (sr | SEL_TI_LDT | SEL_UPL);
648 #endif
649 }
650 
651 /*
652  * Set general registers.
653  */
654 void
655 setgregs(klwp_t *lwp, gregset_t grp)
656 {
657 	struct regs *rp = lwptoregs(lwp);
658 	model_t	datamodel = lwp_getdatamodel(lwp);
659 
660 #if defined(__amd64)
661 	struct pcb *pcb = &lwp->lwp_pcb;
662 	int thisthread = lwptot(lwp) == curthread;
663 
664 	if (datamodel == DATAMODEL_NATIVE) {
665 
666 		if (thisthread)
667 			(void) save_syscall_args();	/* copy the args */
668 
669 		rp->r_rdi = grp[REG_RDI];
670 		rp->r_rsi = grp[REG_RSI];
671 		rp->r_rdx = grp[REG_RDX];
672 		rp->r_rcx = grp[REG_RCX];
673 		rp->r_r8 = grp[REG_R8];
674 		rp->r_r9 = grp[REG_R9];
675 		rp->r_rax = grp[REG_RAX];
676 		rp->r_rbx = grp[REG_RBX];
677 		rp->r_rbp = grp[REG_RBP];
678 		rp->r_r10 = grp[REG_R10];
679 		rp->r_r11 = grp[REG_R11];
680 		rp->r_r12 = grp[REG_R12];
681 		rp->r_r13 = grp[REG_R13];
682 		rp->r_r14 = grp[REG_R14];
683 		rp->r_r15 = grp[REG_R15];
684 		rp->r_trapno = grp[REG_TRAPNO];
685 		rp->r_err = grp[REG_ERR];
686 		rp->r_rip = grp[REG_RIP];
687 		/*
688 		 * Setting %cs or %ss to anything else is quietly but
689 		 * quite definitely forbidden!
690 		 */
691 		rp->r_cs = UCS_SEL;
692 		rp->r_ss = UDS_SEL;
693 		rp->r_rsp = grp[REG_RSP];
694 
695 		if (thisthread)
696 			kpreempt_disable();
697 
698 		pcb->pcb_ds = UDS_SEL;
699 		pcb->pcb_es = UDS_SEL;
700 
701 		/*
702 		 * 64-bit processes -are- allowed to set their fsbase/gsbase
703 		 * values directly, but only if they're using the segment
704 		 * selectors that allow that semantic.
705 		 *
706 		 * (32-bit processes must use lwp_set_private().)
707 		 */
708 		pcb->pcb_fsbase = grp[REG_FSBASE];
709 		pcb->pcb_gsbase = grp[REG_GSBASE];
710 		pcb->pcb_fs = fix_segreg(grp[REG_FS], datamodel);
711 		pcb->pcb_gs = fix_segreg(grp[REG_GS], datamodel);
712 
713 		/*
714 		 * Ensure that we go out via update_sregs
715 		 */
716 		pcb->pcb_flags |= RUPDATE_PENDING;
717 		lwptot(lwp)->t_post_sys = 1;
718 		if (thisthread)
719 			kpreempt_enable();
720 #if defined(_SYSCALL32_IMPL)
721 	} else {
722 		rp->r_rdi = (uint32_t)grp[REG_RDI];
723 		rp->r_rsi = (uint32_t)grp[REG_RSI];
724 		rp->r_rdx = (uint32_t)grp[REG_RDX];
725 		rp->r_rcx = (uint32_t)grp[REG_RCX];
726 		rp->r_rax = (uint32_t)grp[REG_RAX];
727 		rp->r_rbx = (uint32_t)grp[REG_RBX];
728 		rp->r_rbp = (uint32_t)grp[REG_RBP];
729 		rp->r_trapno = (uint32_t)grp[REG_TRAPNO];
730 		rp->r_err = (uint32_t)grp[REG_ERR];
731 		rp->r_rip = (uint32_t)grp[REG_RIP];
732 
733 		/*
734 		 * The kernel uses %cs to determine if it is dealing with
735 		 * another part of the kernel or with a userland application.
736 		 * Specifically, it tests the privilege bits. For this reason,
737 		 * we must prevent user apps from ending up with a NULL selector
738 		 * in %cs. Instead, we'll use index 0 into the GDT but with the
739 		 * privilege bits set to usermode.
740 		 */
741 		rp->r_cs = fix_segreg(grp[REG_CS], datamodel) | SEL_UPL;
742 		rp->r_ss = fix_segreg(grp[REG_DS], datamodel);
743 
744 		rp->r_rsp = (uint32_t)grp[REG_RSP];
745 
746 		if (thisthread)
747 			kpreempt_disable();
748 
749 		pcb->pcb_ds = fix_segreg(grp[REG_DS], datamodel);
750 		pcb->pcb_es = fix_segreg(grp[REG_ES], datamodel);
751 
752 		/*
753 		 * (See fsbase/gsbase commentary above)
754 		 */
755 		pcb->pcb_fs = fix_segreg(grp[REG_FS], datamodel);
756 		pcb->pcb_gs = fix_segreg(grp[REG_GS], datamodel);
757 
758 		/*
759 		 * Ensure that we go out via update_sregs
760 		 */
761 		pcb->pcb_flags |= RUPDATE_PENDING;
762 		lwptot(lwp)->t_post_sys = 1;
763 		if (thisthread)
764 			kpreempt_enable();
765 #endif
766 	}
767 
768 	/*
769 	 * Only certain bits of the flags register can be modified.
770 	 */
771 	rp->r_rfl = (rp->r_rfl & ~PSL_USERMASK) |
772 	    (grp[REG_RFL] & PSL_USERMASK);
773 
774 #elif defined(__i386)
775 
776 	/*
777 	 * Only certain bits of the flags register can be modified.
778 	 */
779 	grp[EFL] = (rp->r_efl & ~PSL_USERMASK) | (grp[EFL] & PSL_USERMASK);
780 
781 	/*
782 	 * Copy saved registers from user stack.
783 	 */
784 	bcopy(grp, &rp->r_gs, sizeof (gregset_t));
785 
786 	rp->r_cs = fix_segreg(rp->r_cs, datamodel);
787 	rp->r_ss = fix_segreg(rp->r_ss, datamodel);
788 	rp->r_ds = fix_segreg(rp->r_ds, datamodel);
789 	rp->r_es = fix_segreg(rp->r_es, datamodel);
790 	rp->r_fs = fix_segreg(rp->r_fs, datamodel);
791 	rp->r_gs = fix_segreg(rp->r_gs, datamodel);
792 
793 #endif	/* __i386 */
794 }
795 
796 /*
797  * Determine whether eip is likely to have an interrupt frame
798  * on the stack.  We do this by comparing the address to the
799  * range of addresses spanned by several well-known routines.
800  */
801 extern void _interrupt();
802 extern void _allsyscalls();
803 extern void _cmntrap();
804 extern void fakesoftint();
805 
806 extern size_t _interrupt_size;
807 extern size_t _allsyscalls_size;
808 extern size_t _cmntrap_size;
809 extern size_t _fakesoftint_size;
810 
811 /*
812  * Get a pc-only stacktrace.  Used for kmem_alloc() buffer ownership tracking.
813  * Returns MIN(current stack depth, pcstack_limit).
814  */
815 int
816 getpcstack(pc_t *pcstack, int pcstack_limit)
817 {
818 	struct frame *fp = (struct frame *)getfp();
819 	struct frame *nextfp, *minfp, *stacktop;
820 	int depth = 0;
821 	int on_intr;
822 	uintptr_t pc;
823 
824 	if ((on_intr = CPU_ON_INTR(CPU)) != 0)
825 		stacktop = (struct frame *)(CPU->cpu_intr_stack + SA(MINFRAME));
826 	else
827 		stacktop = (struct frame *)curthread->t_stk;
828 	minfp = fp;
829 
830 	pc = ((struct regs *)fp)->r_pc;
831 
832 	while (depth < pcstack_limit) {
833 		nextfp = (struct frame *)fp->fr_savfp;
834 		pc = fp->fr_savpc;
835 		if (nextfp <= minfp || nextfp >= stacktop) {
836 			if (on_intr) {
837 				/*
838 				 * Hop from interrupt stack to thread stack.
839 				 */
840 				stacktop = (struct frame *)curthread->t_stk;
841 				minfp = (struct frame *)curthread->t_stkbase;
842 				on_intr = 0;
843 				continue;
844 			}
845 			break;
846 		}
847 		pcstack[depth++] = (pc_t)pc;
848 		fp = nextfp;
849 		minfp = fp;
850 	}
851 	return (depth);
852 }
853 
854 /*
855  * The following ELF header fields are defined as processor-specific
856  * in the V8 ABI:
857  *
858  *	e_ident[EI_DATA]	encoding of the processor-specific
859  *				data in the object file
860  *	e_machine		processor identification
861  *	e_flags			processor-specific flags associated
862  *				with the file
863  */
864 
865 /*
866  * The value of at_flags reflects a platform's cpu module support.
867  * at_flags is used to check for allowing a binary to execute and
868  * is passed as the value of the AT_FLAGS auxiliary vector.
869  */
870 int at_flags = 0;
871 
872 /*
873  * Check the processor-specific fields of an ELF header.
874  *
875  * returns 1 if the fields are valid, 0 otherwise
876  */
877 /*ARGSUSED2*/
878 int
879 elfheadcheck(
880 	unsigned char e_data,
881 	Elf32_Half e_machine,
882 	Elf32_Word e_flags)
883 {
884 	if (e_data != ELFDATA2LSB)
885 		return (0);
886 #if defined(__amd64)
887 	if (e_machine == EM_AMD64)
888 		return (1);
889 #endif
890 	return (e_machine == EM_386);
891 }
892 
893 uint_t auxv_hwcap_include = 0;	/* patch to enable unrecognized features */
894 uint_t auxv_hwcap_exclude = 0;	/* patch for broken cpus, debugging */
895 #if defined(_SYSCALL32_IMPL)
896 uint_t auxv_hwcap32_include = 0;	/* ditto for 32-bit apps */
897 uint_t auxv_hwcap32_exclude = 0;	/* ditto for 32-bit apps */
898 #endif
899 
900 /*
901  * Gather information about the processor and place it into auxv_hwcap
902  * so that it can be exported to the linker via the aux vector.
903  *
904  * We use this seemingly complicated mechanism so that we can ensure
905  * that /etc/system can be used to override what the system can or
906  * cannot discover for itself.
907  */
908 void
909 bind_hwcap(void)
910 {
911 	uint_t cpu_hwcap_flags = cpuid_pass4(NULL);
912 
913 	auxv_hwcap = (auxv_hwcap_include | cpu_hwcap_flags) &
914 	    ~auxv_hwcap_exclude;
915 
916 #if defined(__amd64)
917 	/*
918 	 * On AMD processors, sysenter just doesn't work at all
919 	 * when the kernel is in long mode.  On IA-32e processors
920 	 * it does, but there's no real point in all the alternate
921 	 * mechanism when syscall works on both.
922 	 *
923 	 * Besides, the kernel's sysenter handler is expecting a
924 	 * 32-bit lwp ...
925 	 */
926 	auxv_hwcap &= ~AV_386_SEP;
927 #endif
928 
929 	if (auxv_hwcap_include || auxv_hwcap_exclude)
930 		cmn_err(CE_CONT, "?user ABI extensions: %b\n",
931 		    auxv_hwcap, FMT_AV_386);
932 
933 #if defined(_SYSCALL32_IMPL)
934 	auxv_hwcap32 = (auxv_hwcap32_include | cpu_hwcap_flags) &
935 		~auxv_hwcap32_exclude;
936 
937 #if defined(__amd64)
938 	/*
939 	 * If this is an amd64 architecture machine from Intel, then
940 	 * syscall -doesn't- work in compatibility mode, only sysenter does.
941 	 *
942 	 * Sigh.
943 	 */
944 	if (!cpuid_syscall32_insn(NULL))
945 		auxv_hwcap32 &= ~AV_386_AMD_SYSC;
946 #endif
947 
948 	if (auxv_hwcap32_include || auxv_hwcap32_exclude)
949 		cmn_err(CE_CONT, "?32-bit user ABI extensions: %b\n",
950 		    auxv_hwcap32, FMT_AV_386);
951 #endif
952 }
953 
954 /*
955  *	sync_icache() - this is called
956  *	in proc/fs/prusrio.c. x86 has an unified cache and therefore
957  *	this is a nop.
958  */
959 /* ARGSUSED */
960 void
961 sync_icache(caddr_t addr, uint_t len)
962 {
963 	/* Do nothing for now */
964 }
965 
966 /*ARGSUSED*/
967 void
968 sync_data_memory(caddr_t va, size_t len)
969 {
970 	/* Not implemented for this platform */
971 }
972 
973 int
974 __ipltospl(int ipl)
975 {
976 	return (ipltospl(ipl));
977 }
978 
979 /*
980  * The panic code invokes panic_saveregs() to record the contents of a
981  * regs structure into the specified panic_data structure for debuggers.
982  */
983 void
984 panic_saveregs(panic_data_t *pdp, struct regs *rp)
985 {
986 	panic_nv_t *pnv = PANICNVGET(pdp);
987 
988 	struct cregs	creg;
989 
990 	getcregs(&creg);
991 
992 #if defined(__amd64)
993 	PANICNVADD(pnv, "rdi", rp->r_rdi);
994 	PANICNVADD(pnv, "rsi", rp->r_rsi);
995 	PANICNVADD(pnv, "rdx", rp->r_rdx);
996 	PANICNVADD(pnv, "rcx", rp->r_rcx);
997 	PANICNVADD(pnv, "r8", rp->r_r8);
998 	PANICNVADD(pnv, "r9", rp->r_r9);
999 	PANICNVADD(pnv, "rax", rp->r_rax);
1000 	PANICNVADD(pnv, "rbx", rp->r_rbx);
1001 	PANICNVADD(pnv, "rbp", rp->r_rbp);
1002 	PANICNVADD(pnv, "r10", rp->r_r10);
1003 	PANICNVADD(pnv, "r10", rp->r_r10);
1004 	PANICNVADD(pnv, "r11", rp->r_r11);
1005 	PANICNVADD(pnv, "r12", rp->r_r12);
1006 	PANICNVADD(pnv, "r13", rp->r_r13);
1007 	PANICNVADD(pnv, "r14", rp->r_r14);
1008 	PANICNVADD(pnv, "r15", rp->r_r15);
1009 	PANICNVADD(pnv, "fsbase", rp->r_fsbase);
1010 	PANICNVADD(pnv, "gsbase", rp->r_gsbase);
1011 	PANICNVADD(pnv, "ds", rp->r_ds);
1012 	PANICNVADD(pnv, "es", rp->r_es);
1013 	PANICNVADD(pnv, "fs", rp->r_fs);
1014 	PANICNVADD(pnv, "gs", rp->r_gs);
1015 	PANICNVADD(pnv, "trapno", rp->r_trapno);
1016 	PANICNVADD(pnv, "err", rp->r_err);
1017 	PANICNVADD(pnv, "rip", rp->r_rip);
1018 	PANICNVADD(pnv, "cs", rp->r_cs);
1019 	PANICNVADD(pnv, "rflags", rp->r_rfl);
1020 	PANICNVADD(pnv, "rsp", rp->r_rsp);
1021 	PANICNVADD(pnv, "ss", rp->r_ss);
1022 	PANICNVADD(pnv, "gdt_hi", (uint64_t)(creg.cr_gdt._l[3]));
1023 	PANICNVADD(pnv, "gdt_lo", (uint64_t)(creg.cr_gdt._l[0]));
1024 	PANICNVADD(pnv, "idt_hi", (uint64_t)(creg.cr_idt._l[3]));
1025 	PANICNVADD(pnv, "idt_lo", (uint64_t)(creg.cr_idt._l[0]));
1026 #elif defined(__i386)
1027 	PANICNVADD(pnv, "gs", (uint32_t)rp->r_gs);
1028 	PANICNVADD(pnv, "fs", (uint32_t)rp->r_fs);
1029 	PANICNVADD(pnv, "es", (uint32_t)rp->r_es);
1030 	PANICNVADD(pnv, "ds", (uint32_t)rp->r_ds);
1031 	PANICNVADD(pnv, "edi", (uint32_t)rp->r_edi);
1032 	PANICNVADD(pnv, "esi", (uint32_t)rp->r_esi);
1033 	PANICNVADD(pnv, "ebp", (uint32_t)rp->r_ebp);
1034 	PANICNVADD(pnv, "esp", (uint32_t)rp->r_esp);
1035 	PANICNVADD(pnv, "ebx", (uint32_t)rp->r_ebx);
1036 	PANICNVADD(pnv, "edx", (uint32_t)rp->r_edx);
1037 	PANICNVADD(pnv, "ecx", (uint32_t)rp->r_ecx);
1038 	PANICNVADD(pnv, "eax", (uint32_t)rp->r_eax);
1039 	PANICNVADD(pnv, "trapno", (uint32_t)rp->r_trapno);
1040 	PANICNVADD(pnv, "err", (uint32_t)rp->r_err);
1041 	PANICNVADD(pnv, "eip", (uint32_t)rp->r_eip);
1042 	PANICNVADD(pnv, "cs", (uint32_t)rp->r_cs);
1043 	PANICNVADD(pnv, "eflags", (uint32_t)rp->r_efl);
1044 	PANICNVADD(pnv, "uesp", (uint32_t)rp->r_uesp);
1045 	PANICNVADD(pnv, "ss", (uint32_t)rp->r_ss);
1046 	PANICNVADD(pnv, "gdt", creg.cr_gdt);
1047 	PANICNVADD(pnv, "idt", creg.cr_idt);
1048 #endif	/* __i386 */
1049 
1050 	PANICNVADD(pnv, "ldt", creg.cr_ldt);
1051 	PANICNVADD(pnv, "task", creg.cr_task);
1052 	PANICNVADD(pnv, "cr0", creg.cr_cr0);
1053 	PANICNVADD(pnv, "cr2", creg.cr_cr2);
1054 	PANICNVADD(pnv, "cr3", creg.cr_cr3);
1055 	if (creg.cr_cr4)
1056 		PANICNVADD(pnv, "cr4", creg.cr_cr4);
1057 
1058 	PANICNVSET(pdp, pnv);
1059 }
1060 
1061 #define	TR_ARG_MAX 6	/* Max args to print, same as SPARC */
1062 
1063 #if !defined(__amd64)
1064 
1065 /*
1066  * Given a return address (%eip), determine the likely number of arguments
1067  * that were pushed on the stack prior to its execution.  We do this by
1068  * expecting that a typical call sequence consists of pushing arguments on
1069  * the stack, executing a call instruction, and then performing an add
1070  * on %esp to restore it to the value prior to pushing the arguments for
1071  * the call.  We attempt to detect such an add, and divide the addend
1072  * by the size of a word to determine the number of pushed arguments.
1073  *
1074  * If we do not find such an add, we punt and return TR_ARG_MAX. It is not
1075  * possible to reliably determine if a function took no arguments (i.e. was
1076  * void) because assembler routines do not reliably perform an add on %esp
1077  * immediately upon returning (eg. _sys_call()), so returning TR_ARG_MAX is
1078  * safer than returning 0.
1079  */
1080 static ulong_t
1081 argcount(uintptr_t eip)
1082 {
1083 	const uint8_t *ins = (const uint8_t *)eip;
1084 	ulong_t n;
1085 
1086 	enum {
1087 		M_MODRM_ESP = 0xc4,	/* Mod/RM byte indicates %esp */
1088 		M_ADD_IMM32 = 0x81,	/* ADD imm32 to r/m32 */
1089 		M_ADD_IMM8  = 0x83	/* ADD imm8 to r/m32 */
1090 	};
1091 
1092 	if (eip < KERNELBASE || ins[1] != M_MODRM_ESP)
1093 		return (TR_ARG_MAX);
1094 
1095 	switch (ins[0]) {
1096 	case M_ADD_IMM32:
1097 		n = ins[2] + (ins[3] << 8) + (ins[4] << 16) + (ins[5] << 24);
1098 		break;
1099 
1100 	case M_ADD_IMM8:
1101 		n = ins[2];
1102 		break;
1103 
1104 	default:
1105 		return (TR_ARG_MAX);
1106 	}
1107 
1108 	n /= sizeof (long);
1109 	return (MIN(n, TR_ARG_MAX));
1110 }
1111 
1112 #endif	/* !__amd64 */
1113 
1114 /*
1115  * Print a stack backtrace using the specified frame pointer.  We delay two
1116  * seconds before continuing, unless this is the panic traceback.  Note
1117  * that the frame for the starting stack pointer value is omitted because
1118  * the corresponding %eip is not known.
1119  */
1120 #if defined(__amd64)
1121 
1122 void
1123 traceback(caddr_t fpreg)
1124 {
1125 	struct frame	*fp = (struct frame *)fpreg;
1126 	struct frame	*nextfp;
1127 	uintptr_t	pc, nextpc;
1128 	ulong_t		off;
1129 	char		args[TR_ARG_MAX * 2 + 16], *sym;
1130 
1131 	if (!panicstr)
1132 		printf("traceback: %%fp = %p\n", (void *)fp);
1133 
1134 	if ((uintptr_t)fp < KERNELBASE)
1135 		goto out;
1136 
1137 	pc = fp->fr_savpc;
1138 	fp = (struct frame *)fp->fr_savfp;
1139 
1140 	while ((uintptr_t)fp >= KERNELBASE) {
1141 		/*
1142 		 * XX64 Until port is complete tolerate 8-byte aligned
1143 		 * frame pointers but flag with a warning so they can
1144 		 * be fixed.
1145 		 */
1146 		if (((uintptr_t)fp & (STACK_ALIGN - 1)) != 0) {
1147 			if (((uintptr_t)fp & (8 - 1)) == 0) {
1148 				printf("  >> warning! 8-byte"
1149 				    " aligned %%fp = %p\n", (void *)fp);
1150 			} else {
1151 				printf(
1152 				    "  >> mis-aligned %%fp = %p\n", (void *)fp);
1153 				break;
1154 			}
1155 		}
1156 
1157 		args[0] = '\0';
1158 		nextpc = (uintptr_t)fp->fr_savpc;
1159 		nextfp = (struct frame *)fp->fr_savfp;
1160 		if ((sym = kobj_getsymname(pc, &off)) != NULL) {
1161 			printf("%016lx %s:%s+%lx (%s)\n", (uintptr_t)fp,
1162 			    mod_containing_pc((caddr_t)pc), sym, off, args);
1163 		} else {
1164 			printf("%016lx %lx (%s)\n",
1165 			    (uintptr_t)fp, pc, args);
1166 		}
1167 
1168 		pc = nextpc;
1169 		fp = nextfp;
1170 	}
1171 out:
1172 	if (!panicstr) {
1173 		printf("end of traceback\n");
1174 		DELAY(2 * MICROSEC);
1175 	}
1176 }
1177 
1178 #elif defined(__i386)
1179 
1180 void
1181 traceback(caddr_t fpreg)
1182 {
1183 	struct frame *fp = (struct frame *)fpreg;
1184 	struct frame *nextfp, *minfp, *stacktop;
1185 	uintptr_t pc, nextpc;
1186 
1187 	cpu_t *cpu;
1188 
1189 	/*
1190 	 * args[] holds TR_ARG_MAX hex long args, plus ", " or '\0'.
1191 	 */
1192 	char args[TR_ARG_MAX * 2 + 8], *p;
1193 
1194 	int on_intr;
1195 	ulong_t off;
1196 	char *sym;
1197 
1198 	if (!panicstr)
1199 		printf("traceback: %%fp = %p\n", (void *)fp);
1200 
1201 	/*
1202 	 * If we are panicking, all high-level interrupt information in
1203 	 * CPU was overwritten.  panic_cpu has the correct values.
1204 	 */
1205 	kpreempt_disable();			/* prevent migration */
1206 
1207 	cpu = (panicstr && CPU->cpu_id == panic_cpu.cpu_id)? &panic_cpu : CPU;
1208 
1209 	if ((on_intr = CPU_ON_INTR(cpu)) != 0)
1210 		stacktop = (struct frame *)(cpu->cpu_intr_stack + SA(MINFRAME));
1211 	else
1212 		stacktop = (struct frame *)curthread->t_stk;
1213 
1214 	kpreempt_enable();
1215 
1216 	if ((uintptr_t)fp < KERNELBASE)
1217 		goto out;
1218 
1219 	minfp = fp;	/* Baseline minimum frame pointer */
1220 	pc = fp->fr_savpc;
1221 	fp = (struct frame *)fp->fr_savfp;
1222 
1223 	while ((uintptr_t)fp >= KERNELBASE) {
1224 		ulong_t argc;
1225 		long *argv;
1226 
1227 		if (fp <= minfp || fp >= stacktop) {
1228 			if (on_intr) {
1229 				/*
1230 				 * Hop from interrupt stack to thread stack.
1231 				 */
1232 				stacktop = (struct frame *)curthread->t_stk;
1233 				minfp = (struct frame *)curthread->t_stkbase;
1234 				on_intr = 0;
1235 				continue;
1236 			}
1237 			break; /* we're outside of the expected range */
1238 		}
1239 
1240 		if ((uintptr_t)fp & (STACK_ALIGN - 1)) {
1241 			printf("  >> mis-aligned %%fp = %p\n", (void *)fp);
1242 			break;
1243 		}
1244 
1245 		nextpc = fp->fr_savpc;
1246 		nextfp = (struct frame *)fp->fr_savfp;
1247 		argc = argcount(nextpc);
1248 		argv = (long *)((char *)fp + sizeof (struct frame));
1249 
1250 		args[0] = '\0';
1251 		p = args;
1252 		while (argc-- > 0 && argv < (long *)stacktop) {
1253 			p += snprintf(p, args + sizeof (args) - p,
1254 			    "%s%lx", (p == args) ? "" : ", ", *argv++);
1255 		}
1256 
1257 		if ((sym = kobj_getsymname(pc, &off)) != NULL) {
1258 			printf("%08lx %s:%s+%lx (%s)\n", (uintptr_t)fp,
1259 			    mod_containing_pc((caddr_t)pc), sym, off, args);
1260 		} else {
1261 			printf("%08lx %lx (%s)\n",
1262 			    (uintptr_t)fp, pc, args);
1263 		}
1264 
1265 		minfp = fp;
1266 		pc = nextpc;
1267 		fp = nextfp;
1268 	}
1269 out:
1270 	if (!panicstr) {
1271 		printf("end of traceback\n");
1272 		DELAY(2 * MICROSEC);
1273 	}
1274 }
1275 
1276 #endif	/* __i386 */
1277 
1278 /*
1279  * Generate a stack backtrace from a saved register set.
1280  */
1281 void
1282 traceregs(struct regs *rp)
1283 {
1284 	traceback((caddr_t)rp->r_fp);
1285 }
1286 
1287 void
1288 exec_set_sp(size_t stksize)
1289 {
1290 	klwp_t *lwp = ttolwp(curthread);
1291 
1292 	lwptoregs(lwp)->r_sp = (uintptr_t)curproc->p_usrstack - stksize;
1293 }
1294 
1295 hrtime_t
1296 gethrtime_waitfree(void)
1297 {
1298 	return (dtrace_gethrtime());
1299 }
1300 
1301 hrtime_t
1302 gethrtime(void)
1303 {
1304 	return (gethrtimef());
1305 }
1306 
1307 hrtime_t
1308 gethrtime_unscaled(void)
1309 {
1310 	return (gethrtimeunscaledf());
1311 }
1312 
1313 void
1314 scalehrtime(hrtime_t *hrt)
1315 {
1316 	scalehrtimef(hrt);
1317 }
1318 
1319 void
1320 gethrestime(timespec_t *tp)
1321 {
1322 	gethrestimef(tp);
1323 }
1324 
1325 #if defined(__amd64)
1326 /*
1327  * Part of the implementation of hres_tick(); this routine is
1328  * easier in C than assembler .. called with the hres_lock held.
1329  *
1330  * XX64	Many of these timekeeping variables need to be extern'ed in a header
1331  */
1332 
1333 #include <sys/time.h>
1334 #include <sys/machlock.h>
1335 
1336 extern int one_sec;
1337 extern timestruc_t hrestime;
1338 extern int max_hres_adj;
1339 
1340 void
1341 __adj_hrestime(void)
1342 {
1343 	long long adj;
1344 
1345 	if (hrestime_adj == 0)
1346 		adj = 0;
1347 	else if (hrestime_adj > 0) {
1348 		if (hrestime_adj < max_hres_adj)
1349 			adj = hrestime_adj;
1350 		else
1351 			adj = max_hres_adj;
1352 	} else {
1353 		if (hrestime_adj < -max_hres_adj)
1354 			adj = -max_hres_adj;
1355 		else
1356 			adj = hrestime_adj;
1357 	}
1358 
1359 	timedelta -= adj;
1360 	hrestime_adj = timedelta;
1361 	hrestime.tv_nsec += adj;
1362 
1363 	while (hrestime.tv_nsec >= NANOSEC) {
1364 		one_sec++;
1365 		hrestime.tv_sec++;
1366 		hrestime.tv_nsec -= NANOSEC;
1367 	}
1368 }
1369 #endif
1370 
1371 /*
1372  * Wrapper functions to maintain backwards compability
1373  */
1374 int
1375 xcopyin(const void *uaddr, void *kaddr, size_t count)
1376 {
1377 	return (xcopyin_nta(uaddr, kaddr, count, UIO_COPY_CACHED));
1378 }
1379 
1380 int
1381 xcopyout(const void *kaddr, void *uaddr, size_t count)
1382 {
1383 	return (xcopyout_nta(kaddr, uaddr, count, UIO_COPY_CACHED));
1384 }
1385