xref: /titanic_52/usr/src/uts/intel/asm/htable.h (revision 4bff34e37def8a90f9194d81bc345c52ba20086a)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _ASM_HTABLE_H
28 #define	_ASM_HTABLE_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #include <sys/types.h>
33 
34 #ifdef	__cplusplus
35 extern "C" {
36 #endif
37 
38 #if !defined(__lint) && defined(__GNUC__)
39 
40 #if defined(__i386) || defined(__amd64)
41 
42 /*
43  * This set of atomic operations are designed primarily
44  * for some ia32 hat layer operations.
45  */
46 
47 extern __inline__ void atomic_orb(uint8_t *addr, uint8_t value)
48 {
49 	__asm__ __volatile__(
50 	    "lock; orb %%dl,%0"
51 	    : "=m" (*addr)
52 	    : "d" (value), "m" (*addr)
53 	    : "cc");
54 }
55 
56 extern __inline__ void atomic_andb(uint8_t *addr, uint8_t value)
57 {
58 	__asm__ __volatile__(
59 	    "lock; andb %%dl,%0"
60 	    : "=m" (*addr)
61 	    : "d" (value), "m" (*addr)
62 	    : "cc");
63 }
64 
65 extern __inline__ void atomic_inc16(uint16_t *addr)
66 {
67 	__asm__ __volatile__(
68 	    "lock; incw %0"
69 	    : "=m" (*addr)
70 	    : "m" (*addr)
71 	    : "cc");
72 }
73 
74 extern __inline__ void atomic_dec16(uint16_t *addr)
75 {
76 	__asm__ __volatile__(
77 	    "lock; decw %0"
78 	    : "=m" (*addr)
79 	    : "m" (*addr)
80 	    : "cc");
81 }
82 
83 extern __inline__ void mmu_tlbflush_entry(caddr_t addr)
84 {
85 	__asm__ __volatile__(
86 	    "invlpg %0"
87 	    : "=m" (*addr)
88 	    : "m" (*addr));
89 }
90 
91 #endif	/* __i386 || __amd64 */
92 
93 #endif	/* !__lint && __GNUC__ */
94 
95 #ifdef	__cplusplus
96 }
97 #endif
98 
99 #endif	/* _ASM_HTABLE_H */
100