xref: /titanic_52/usr/src/uts/intel/asm/cpu.h (revision 4c4c91100283a5863df30701c15987cf4d7ff9db)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _ASM_CPU_H
27 #define	_ASM_CPU_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifdef	__cplusplus
32 extern "C" {
33 #endif
34 
35 #if !defined(__lint) && defined(__GNUC__)
36 
37 #if defined(__i386) || defined(__amd64)
38 
39 extern __inline__ void ht_pause(void)
40 {
41 	__asm__ __volatile__(
42 	    "pause");
43 }
44 
45 #if !defined(__xpv)
46 
47 extern __inline__ void cli(void)
48 {
49 	__asm__ __volatile__(
50 	    "cli" : : : "memory");
51 }
52 
53 extern __inline__ void sti(void)
54 {
55 	__asm__ __volatile__(
56 	    "sti");
57 }
58 
59 extern __inline__ void i86_halt(void)
60 {
61 	__asm__ __volatile__(
62 	    "sti; hlt");
63 }
64 
65 #endif /* !__xpv */
66 
67 #endif	/* __i386 || defined(__amd64) */
68 
69 #if defined(__amd64)
70 
71 extern __inline__ void __set_ds(selector_t value)
72 {
73 	__asm__ __volatile__(
74 	    "movw	%0, %%ds"
75 	    : /* no output */
76 	    : "r" (value));
77 }
78 
79 extern __inline__ void __set_es(selector_t value)
80 {
81 	__asm__ __volatile__(
82 	    "movw	%0, %%es"
83 	    : /* no output */
84 	    : "r" (value));
85 }
86 
87 extern __inline__ void __set_fs(selector_t value)
88 {
89 	__asm__ __volatile__(
90 	    "movw	%0, %%fs"
91 	    : /* no output */
92 	    : "r" (value));
93 }
94 
95 extern __inline__ void __set_gs(selector_t value)
96 {
97 	__asm__ __volatile__(
98 	    "movw	%0, %%gs"
99 	    : /* no output */
100 	    : "r" (value));
101 }
102 
103 #if !defined(__xpv)
104 
105 extern __inline__ void __swapgs(void)
106 {
107 	__asm__ __volatile__(
108 	    "mfence; swapgs");
109 }
110 
111 #endif /* !__xpv */
112 
113 #endif	/* __amd64 */
114 
115 #endif	/* !__lint && __GNUC__ */
116 
117 #ifdef	__cplusplus
118 }
119 #endif
120 
121 #endif	/* _ASM_CPU_H */
122