1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_MACHCPUVAR_H 28 #define _SYS_MACHCPUVAR_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #include <sys/inttypes.h> 37 #include <sys/xc_levels.h> 38 #include <sys/tss.h> 39 #include <sys/segments.h> 40 #include <sys/rm_platter.h> 41 #include <sys/avintr.h> 42 #include <sys/mmu.h> 43 #include <sys/pte.h> 44 45 #ifndef _ASM 46 /* 47 * Machine specific fields of the cpu struct 48 * defined in common/sys/cpuvar.h. 49 * 50 * Note: This is kinda kludgy but seems to be the best 51 * of our alternatives. 52 */ 53 typedef void *cpu_pri_lev_t; 54 55 struct cpuid_info; 56 struct cmi; 57 58 struct machcpu { 59 /* define all the x_call stuff */ 60 volatile int xc_pend[X_CALL_LEVELS]; 61 volatile int xc_wait[X_CALL_LEVELS]; 62 volatile int xc_ack[X_CALL_LEVELS]; 63 volatile int xc_state[X_CALL_LEVELS]; 64 volatile int xc_retval[X_CALL_LEVELS]; 65 66 int mcpu_nodeid; /* node-id */ 67 int mcpu_pri; /* CPU priority */ 68 cpu_pri_lev_t mcpu_pri_data; /* ptr to machine dependent */ 69 /* data for setting priority */ 70 /* level */ 71 72 uint_t mcpu_mask; /* bitmask for this cpu (1<<cpu_id) */ 73 struct hat *mcpu_current_hat; /* cpu's current hat */ 74 75 struct hat_cpu_info *mcpu_hat_info; 76 77 /* i86 hardware table addresses that cannot be shared */ 78 user_desc_t *mcpu_gdt; /* GDT */ 79 gate_desc_t *mcpu_idt; /* IDT */ 80 struct tss *mcpu_tss; /* TSS */ 81 82 struct cpu_tables *mcpu_cp_tables; /* pointer to space acquired */ 83 /* while starting up */ 84 /* auxillary processors */ 85 kmutex_t mcpu_ppaddr_mutex; 86 87 caddr_t mcpu_caddr1; /* per cpu CADDR1 */ 88 caddr_t mcpu_caddr2; /* per cpu CADDR2 */ 89 void *mcpu_caddr1pte; 90 void *mcpu_caddr2pte; 91 struct softint mcpu_softinfo; 92 uint64_t pil_high_start[HIGH_LEVELS]; 93 uint64_t intrstat[PIL_MAX + 1][2]; 94 struct cpuid_info *mcpu_cpi; 95 struct cmi *mcpu_cmi; /* CPU module state */ 96 void *mcpu_cmidata; 97 #if defined(__amd64) 98 greg_t mcpu_rtmp_rsp; /* syscall: temporary %rsp stash */ 99 greg_t mcpu_rtmp_r15; /* syscall: temporary %r15 stash */ 100 #endif 101 }; 102 103 #endif /* _ASM */ 104 105 #define cpu_nodeid cpu_m.mcpu_nodeid 106 #define cpu_pri cpu_m.mcpu_pri 107 #define cpu_pri_data cpu_m.mcpu_pri_data 108 #define cpu_mask cpu_m.mcpu_mask 109 #define cpu_current_hat cpu_m.mcpu_current_hat 110 #define cpu_hat_info cpu_m.mcpu_hat_info 111 #define cpu_ppaddr_mutex cpu_m.mcpu_ppaddr_mutex 112 #define cpu_gdt cpu_m.mcpu_gdt 113 #define cpu_idt cpu_m.mcpu_idt 114 #define cpu_tss cpu_m.mcpu_tss 115 #define cpu_ldt cpu_m.mcpu_ldt 116 #define cpu_caddr1 cpu_m.mcpu_caddr1 117 #define cpu_caddr2 cpu_m.mcpu_caddr2 118 #define cpu_softinfo cpu_m.mcpu_softinfo 119 #define cpu_caddr1pte cpu_m.mcpu_caddr1pte 120 #define cpu_caddr2pte cpu_m.mcpu_caddr2pte 121 122 #ifdef __cplusplus 123 } 124 #endif 125 126 #endif /* _SYS_MACHCPUVAR_H */ 127