1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 /* 26 * Copyright 2011 Joyent, Inc. All rights reserved. 27 */ 28 29 #ifndef _SYS_MACHCPUVAR_H 30 #define _SYS_MACHCPUVAR_H 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #include <sys/inttypes.h> 37 #include <sys/x_call.h> 38 #include <sys/tss.h> 39 #include <sys/segments.h> 40 #include <sys/rm_platter.h> 41 #include <sys/avintr.h> 42 #include <sys/pte.h> 43 44 #ifndef _ASM 45 /* 46 * On a virtualized platform a virtual cpu may not be actually 47 * on a physical cpu, especially in situations where a configuration has 48 * more vcpus than pcpus. This function tells us (if it's able) if the 49 * specified vcpu is currently running on a pcpu. Note if it is not 50 * known or not able to determine, it will return the unknown state. 51 */ 52 #define VCPU_STATE_UNKNOWN 0 53 #define VCPU_ON_PCPU 1 54 #define VCPU_NOT_ON_PCPU 2 55 56 extern int vcpu_on_pcpu(processorid_t); 57 58 /* 59 * Machine specific fields of the cpu struct 60 * defined in common/sys/cpuvar.h. 61 * 62 * Note: This is kinda kludgy but seems to be the best 63 * of our alternatives. 64 */ 65 typedef void *cpu_pri_lev_t; 66 67 struct cpuid_info; 68 struct cpu_ucode_info; 69 struct cmi_hdl; 70 71 /* 72 * A note about the hypervisor affinity bits: a one bit in the affinity mask 73 * means the corresponding event channel is allowed to be serviced 74 * by this cpu. 75 */ 76 struct xen_evt_data { 77 ulong_t pending_sel[PIL_MAX + 1]; /* event array selectors */ 78 ulong_t pending_evts[PIL_MAX + 1][sizeof (ulong_t) * 8]; 79 ulong_t evt_affinity[sizeof (ulong_t) * 8]; /* service on cpu */ 80 }; 81 82 struct machcpu { 83 /* 84 * x_call fields - used for interprocessor cross calls 85 */ 86 struct xc_msg *xc_msgbox; 87 struct xc_msg *xc_free; 88 xc_data_t xc_data; 89 uint32_t xc_wait_cnt; 90 volatile uint32_t xc_work_cnt; 91 92 int mcpu_nodeid; /* node-id */ 93 int mcpu_pri; /* CPU priority */ 94 cpu_pri_lev_t mcpu_pri_data; /* ptr to machine dependent */ 95 /* data for setting priority */ 96 /* level */ 97 98 struct hat *mcpu_current_hat; /* cpu's current hat */ 99 100 struct hat_cpu_info *mcpu_hat_info; 101 102 volatile ulong_t mcpu_tlb_info; 103 104 /* i86 hardware table addresses that cannot be shared */ 105 106 user_desc_t *mcpu_gdt; /* GDT */ 107 gate_desc_t *mcpu_idt; /* current IDT */ 108 109 tss_t *mcpu_tss; /* TSS */ 110 111 kmutex_t mcpu_ppaddr_mutex; 112 caddr_t mcpu_caddr1; /* per cpu CADDR1 */ 113 caddr_t mcpu_caddr2; /* per cpu CADDR2 */ 114 uint64_t mcpu_caddr1pte; 115 uint64_t mcpu_caddr2pte; 116 117 struct softint mcpu_softinfo; 118 uint64_t pil_high_start[HIGH_LEVELS]; 119 uint64_t intrstat[PIL_MAX + 1][2]; 120 121 struct cpuid_info *mcpu_cpi; 122 123 #if defined(__amd64) 124 greg_t mcpu_rtmp_rsp; /* syscall: temporary %rsp stash */ 125 greg_t mcpu_rtmp_r15; /* syscall: temporary %r15 stash */ 126 #endif 127 128 struct vcpu_info *mcpu_vcpu_info; 129 uint64_t mcpu_gdtpa; /* hypervisor: GDT physical address */ 130 131 uint16_t mcpu_intr_pending; /* hypervisor: pending intrpt levels */ 132 uint16_t mcpu_ec_mbox; /* hypervisor: evtchn_dev mailbox */ 133 struct xen_evt_data *mcpu_evt_pend; /* hypervisor: pending events */ 134 135 volatile uint32_t *mcpu_mwait; /* MONITOR/MWAIT buffer */ 136 void (*mcpu_idle_cpu)(void); /* idle function */ 137 uint16_t mcpu_idle_type; /* CPU next idle type */ 138 uint16_t max_cstates; /* supported max cstates */ 139 140 struct cpu_ucode_info *mcpu_ucode_info; 141 142 void *mcpu_pm_mach_state; 143 struct cmi_hdl *mcpu_cmi_hdl; 144 void *mcpu_mach_ctx_ptr; 145 146 /* 147 * A stamp that is unique per processor and changes 148 * whenever an interrupt happens. Userful for detecting 149 * if a section of code gets interrupted. 150 * The high order 16 bits will hold the cpu->cpu_id. 151 * The low order bits will be incremented on every interrupt. 152 */ 153 volatile uint32_t mcpu_istamp; 154 }; 155 156 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */ 157 #define MWAIT_HALTED (1) /* mcpu_mwait set when halting */ 158 #define MWAIT_RUNNING (0) /* mcpu_mwait set to wakeup */ 159 #define MWAIT_WAKEUP_IPI (2) /* need IPI to wakeup */ 160 #define MWAIT_WAKEUP(cpu) (*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING) 161 162 #endif /* _ASM */ 163 164 /* Please DON'T add any more of this namespace-poisoning sewage here */ 165 166 #define cpu_nodeid cpu_m.mcpu_nodeid 167 #define cpu_pri cpu_m.mcpu_pri 168 #define cpu_pri_data cpu_m.mcpu_pri_data 169 #define cpu_current_hat cpu_m.mcpu_current_hat 170 #define cpu_hat_info cpu_m.mcpu_hat_info 171 #define cpu_ppaddr_mutex cpu_m.mcpu_ppaddr_mutex 172 #define cpu_gdt cpu_m.mcpu_gdt 173 #define cpu_idt cpu_m.mcpu_idt 174 #define cpu_tss cpu_m.mcpu_tss 175 #define cpu_ldt cpu_m.mcpu_ldt 176 #define cpu_caddr1 cpu_m.mcpu_caddr1 177 #define cpu_caddr2 cpu_m.mcpu_caddr2 178 #define cpu_softinfo cpu_m.mcpu_softinfo 179 #define cpu_caddr1pte cpu_m.mcpu_caddr1pte 180 #define cpu_caddr2pte cpu_m.mcpu_caddr2pte 181 182 #ifdef __cplusplus 183 } 184 #endif 185 186 #endif /* _SYS_MACHCPUVAR_H */ 187