xref: /titanic_52/usr/src/uts/i86pc/sys/drmach.h (revision a23420cf95f05ac67f2c299116a3225581e519d1)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 /*
26  * Copyright (c) 2010, Intel Corporation.
27  * All rights reserved.
28  */
29 
30 #ifndef _SYS_DRMACH_H_
31 #define	_SYS_DRMACH_H_
32 #include <sys/types.h>
33 #include <sys/memlist.h>
34 #include <sys/ddi.h>
35 #include <sys/ddi_impldefs.h>
36 #include <sys/sunddi.h>
37 #include <sys/sunndi.h>
38 #include <sys/sysevent.h>
39 #include <sys/x86_archext.h>
40 #include <sys/sbd_ioctl.h>
41 
42 #ifdef	__cplusplus
43 extern "C" {
44 #endif
45 
46 #define	MAX_BOARDS		drmach_max_boards()
47 #define	MAX_MEM_UNITS_PER_BOARD	drmach_max_mem_units_per_board()
48 #define	MAX_IO_UNITS_PER_BOARD	drmach_max_io_units_per_board()
49 #define	MAX_CMP_UNITS_PER_BOARD	drmach_max_cmp_units_per_board()
50 
51 /* DR uses MAX_CORES_PER_CMP as number of logical CPUs within a CMP. */
52 #define	MAX_CORES_PER_CMP	drmach_max_core_per_cmp()
53 
54 /* Maximum possible logical CPUs per board. */
55 #define	MAX_CPU_UNITS_PER_BOARD	(MAX_CMP_UNITS_PER_BOARD * MAX_CORES_PER_CMP)
56 
57 /* Check whether CPU is CMP. True if chip has more than one core/thread. */
58 #define	CPU_IMPL_IS_CMP(impl)	(MAX_CORES_PER_CMP > 1)
59 
60 /* CPU implementation ID for Intel Nehalem CPU. */
61 #define	X86_CPU_IMPL_NEHALEM_EX	0x062E0000
62 #define	X86_CPU_IMPL_UNKNOWN	0x00000000
63 
64 /* returned with drmach_board_find_devices callback */
65 #define	DRMACH_DEVTYPE_CPU	"cpu"
66 #define	DRMACH_DEVTYPE_MEM	"memory"
67 #define	DRMACH_DEVTYPE_PCI	"pci"
68 
69 /*
70  * x86 platform specific routines currently only defined
71  * in drmach_acpi.c and referenced by DR.
72  */
73 
74 typedef void *drmachid_t;
75 
76 typedef struct {
77 	boolean_t	assigned;
78 	boolean_t	powered;
79 	boolean_t	configured;
80 	boolean_t	busy;
81 	boolean_t	empty;
82 	sbd_cond_t	cond;
83 	char		type[SBD_TYPE_LEN];
84 	char		info[SBD_MAX_INFO];
85 } drmach_status_t;
86 
87 typedef struct {
88 	int	size;
89 	char	*copts;
90 } drmach_opts_t;
91 
92 typedef struct {
93 	uint64_t mi_basepa;
94 	uint64_t mi_size;
95 	uint64_t mi_slice_base;
96 	uint64_t mi_slice_top;
97 	uint64_t mi_slice_size;
98 	uint64_t mi_alignment_mask;
99 } drmach_mem_info_t;
100 
101 extern uint_t		drmach_max_boards(void);
102 extern uint_t		drmach_max_io_units_per_board(void);
103 extern uint_t		drmach_max_cmp_units_per_board(void);
104 extern uint_t		drmach_max_mem_units_per_board(void);
105 extern uint_t		drmach_max_core_per_cmp(void);
106 
107 extern sbd_error_t	*drmach_get_dip(drmachid_t id, dev_info_t **dip);
108 extern sbd_error_t	*drmach_release(drmachid_t id);
109 extern sbd_error_t	*drmach_pre_op(int cmd, drmachid_t id,
110 				drmach_opts_t *opts, void *devsetp);
111 extern sbd_error_t	*drmach_post_op(int cmd, drmachid_t id,
112 				drmach_opts_t *opts, int rv);
113 extern sbd_error_t	*drmach_configure(drmachid_t id, int flags);
114 extern sbd_error_t	*drmach_unconfigure(drmachid_t id, int flags);
115 extern sbd_error_t	*drmach_status(drmachid_t id, drmach_status_t *stat);
116 extern sbd_error_t	*drmach_passthru(drmachid_t id,
117 						drmach_opts_t *opts);
118 
119 extern sbd_error_t	*drmach_board_find_devices(drmachid_t id, void *a,
120 		sbd_error_t *(*found)(void *a, const char *, int, drmachid_t));
121 extern int		drmach_board_lookup(int bnum, drmachid_t *id);
122 extern sbd_error_t	*drmach_board_name(int bnum, char *buf, int buflen);
123 extern sbd_error_t	*drmach_board_assign(int bnum, drmachid_t *id);
124 extern sbd_error_t	*drmach_board_unassign(drmachid_t id);
125 extern sbd_error_t	*drmach_board_poweroff(drmachid_t id);
126 extern sbd_error_t	*drmach_board_poweron(drmachid_t id);
127 extern sbd_error_t	*drmach_board_test(drmachid_t id, drmach_opts_t *opts,
128 						int force);
129 extern sbd_error_t	*drmach_board_connect(drmachid_t id,
130 						drmach_opts_t *opts);
131 extern sbd_error_t	*drmach_board_disconnect(drmachid_t id,
132 						drmach_opts_t *opts);
133 extern sbd_error_t	*drmach_board_deprobe(drmachid_t id);
134 extern int		drmach_board_is_floating(drmachid_t);
135 
136 extern sbd_error_t	*drmach_cpu_get_id(drmachid_t id, processorid_t *cpuid);
137 extern sbd_error_t	*drmach_cpu_get_impl(drmachid_t id, int *ip);
138 extern sbd_error_t	*drmach_cpu_disconnect(drmachid_t id);
139 
140 extern sbd_error_t	*drmach_io_is_attached(drmachid_t id, int *yes);
141 extern sbd_error_t	*drmach_io_post_attach(drmachid_t id);
142 extern sbd_error_t	*drmach_io_pre_release(drmachid_t id);
143 extern sbd_error_t	*drmach_io_unrelease(drmachid_t id);
144 extern sbd_error_t	*drmach_io_post_release(drmachid_t id);
145 
146 extern sbd_error_t	*drmach_mem_get_slice_info(drmachid_t id,
147 				uint64_t *basepa, uint64_t *endpa,
148 				uint64_t *sizep);
149 extern sbd_error_t	*drmach_mem_get_memlist(drmachid_t id,
150 				struct memlist **ml);
151 extern sbd_error_t	*drmach_mem_get_info(drmachid_t, drmach_mem_info_t *);
152 extern sbd_error_t	*drmach_mem_enable(drmachid_t id);
153 extern sbd_error_t	*drmach_mem_disable(drmachid_t id);
154 extern sbd_error_t	*drmach_mem_add_span(drmachid_t id,
155 				uint64_t basepa, uint64_t size);
156 extern sbd_error_t	*drmach_mem_del_span(drmachid_t id,
157 				uint64_t basepa, uint64_t size);
158 extern sbd_error_t	*drmach_copy_rename_init(
159 				drmachid_t dst_id, drmachid_t src_id,
160 				struct memlist *src_copy_ml,
161 				drmachid_t *pgm_id);
162 extern sbd_error_t	*drmach_copy_rename_fini(drmachid_t id);
163 extern void		drmach_copy_rename(drmachid_t id);
164 extern int		drmach_copy_rename_need_suspend(drmachid_t id);
165 
166 extern int		drmach_log_sysevent(int board, char *hint, int flag,
167 					    int verbose);
168 
169 extern int		drmach_verify_sr(dev_info_t *dip, int sflag);
170 extern void		drmach_suspend_last();
171 extern void		drmach_resume_first();
172 
173 #ifdef __cplusplus
174 }
175 #endif
176 
177 #endif /* _SYS_DRMACH_H_ */
178