xref: /titanic_52/usr/src/uts/i86pc/sys/cram.h (revision 0eb822a1c0c2bea495647510b75f77f0e57633eb)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc.	*/
23 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T	*/
24 /*	  All Rights Reserved  	*/
25 
26 #ifndef _SYS_CRAM_H
27 #define	_SYS_CRAM_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #include <sys/types.h>
32 #include <sys/ksynch.h>
33 #include <sys/kmem.h>
34 
35 #ifdef	__cplusplus
36 extern "C" {
37 #endif
38 
39 /*
40  * Defines for accessing the PC AT CMOS ram.
41  */
42 
43 #define	CMOS_ADDR	0x70	/* I/O port address for CMOS ram address */
44 #define	CMOS_DATA	0x71	/* I/O port address for CMOS ram data */
45 
46 #define	DSB		0x0e	/* Diagnostic status byte ram address */
47 #define	SSB		0x0f	/* Shutdown status byte ram address */
48 #define	DDTB		0x10	/* Diskette drive type byte ram address */
49 #define	FDTB		0x12	/* Fixed disk type byte ram address */
50 #define	EB		0x14	/* Equipment byte ram address */
51 #define	BMLOW		0x15	/* Base mem size low byte ram address */
52 #define	BMHIGH		0x16	/* Base mem size high byte ram address */
53 #define	EMLOW		0x17	/* Expansion mem size low byte ram address */
54 #define	EMHIGH		0x18	/* Expansion mem size high byte ram address */
55 #define	DCEB		0x19	/* Drive C Extended byte ram address */
56 #define	DDEB		0x1a	/* Drive D Extended byte ram address */
57 #define	CKSUMLOW	0x2e	/* Checksum low byte ram address */
58 #define	CKSUMHIGH	0x2f	/* Checksum high byte ram address */
59 #define	EMLOW2		0x30	/* Expansion mem size low byte ram address */
60 #define	EMHIGH2		0x31	/* Expansion mem size high byte ram address */
61 #define	DCB		0x32	/* Date century byte ram address */
62 #define	IF		0x33	/* Information flag ram address */
63 
64 /*
65  * ioctls for accessing CMOS ram.
66  */
67 #define	CMOSIOC	('C' << 8)
68 
69 #define	CMOSREAD	(CMOSIOC | 0x01)
70 #define	CMOSWRITE	(CMOSIOC | 0x02)
71 
72 extern unsigned char	CMOSread();
73 
74 /* Ports for interacting with chip at */
75 
76 #define	CMOSADDR	0x70 	/* Use to select RAM address */
77 #define	CMOSDATA	0x71	/* R/W data */
78 
79 /* Number of cmos bytes */
80 
81 #define	CMOSSIZE	0x40	/* 64 addressable bytes in chip */
82 
83 /* Addresses of interest */
84 
85 #define	CMOSDIAG	0x0e	/* Diagnostic Status */
86 #define	CMOSFDT		0x10	/* Floppy Disk Type */
87 #define	CMOSHDT		0x12	/* Hard Disk Type; bits 7-4 are 1st drive */
88 #define	CMOSEQP		0x14	/* Diskette, Video, and CoProcessor info */
89 #define	CMOSADF		0x2d	/* Additional flags - Compaq VDU info */
90 
91 /* Shifts of interest */
92 
93 #define	VID_SHFT	4	/* Shift display type bits into 0-3 */
94 
95 /* masks of interest */
96 #define	CMPQVDU		0x04	/* Compaq VDU bit */
97 #define	CMPQDMM		0x01	/* Compaq Dual Mode Monitor bit */
98 
99 #ifdef	__cplusplus
100 }
101 #endif
102 
103 #endif	/* _SYS_CRAM_H */
104