1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 23 /* 24 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 25 * Use is subject to license terms. 26 */ 27 28 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ 29 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */ 30 /* All Rights Reserved */ 31 /* */ 32 /* Copyright (c) 1987, 1988 Microsoft Corporation */ 33 /* All Rights Reserved */ 34 /* */ 35 36 #pragma ident "%Z%%M% %I% %E% SMI" 37 38 #include <sys/types.h> 39 #include <sys/sysmacros.h> 40 #include <sys/param.h> 41 #include <sys/signal.h> 42 #include <sys/systm.h> 43 #include <sys/user.h> 44 #include <sys/proc.h> 45 #include <sys/disp.h> 46 #include <sys/class.h> 47 #include <sys/core.h> 48 #include <sys/syscall.h> 49 #include <sys/cpuvar.h> 50 #include <sys/vm.h> 51 #include <sys/sysinfo.h> 52 #include <sys/fault.h> 53 #include <sys/stack.h> 54 #include <sys/mmu.h> 55 #include <sys/psw.h> 56 #include <sys/regset.h> 57 #include <sys/fp.h> 58 #include <sys/trap.h> 59 #include <sys/kmem.h> 60 #include <sys/vtrace.h> 61 #include <sys/cmn_err.h> 62 #include <sys/prsystm.h> 63 #include <sys/mutex_impl.h> 64 #include <sys/machsystm.h> 65 #include <sys/archsystm.h> 66 #include <sys/sdt.h> 67 #include <sys/avintr.h> 68 #include <sys/kobj.h> 69 70 #include <vm/hat.h> 71 72 #include <vm/seg_kmem.h> 73 #include <vm/as.h> 74 #include <vm/seg.h> 75 #include <vm/hat_pte.h> 76 77 #include <sys/procfs.h> 78 79 #include <sys/reboot.h> 80 #include <sys/debug.h> 81 #include <sys/debugreg.h> 82 #include <sys/modctl.h> 83 #include <sys/aio_impl.h> 84 #include <sys/tnf.h> 85 #include <sys/tnf_probe.h> 86 #include <sys/cred.h> 87 #include <sys/mman.h> 88 #include <sys/x86_archext.h> 89 #include <sys/copyops.h> 90 #include <c2/audit.h> 91 #include <sys/ftrace.h> 92 #include <sys/panic.h> 93 #include <sys/traptrace.h> 94 #include <sys/ontrap.h> 95 #include <sys/cpc_impl.h> 96 97 #define USER 0x10000 /* user-mode flag added to trap type */ 98 99 static const char *trap_type_mnemonic[] = { 100 "de", "db", "2", "bp", 101 "of", "br", "ud", "nm", 102 "df", "9", "ts", "np", 103 "ss", "gp", "pf", "15", 104 "mf", "ac", "mc", "xf" 105 }; 106 107 static const char *trap_type[] = { 108 "Divide error", /* trap id 0 */ 109 "Debug", /* trap id 1 */ 110 "NMI interrupt", /* trap id 2 */ 111 "Breakpoint", /* trap id 3 */ 112 "Overflow", /* trap id 4 */ 113 "BOUND range exceeded", /* trap id 5 */ 114 "Invalid opcode", /* trap id 6 */ 115 "Device not available", /* trap id 7 */ 116 "Double fault", /* trap id 8 */ 117 "Coprocessor segment overrun", /* trap id 9 */ 118 "Invalid TSS", /* trap id 10 */ 119 "Segment not present", /* trap id 11 */ 120 "Stack segment fault", /* trap id 12 */ 121 "General protection", /* trap id 13 */ 122 "Page fault", /* trap id 14 */ 123 "Reserved", /* trap id 15 */ 124 "x87 floating point error", /* trap id 16 */ 125 "Alignment check", /* trap id 17 */ 126 "Machine check", /* trap id 18 */ 127 "SIMD floating point exception", /* trap id 19 */ 128 }; 129 130 #define TRAP_TYPES (sizeof (trap_type) / sizeof (trap_type[0])) 131 132 int tudebug = 0; 133 int tudebugbpt = 0; 134 int tudebugfpe = 0; 135 int tudebugsse = 0; 136 137 #if defined(TRAPDEBUG) || defined(lint) 138 int tdebug = 0; 139 int lodebug = 0; 140 int faultdebug = 0; 141 #else 142 #define tdebug 0 143 #define lodebug 0 144 #define faultdebug 0 145 #endif /* defined(TRAPDEBUG) || defined(lint) */ 146 147 #if defined(TRAPTRACE) 148 static void dump_ttrace(void); 149 #endif /* TRAPTRACE */ 150 static void dumpregs(struct regs *); 151 static void showregs(uint_t, struct regs *, caddr_t); 152 static void dump_tss(void); 153 static int kern_gpfault(struct regs *); 154 155 struct trap_info { 156 struct regs *trap_regs; 157 uint_t trap_type; 158 caddr_t trap_addr; 159 }; 160 161 /*ARGSUSED*/ 162 static int 163 die(uint_t type, struct regs *rp, caddr_t addr, processorid_t cpuid) 164 { 165 struct trap_info ti; 166 const char *trap_name, *trap_mnemonic; 167 168 if (type < TRAP_TYPES) { 169 trap_name = trap_type[type]; 170 trap_mnemonic = trap_type_mnemonic[type]; 171 } else { 172 trap_name = "trap"; 173 trap_mnemonic = "-"; 174 } 175 176 #ifdef TRAPTRACE 177 TRAPTRACE_FREEZE; 178 #endif 179 180 ti.trap_regs = rp; 181 ti.trap_type = type & ~USER; 182 ti.trap_addr = addr; 183 184 curthread->t_panic_trap = &ti; 185 186 if (type == T_PGFLT && addr < (caddr_t)KERNELBASE) { 187 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p " 188 "occurred in module \"%s\" due to %s", 189 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr, 190 mod_containing_pc((caddr_t)rp->r_pc), 191 addr < (caddr_t)PAGESIZE ? 192 "a NULL pointer dereference" : 193 "an illegal access to a user address"); 194 } else 195 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p", 196 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr); 197 return (0); 198 } 199 200 /* 201 * Rewrite the instruction at pc to be an int $T_SYSCALLINT instruction. 202 * 203 * int <vector> is two bytes: 0xCD <vector> 204 */ 205 206 #define SLOW_SCALL_SIZE 2 207 208 static int 209 rewrite_syscall(caddr_t pc) 210 { 211 uchar_t instr[SLOW_SCALL_SIZE] = { 0xCD, T_SYSCALLINT }; 212 213 if (uwrite(curthread->t_procp, instr, SLOW_SCALL_SIZE, 214 (uintptr_t)pc) != 0) 215 return (1); 216 217 return (0); 218 } 219 220 /* 221 * Test to see if the instruction at pc is sysenter or syscall. The second 222 * argument should be the x86 feature flag corresponding to the expected 223 * instruction. 224 * 225 * sysenter is two bytes: 0x0F 0x34 226 * syscall is two bytes: 0x0F 0x05 227 */ 228 229 #define FAST_SCALL_SIZE 2 230 231 static int 232 instr_is_fast_syscall(caddr_t pc, int which) 233 { 234 uchar_t instr[FAST_SCALL_SIZE]; 235 236 ASSERT(which == X86_SEP || which == X86_ASYSC); 237 238 if (copyin_nowatch(pc, (caddr_t)instr, FAST_SCALL_SIZE) != 0 || 239 instr[0] != 0x0F) 240 return (0); 241 242 if ((which == X86_SEP && instr[1] == 0x34) || 243 (which == X86_ASYSC && instr[1] == 0x05)) 244 return (1); 245 246 return (0); 247 } 248 249 /* 250 * Test to see if the instruction at pc is a system call instruction. 251 * 252 * The bytes of an lcall instruction used for the syscall trap. 253 * static uchar_t lcall[7] = { 0x9a, 0, 0, 0, 0, 0x7, 0 }; 254 * static uchar_t lcallalt[7] = { 0x9a, 0, 0, 0, 0, 0x27, 0 }; 255 */ 256 257 #define LCALLSIZE 7 258 259 static int 260 instr_is_syscall(caddr_t pc) 261 { 262 uchar_t instr[LCALLSIZE]; 263 264 if (copyin_nowatch(pc, (caddr_t)instr, LCALLSIZE) == 0 && 265 instr[0] == 0x9a && 266 instr[1] == 0 && 267 instr[2] == 0 && 268 instr[3] == 0 && 269 instr[4] == 0 && 270 (instr[5] == 0x7 || instr[5] == 0x27) && 271 instr[6] == 0) 272 return (1); 273 274 return (0); 275 } 276 277 #ifdef __amd64 278 279 /* 280 * In the first revisions of AMD64 CPUs produced by AMD, the LAHF and 281 * SAHF instructions were not implemented in 64bit mode. Later revisions 282 * did implement these instructions. An extension to the cpuid instruction 283 * was added to check for the capability of executing these instructions 284 * in 64bit mode. 285 * 286 * Intel originally did not implement these instructions in EM64T either, 287 * but added them in later revisions. 288 * 289 * So, there are different chip revisions by both vendors out there that 290 * may or may not implement these instructions. The easy solution is to 291 * just always emulate these instructions on demand. 292 * 293 * SAHF == store %ah in the lower 8 bits of %rflags (opcode 0x9e) 294 * LAHF == load the lower 8 bits of %rflags into %ah (opcode 0x9f) 295 */ 296 297 #define LSAHFSIZE 1 298 299 static int 300 instr_is_lsahf(caddr_t pc, uchar_t *instr) 301 { 302 if (copyin_nowatch(pc, (caddr_t)instr, LSAHFSIZE) == 0 && 303 (*instr == 0x9e || *instr == 0x9f)) 304 return (1); 305 return (0); 306 } 307 308 /* 309 * Emulate the LAHF and SAHF instructions. The reference manuals define 310 * these instructions to always load/store bit 1 as a 1, and bits 3 and 5 311 * as a 0. The other, defined, bits are copied (the PS_ICC bits and PS_P). 312 * 313 * Note that %ah is bits 8-15 of %rax. 314 */ 315 static void 316 emulate_lsahf(struct regs *rp, uchar_t instr) 317 { 318 if (instr == 0x9e) { 319 /* sahf. Copy bits from %ah to flags. */ 320 rp->r_ps = (rp->r_ps & ~0xff) | 321 ((rp->r_rax >> 8) & PSL_LSAHFMASK) | PS_MB1; 322 } else { 323 /* lahf. Copy bits from flags to %ah. */ 324 rp->r_rax = (rp->r_rax & ~0xff00) | 325 (((rp->r_ps & PSL_LSAHFMASK) | PS_MB1) << 8); 326 } 327 rp->r_pc += LSAHFSIZE; 328 } 329 #endif /* __amd64 */ 330 331 #ifdef OPTERON_ERRATUM_91 332 333 /* 334 * Test to see if the instruction at pc is a prefetch instruction. 335 * 336 * The first byte of prefetch instructions is always 0x0F. 337 * The second byte is 0x18 for regular prefetch or 0x0D for AMD 3dnow prefetch. 338 * The third byte is between 0 and 3 inclusive. 339 */ 340 341 #define PREFETCHSIZE 3 342 343 static int 344 cmp_to_prefetch(uchar_t *p) 345 { 346 if (*p == 0x0F && (*(p+1) == 0x18 || *(p+1) == 0x0D) && *(p+2) <= 3) 347 return (1); 348 return (0); 349 } 350 351 static int 352 instr_is_prefetch(caddr_t pc) 353 { 354 uchar_t instr[PREFETCHSIZE]; 355 int error; 356 357 error = copyin_nowatch(pc, (caddr_t)instr, PREFETCHSIZE); 358 359 if (error == 0 && cmp_to_prefetch(instr)) 360 return (1); 361 return (0); 362 } 363 364 #endif /* OPTERON_ERRATUM_91 */ 365 366 /* 367 * Called from the trap handler when a processor trap occurs. 368 * 369 * Note: All user-level traps that might call stop() must exit 370 * trap() by 'goto out' or by falling through. 371 */ 372 void 373 trap(struct regs *rp, caddr_t addr, processorid_t cpuid) 374 { 375 kthread_t *cur_thread = curthread; 376 enum seg_rw rw; 377 unsigned type; 378 extern int stop_on_fault(uint_t, k_siginfo_t *); 379 proc_t *p = ttoproc(cur_thread); 380 klwp_t *lwp = ttolwp(cur_thread); 381 uintptr_t lofault; 382 faultcode_t pagefault(), res, errcode; 383 enum fault_type fault_type; 384 k_siginfo_t siginfo; 385 uint_t fault = 0; 386 int mstate; 387 int sicode = 0; 388 int watchcode; 389 int watchpage; 390 caddr_t vaddr; 391 size_t sz; 392 int ta; 393 #ifdef __amd64 394 uchar_t instr; 395 #endif 396 397 ASSERT_STACK_ALIGNED(); 398 399 type = rp->r_trapno; 400 CPU_STATS_ADDQ(CPU, sys, trap, 1); 401 402 ASSERT(cur_thread->t_schedflag & TS_DONT_SWAP); 403 404 if (type == T_PGFLT) { 405 406 errcode = rp->r_err; 407 if (errcode & PF_ERR_WRITE) 408 rw = S_WRITE; 409 else if ((caddr_t)rp->r_pc == addr || 410 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) 411 rw = S_EXEC; 412 else 413 rw = S_READ; 414 415 #if defined(__i386) 416 /* 417 * Pentium Pro work-around 418 */ 419 if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) { 420 uint_t attr; 421 uint_t priv_violation; 422 uint_t access_violation; 423 424 if (hat_getattr(addr < (caddr_t)kernelbase ? 425 curproc->p_as->a_hat : kas.a_hat, addr, &attr) 426 == -1) { 427 errcode &= ~PF_ERR_PROT; 428 } else { 429 priv_violation = (errcode & PF_ERR_USER) && 430 !(attr & PROT_USER); 431 access_violation = (errcode & PF_ERR_WRITE) && 432 !(attr & PROT_WRITE); 433 if (!priv_violation && !access_violation) 434 goto cleanup; 435 } 436 } 437 #endif /* __i386 */ 438 439 } 440 441 if (tdebug) 442 showregs(type, rp, addr); 443 444 if (USERMODE(rp->r_cs)) { 445 /* 446 * Set up the current cred to use during this trap. u_cred 447 * no longer exists. t_cred is used instead. 448 * The current process credential applies to the thread for 449 * the entire trap. If trapping from the kernel, this 450 * should already be set up. 451 */ 452 if (cur_thread->t_cred != p->p_cred) { 453 cred_t *oldcred = cur_thread->t_cred; 454 /* 455 * DTrace accesses t_cred in probe context. t_cred 456 * must always be either NULL, or point to a valid, 457 * allocated cred structure. 458 */ 459 cur_thread->t_cred = crgetcred(); 460 crfree(oldcred); 461 } 462 ASSERT(lwp != NULL); 463 type |= USER; 464 ASSERT(lwptoregs(lwp) == rp); 465 lwp->lwp_state = LWP_SYS; 466 467 switch (type) { 468 case T_PGFLT + USER: 469 if ((caddr_t)rp->r_pc == addr) 470 mstate = LMS_TFAULT; 471 else 472 mstate = LMS_DFAULT; 473 break; 474 default: 475 mstate = LMS_TRAP; 476 break; 477 } 478 /* Kernel probe */ 479 TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 480 tnf_microstate, state, mstate); 481 mstate = new_mstate(cur_thread, mstate); 482 483 bzero(&siginfo, sizeof (siginfo)); 484 } 485 486 switch (type) { 487 case T_PGFLT + USER: 488 case T_SGLSTP: 489 case T_SGLSTP + USER: 490 case T_BPTFLT + USER: 491 break; 492 493 default: 494 FTRACE_2("trap(): type=0x%lx, regs=0x%lx", 495 (ulong_t)type, (ulong_t)rp); 496 break; 497 } 498 499 switch (type) { 500 default: 501 if (type & USER) { 502 if (tudebug) 503 showregs(type, rp, (caddr_t)0); 504 printf("trap: Unknown trap type %d in user mode\n", 505 type & ~USER); 506 siginfo.si_signo = SIGILL; 507 siginfo.si_code = ILL_ILLTRP; 508 siginfo.si_addr = (caddr_t)rp->r_pc; 509 siginfo.si_trapno = type & ~USER; 510 fault = FLTILL; 511 break; 512 } else { 513 (void) die(type, rp, addr, cpuid); 514 /*NOTREACHED*/ 515 } 516 517 case T_PGFLT: /* system page fault */ 518 /* 519 * If we're under on_trap() protection (see <sys/ontrap.h>), 520 * set ot_trap and longjmp back to the on_trap() call site. 521 */ 522 if ((cur_thread->t_ontrap != NULL) && 523 (cur_thread->t_ontrap->ot_prot & OT_DATA_ACCESS)) { 524 curthread->t_ontrap->ot_trap |= OT_DATA_ACCESS; 525 longjmp(&curthread->t_ontrap->ot_jmpbuf); 526 } 527 528 /* 529 * See if we can handle as pagefault. Save lofault 530 * across this. Here we assume that an address 531 * less than KERNELBASE is a user fault. 532 * We can do this as copy.s routines verify that the 533 * starting address is less than KERNELBASE before 534 * starting and because we know that we always have 535 * KERNELBASE mapped as invalid to serve as a "barrier". 536 */ 537 lofault = cur_thread->t_lofault; 538 cur_thread->t_lofault = 0; 539 540 mstate = new_mstate(cur_thread, LMS_KFAULT); 541 542 if (addr < (caddr_t)kernelbase) { 543 res = pagefault(addr, 544 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 0); 545 if (res == FC_NOMAP && 546 addr < p->p_usrstack && 547 grow(addr)) 548 res = 0; 549 } else { 550 res = pagefault(addr, 551 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 1); 552 } 553 (void) new_mstate(cur_thread, mstate); 554 555 /* 556 * Restore lofault. If we resolved the fault, exit. 557 * If we didn't and lofault wasn't set, die. 558 */ 559 cur_thread->t_lofault = lofault; 560 if (res == 0) 561 goto cleanup; 562 563 #if defined(OPTERON_ERRATUM_93) && defined(_LP64) 564 if (lofault == 0 && opteron_erratum_93) { 565 /* 566 * Workaround for Opteron Erratum 93. On return from 567 * a System Managment Interrupt at a HLT instruction 568 * the %rip might be truncated to a 32 bit value. 569 * BIOS is supposed to fix this, but some don't. 570 * If this occurs we simply restore the high order bits. 571 * The HLT instruction is 1 byte of 0xf4. 572 */ 573 uintptr_t rip = rp->r_pc; 574 575 if ((rip & 0xfffffffful) == rip) { 576 rip |= 0xfffffffful << 32; 577 if (hat_getpfnum(kas.a_hat, (caddr_t)rip) != 578 PFN_INVALID && 579 (*(uchar_t *)rip == 0xf4 || 580 *(uchar_t *)(rip - 1) == 0xf4)) { 581 rp->r_pc = rip; 582 goto cleanup; 583 } 584 } 585 } 586 #endif /* OPTERON_ERRATUM_93 && _LP64 */ 587 588 #ifdef OPTERON_ERRATUM_91 589 if (lofault == 0 && opteron_erratum_91) { 590 /* 591 * Workaround for Opteron Erratum 91. Prefetches may 592 * generate a page fault (they're not supposed to do 593 * that!). If this occurs we simply return back to the 594 * instruction. 595 */ 596 caddr_t pc = (caddr_t)rp->r_pc; 597 598 /* 599 * If the faulting PC is not mapped, this is a 600 * legitimate kernel page fault that must result in a 601 * panic. If the faulting PC is mapped, it could contain 602 * a prefetch instruction. Check for that here. 603 */ 604 if (hat_getpfnum(kas.a_hat, pc) != PFN_INVALID) { 605 if (cmp_to_prefetch((uchar_t *)pc)) { 606 #ifdef DEBUG 607 cmn_err(CE_WARN, "Opteron erratum 91 " 608 "occurred: kernel prefetch" 609 " at %p generated a page fault!", 610 (void *)rp->r_pc); 611 #endif /* DEBUG */ 612 goto cleanup; 613 } 614 } 615 (void) die(type, rp, addr, cpuid); 616 } 617 #endif /* OPTERON_ERRATUM_91 */ 618 619 if (lofault == 0) 620 (void) die(type, rp, addr, cpuid); 621 622 /* 623 * Cannot resolve fault. Return to lofault. 624 */ 625 if (lodebug) { 626 showregs(type, rp, addr); 627 traceregs(rp); 628 } 629 if (FC_CODE(res) == FC_OBJERR) 630 res = FC_ERRNO(res); 631 else 632 res = EFAULT; 633 rp->r_r0 = res; 634 rp->r_pc = cur_thread->t_lofault; 635 goto cleanup; 636 637 case T_PGFLT + USER: /* user page fault */ 638 if (faultdebug) { 639 char *fault_str; 640 641 switch (rw) { 642 case S_READ: 643 fault_str = "read"; 644 break; 645 case S_WRITE: 646 fault_str = "write"; 647 break; 648 case S_EXEC: 649 fault_str = "exec"; 650 break; 651 default: 652 fault_str = ""; 653 break; 654 } 655 printf("user %s fault: addr=0x%lx errcode=0x%x\n", 656 fault_str, (uintptr_t)addr, errcode); 657 } 658 659 #if defined(OPTERON_ERRATUM_100) && defined(_LP64) 660 /* 661 * Workaround for AMD erratum 100 662 * 663 * A 32-bit process may receive a page fault on a non 664 * 32-bit address by mistake. The range of the faulting 665 * address will be 666 * 667 * 0xffffffff80000000 .. 0xffffffffffffffff or 668 * 0x0000000100000000 .. 0x000000017fffffff 669 * 670 * The fault is always due to an instruction fetch, however 671 * the value of r_pc should be correct (in 32 bit range), 672 * so we ignore the page fault on the bogus address. 673 */ 674 if (p->p_model == DATAMODEL_ILP32 && 675 (0xffffffff80000000 <= (uintptr_t)addr || 676 (0x100000000 <= (uintptr_t)addr && 677 (uintptr_t)addr <= 0x17fffffff))) { 678 if (!opteron_erratum_100) 679 panic("unexpected erratum #100"); 680 if (rp->r_pc <= 0xffffffff) 681 goto out; 682 } 683 #endif /* OPTERON_ERRATUM_100 && _LP64 */ 684 685 ASSERT(!(curthread->t_flag & T_WATCHPT)); 686 watchpage = (pr_watch_active(p) && pr_is_watchpage(addr, rw)); 687 #ifdef __i386 688 /* 689 * In 32-bit mode, the lcall (system call) instruction fetches 690 * one word from the stack, at the stack pointer, because of the 691 * way the call gate is constructed. This is a bogus 692 * read and should not be counted as a read watchpoint. 693 * We work around the problem here by testing to see if 694 * this situation applies and, if so, simply jumping to 695 * the code in locore.s that fields the system call trap. 696 * The registers on the stack are already set up properly 697 * due to the match between the call gate sequence and the 698 * trap gate sequence. We just have to adjust the pc. 699 */ 700 if (watchpage && addr == (caddr_t)rp->r_sp && 701 rw == S_READ && instr_is_syscall((caddr_t)rp->r_pc)) { 702 extern void watch_syscall(void); 703 704 rp->r_pc += LCALLSIZE; 705 watch_syscall(); /* never returns */ 706 /* NOTREACHED */ 707 } 708 #endif /* __i386 */ 709 vaddr = addr; 710 if (!watchpage || (sz = instr_size(rp, &vaddr, rw)) <= 0) 711 fault_type = (errcode & PF_ERR_PROT)? F_PROT: F_INVAL; 712 else if ((watchcode = pr_is_watchpoint(&vaddr, &ta, 713 sz, NULL, rw)) != 0) { 714 if (ta) { 715 do_watch_step(vaddr, sz, rw, 716 watchcode, rp->r_pc); 717 fault_type = F_INVAL; 718 } else { 719 bzero(&siginfo, sizeof (siginfo)); 720 siginfo.si_signo = SIGTRAP; 721 siginfo.si_code = watchcode; 722 siginfo.si_addr = vaddr; 723 siginfo.si_trapafter = 0; 724 siginfo.si_pc = (caddr_t)rp->r_pc; 725 fault = FLTWATCH; 726 break; 727 } 728 } else { 729 /* XXX pr_watch_emul() never succeeds (for now) */ 730 if (rw != S_EXEC && pr_watch_emul(rp, vaddr, rw)) 731 goto out; 732 do_watch_step(vaddr, sz, rw, 0, 0); 733 fault_type = F_INVAL; 734 } 735 736 res = pagefault(addr, fault_type, rw, 0); 737 738 /* 739 * If pagefault() succeeded, ok. 740 * Otherwise attempt to grow the stack. 741 */ 742 if (res == 0 || 743 (res == FC_NOMAP && 744 addr < p->p_usrstack && 745 grow(addr))) { 746 lwp->lwp_lastfault = FLTPAGE; 747 lwp->lwp_lastfaddr = addr; 748 if (prismember(&p->p_fltmask, FLTPAGE)) { 749 bzero(&siginfo, sizeof (siginfo)); 750 siginfo.si_addr = addr; 751 (void) stop_on_fault(FLTPAGE, &siginfo); 752 } 753 goto out; 754 } else if (res == FC_PROT && addr < p->p_usrstack && 755 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) { 756 report_stack_exec(p, addr); 757 } 758 759 #ifdef OPTERON_ERRATUM_91 760 /* 761 * Workaround for Opteron Erratum 91. Prefetches may generate a 762 * page fault (they're not supposed to do that!). If this 763 * occurs we simply return back to the instruction. 764 * 765 * We rely on copyin to properly fault in the page with r_pc. 766 */ 767 if (opteron_erratum_91 && 768 addr != (caddr_t)rp->r_pc && 769 instr_is_prefetch((caddr_t)rp->r_pc)) { 770 #ifdef DEBUG 771 cmn_err(CE_WARN, "Opteron erratum 91 occurred: " 772 "prefetch at %p in pid %d generated a trap!", 773 (void *)rp->r_pc, p->p_pid); 774 #endif /* DEBUG */ 775 goto out; 776 } 777 #endif /* OPTERON_ERRATUM_91 */ 778 779 if (tudebug) 780 showregs(type, rp, addr); 781 /* 782 * In the case where both pagefault and grow fail, 783 * set the code to the value provided by pagefault. 784 * We map all errors returned from pagefault() to SIGSEGV. 785 */ 786 bzero(&siginfo, sizeof (siginfo)); 787 siginfo.si_addr = addr; 788 switch (FC_CODE(res)) { 789 case FC_HWERR: 790 case FC_NOSUPPORT: 791 siginfo.si_signo = SIGBUS; 792 siginfo.si_code = BUS_ADRERR; 793 fault = FLTACCESS; 794 break; 795 case FC_ALIGN: 796 siginfo.si_signo = SIGBUS; 797 siginfo.si_code = BUS_ADRALN; 798 fault = FLTACCESS; 799 break; 800 case FC_OBJERR: 801 if ((siginfo.si_errno = FC_ERRNO(res)) != EINTR) { 802 siginfo.si_signo = SIGBUS; 803 siginfo.si_code = BUS_OBJERR; 804 fault = FLTACCESS; 805 } 806 break; 807 default: /* FC_NOMAP or FC_PROT */ 808 siginfo.si_signo = SIGSEGV; 809 siginfo.si_code = 810 (res == FC_NOMAP)? SEGV_MAPERR : SEGV_ACCERR; 811 fault = FLTBOUNDS; 812 break; 813 } 814 break; 815 816 case T_ILLINST + USER: /* invalid opcode fault */ 817 /* 818 * If the syscall instruction is disabled due to LDT usage, a 819 * user program that attempts to execute it will trigger a #ud 820 * trap. Check for that case here. If this occurs on a CPU which 821 * doesn't even support syscall, the result of all of this will 822 * be to emulate that particular instruction. 823 */ 824 if (p->p_ldt != NULL && 825 instr_is_fast_syscall((caddr_t)rp->r_pc, X86_ASYSC)) { 826 if (rewrite_syscall((caddr_t)rp->r_pc) == 0) 827 goto out; 828 #ifdef DEBUG 829 else 830 cmn_err(CE_WARN, "failed to rewrite syscall " 831 "instruction in process %d", 832 curthread->t_procp->p_pid); 833 #endif /* DEBUG */ 834 } 835 836 #ifdef __amd64 837 /* 838 * Emulate the LAHF and SAHF instructions if needed. 839 * See the instr_is_lsahf function for details. 840 */ 841 if (p->p_model == DATAMODEL_LP64 && 842 instr_is_lsahf((caddr_t)rp->r_pc, &instr)) { 843 emulate_lsahf(rp, instr); 844 goto out; 845 } 846 #endif 847 848 /*FALLTHROUGH*/ 849 850 if (tudebug) 851 showregs(type, rp, (caddr_t)0); 852 siginfo.si_signo = SIGILL; 853 siginfo.si_code = ILL_ILLOPC; 854 siginfo.si_addr = (caddr_t)rp->r_pc; 855 fault = FLTILL; 856 break; 857 858 case T_ZERODIV + USER: /* integer divide by zero */ 859 if (tudebug && tudebugfpe) 860 showregs(type, rp, (caddr_t)0); 861 siginfo.si_signo = SIGFPE; 862 siginfo.si_code = FPE_INTDIV; 863 siginfo.si_addr = (caddr_t)rp->r_pc; 864 fault = FLTIZDIV; 865 break; 866 867 case T_OVFLW + USER: /* integer overflow */ 868 if (tudebug && tudebugfpe) 869 showregs(type, rp, (caddr_t)0); 870 siginfo.si_signo = SIGFPE; 871 siginfo.si_code = FPE_INTOVF; 872 siginfo.si_addr = (caddr_t)rp->r_pc; 873 fault = FLTIOVF; 874 break; 875 876 case T_NOEXTFLT + USER: /* math coprocessor not available */ 877 if (tudebug && tudebugfpe) 878 showregs(type, rp, addr); 879 if (fpnoextflt(rp)) { 880 siginfo.si_signo = SIGFPE; 881 siginfo.si_code = ILL_ILLOPC; 882 siginfo.si_addr = (caddr_t)rp->r_pc; 883 fault = FLTFPE; 884 } 885 break; 886 887 case T_EXTOVRFLT: /* extension overrun fault */ 888 /* check if we took a kernel trap on behalf of user */ 889 { 890 extern void ndptrap_frstor(void); 891 if (rp->r_pc != (uintptr_t)ndptrap_frstor) 892 (void) die(type, rp, addr, cpuid); 893 type |= USER; 894 } 895 /*FALLTHROUGH*/ 896 case T_EXTOVRFLT + USER: /* extension overrun fault */ 897 if (tudebug && tudebugfpe) 898 showregs(type, rp, addr); 899 if (fpextovrflt(rp)) { 900 siginfo.si_signo = SIGSEGV; 901 siginfo.si_code = SEGV_MAPERR; 902 siginfo.si_addr = (caddr_t)rp->r_pc; 903 fault = FLTBOUNDS; 904 } 905 break; 906 907 case T_EXTERRFLT: /* x87 floating point exception pending */ 908 /* check if we took a kernel trap on behalf of user */ 909 { 910 extern void ndptrap_frstor(void); 911 if (rp->r_pc != (uintptr_t)ndptrap_frstor) 912 (void) die(type, rp, addr, cpuid); 913 type |= USER; 914 } 915 /*FALLTHROUGH*/ 916 917 case T_EXTERRFLT + USER: /* x87 floating point exception pending */ 918 if (tudebug && tudebugfpe) 919 showregs(type, rp, addr); 920 if (sicode = fpexterrflt(rp)) { 921 siginfo.si_signo = SIGFPE; 922 siginfo.si_code = sicode; 923 siginfo.si_addr = (caddr_t)rp->r_pc; 924 fault = FLTFPE; 925 } 926 break; 927 928 case T_SIMDFPE + USER: /* SSE and SSE2 exceptions */ 929 if (tudebug && tudebugsse) 930 showregs(type, rp, addr); 931 if ((x86_feature & (X86_SSE|X86_SSE2)) == 0) { 932 /* 933 * There are rumours that some user instructions 934 * on older CPUs can cause this trap to occur; in 935 * which case send a SIGILL instead of a SIGFPE. 936 */ 937 siginfo.si_signo = SIGILL; 938 siginfo.si_code = ILL_ILLTRP; 939 siginfo.si_addr = (caddr_t)rp->r_pc; 940 siginfo.si_trapno = type & ~USER; 941 fault = FLTILL; 942 } else if ((sicode = fpsimderrflt(rp)) != 0) { 943 siginfo.si_signo = SIGFPE; 944 siginfo.si_code = sicode; 945 siginfo.si_addr = (caddr_t)rp->r_pc; 946 fault = FLTFPE; 947 } 948 break; 949 950 case T_BPTFLT: /* breakpoint trap */ 951 /* 952 * Kernel breakpoint traps should only happen when kmdb is 953 * active, and even then, it'll have interposed on the IDT, so 954 * control won't get here. If it does, we've hit a breakpoint 955 * without the debugger, which is very strange, and very 956 * fatal. 957 */ 958 if (tudebug && tudebugbpt) 959 showregs(type, rp, (caddr_t)0); 960 961 (void) die(type, rp, addr, cpuid); 962 break; 963 964 case T_SGLSTP: /* single step/hw breakpoint exception */ 965 if (tudebug && tudebugbpt) 966 showregs(type, rp, (caddr_t)0); 967 968 /* Now evaluate how we got here */ 969 if (lwp != NULL && (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP)) { 970 /* 971 * i386 single-steps even through lcalls which 972 * change the privilege level. So we take a trap at 973 * the first instruction in privileged mode. 974 * 975 * Set a flag to indicate that upon completion of 976 * the system call, deal with the single-step trap. 977 * 978 * The same thing happens for sysenter, too. 979 */ 980 #if defined(__amd64) 981 if (rp->r_pc == (uintptr_t)sys_sysenter) { 982 /* 983 * Adjust the pc so that we don't execute the 984 * swapgs instruction at the head of the 985 * handler and completely confuse things. 986 */ 987 rp->r_pc = (uintptr_t) 988 _sys_sysenter_post_swapgs; 989 #elif defined(__i386) 990 if (rp->r_pc == (uintptr_t)sys_call || 991 rp->r_pc == (uintptr_t)sys_sysenter) { 992 #endif 993 rp->r_ps &= ~PS_T; /* turn off trace */ 994 lwp->lwp_pcb.pcb_flags |= DEBUG_PENDING; 995 cur_thread->t_post_sys = 1; 996 goto cleanup; 997 } 998 } 999 /* XXX - needs review on debugger interface? */ 1000 if (boothowto & RB_DEBUG) 1001 debug_enter((char *)NULL); 1002 else 1003 (void) die(type, rp, addr, cpuid); 1004 break; 1005 1006 case T_NMIFLT: /* NMI interrupt */ 1007 printf("Unexpected NMI in system mode\n"); 1008 goto cleanup; 1009 1010 case T_NMIFLT + USER: /* NMI interrupt */ 1011 printf("Unexpected NMI in user mode\n"); 1012 break; 1013 1014 case T_GPFLT: /* general protection violation */ 1015 #if defined(__amd64) 1016 /* 1017 * On amd64, we can get a #gp from referencing addresses 1018 * in the virtual address hole e.g. from a copyin. 1019 */ 1020 1021 /* 1022 * If we're under on_trap() protection (see <sys/ontrap.h>), 1023 * set ot_trap and longjmp back to the on_trap() call site. 1024 */ 1025 if ((cur_thread->t_ontrap != NULL) && 1026 (cur_thread->t_ontrap->ot_prot & OT_DATA_ACCESS)) { 1027 curthread->t_ontrap->ot_trap |= OT_DATA_ACCESS; 1028 longjmp(&curthread->t_ontrap->ot_jmpbuf); 1029 } 1030 1031 /* 1032 * If we're under lofault protection (copyin etc.), 1033 * longjmp back to lofault with an EFAULT. 1034 */ 1035 if (cur_thread->t_lofault) { 1036 /* 1037 * Fault is not resolvable, so just return to lofault 1038 */ 1039 if (lodebug) { 1040 showregs(type, rp, addr); 1041 traceregs(rp); 1042 } 1043 rp->r_r0 = EFAULT; 1044 rp->r_pc = cur_thread->t_lofault; 1045 goto cleanup; 1046 } 1047 /*FALLTHROUGH*/ 1048 #endif 1049 case T_STKFLT: /* stack fault */ 1050 case T_TSSFLT: /* invalid TSS fault */ 1051 case T_SEGFLT: /* segment not present fault */ 1052 if (tudebug) 1053 showregs(type, rp, (caddr_t)0); 1054 if (kern_gpfault(rp)) 1055 (void) die(type, rp, addr, cpuid); 1056 goto cleanup; 1057 /*FALLTHROUGH*/ 1058 1059 /* 1060 * ONLY 32-bit PROCESSES can USE a PRIVATE LDT! 64-bit apps should have 1061 * no legacy need for them, so we put a stop to it here. 1062 * 1063 * So: not-present fault is ONLY valid for 32-bit processes with a private LDT 1064 * trying to do a system call. Emulate it. 1065 * 1066 * #gp fault is ONLY valid for 32-bit processes also, which DO NOT have private 1067 * LDT, and are trying to do a system call. Emulate it. 1068 */ 1069 case T_SEGFLT + USER: /* segment not present fault */ 1070 case T_GPFLT + USER: /* general protection violation */ 1071 #ifdef _SYSCALL32_IMPL 1072 if (p->p_model != DATAMODEL_NATIVE) { 1073 #endif /* _SYSCALL32_IMPL */ 1074 if (instr_is_syscall((caddr_t)rp->r_pc)) { 1075 if (type == T_SEGFLT + USER) 1076 ASSERT(p->p_ldt != NULL); 1077 1078 if ((p->p_ldt == NULL && type == T_GPFLT + USER) || 1079 type == T_SEGFLT + USER) { 1080 1081 /* 1082 * The user attempted a system call via the obsolete 1083 * call gate mechanism. Because the process doesn't have 1084 * an LDT (i.e. the ldtr contains 0), a #gp results. 1085 * Emulate the syscall here, just as we do above for a 1086 * #np trap. 1087 */ 1088 1089 /* 1090 * Since this is a not-present trap, rp->r_pc points to 1091 * the trapping lcall instruction. We need to bump it 1092 * to the next insn so the app can continue on. 1093 */ 1094 rp->r_pc += LCALLSIZE; 1095 lwp->lwp_regs = rp; 1096 1097 /* 1098 * Normally the microstate of the LWP is forced back to 1099 * LMS_USER by the syscall handlers. Emulate that 1100 * behavior here. 1101 */ 1102 mstate = LMS_USER; 1103 1104 dosyscall(); 1105 goto out; 1106 } 1107 } 1108 #ifdef _SYSCALL32_IMPL 1109 } 1110 #endif /* _SYSCALL32_IMPL */ 1111 /* 1112 * If the current process is using a private LDT and the 1113 * trapping instruction is sysenter, the sysenter instruction 1114 * has been disabled on the CPU because it destroys segment 1115 * registers. If this is the case, rewrite the instruction to 1116 * be a safe system call and retry it. If this occurs on a CPU 1117 * which doesn't even support sysenter, the result of all of 1118 * this will be to emulate that particular instruction. 1119 */ 1120 if (p->p_ldt != NULL && 1121 instr_is_fast_syscall((caddr_t)rp->r_pc, X86_SEP)) { 1122 if (rewrite_syscall((caddr_t)rp->r_pc) == 0) 1123 goto out; 1124 #ifdef DEBUG 1125 else 1126 cmn_err(CE_WARN, "failed to rewrite sysenter " 1127 "instruction in process %d", 1128 curthread->t_procp->p_pid); 1129 #endif /* DEBUG */ 1130 } 1131 /*FALLTHROUGH*/ 1132 1133 case T_BOUNDFLT + USER: /* bound fault */ 1134 case T_STKFLT + USER: /* stack fault */ 1135 case T_TSSFLT + USER: /* invalid TSS fault */ 1136 if (tudebug) 1137 showregs(type, rp, (caddr_t)0); 1138 siginfo.si_signo = SIGSEGV; 1139 siginfo.si_code = SEGV_MAPERR; 1140 siginfo.si_addr = (caddr_t)rp->r_pc; 1141 fault = FLTBOUNDS; 1142 break; 1143 1144 case T_ALIGNMENT + USER: /* user alignment error (486) */ 1145 if (tudebug) 1146 showregs(type, rp, (caddr_t)0); 1147 bzero(&siginfo, sizeof (siginfo)); 1148 siginfo.si_signo = SIGBUS; 1149 siginfo.si_code = BUS_ADRALN; 1150 siginfo.si_addr = (caddr_t)rp->r_pc; 1151 fault = FLTACCESS; 1152 break; 1153 1154 case T_SGLSTP + USER: /* single step/hw breakpoint exception */ 1155 if (tudebug && tudebugbpt) 1156 showregs(type, rp, (caddr_t)0); 1157 1158 /* Was it single-stepping? */ 1159 if (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP) { 1160 pcb_t *pcb = &lwp->lwp_pcb; 1161 1162 rp->r_ps &= ~PS_T; 1163 /* 1164 * If both NORMAL_STEP and WATCH_STEP are in effect, 1165 * give precedence to NORMAL_STEP. If neither is set, 1166 * user must have set the PS_T bit in %efl; treat this 1167 * as NORMAL_STEP. 1168 */ 1169 if ((pcb->pcb_flags & NORMAL_STEP) || 1170 !(pcb->pcb_flags & WATCH_STEP)) { 1171 siginfo.si_signo = SIGTRAP; 1172 siginfo.si_code = TRAP_TRACE; 1173 siginfo.si_addr = (caddr_t)rp->r_pc; 1174 fault = FLTTRACE; 1175 if (pcb->pcb_flags & WATCH_STEP) 1176 (void) undo_watch_step(NULL); 1177 } else { 1178 fault = undo_watch_step(&siginfo); 1179 } 1180 pcb->pcb_flags &= ~(NORMAL_STEP|WATCH_STEP); 1181 } else { 1182 cmn_err(CE_WARN, 1183 "Unexpected INT 1 in user mode, dr6=%lx", 1184 lwp->lwp_pcb.pcb_drstat); 1185 } 1186 break; 1187 1188 case T_BPTFLT + USER: /* breakpoint trap */ 1189 if (tudebug && tudebugbpt) 1190 showregs(type, rp, (caddr_t)0); 1191 /* 1192 * int 3 (the breakpoint instruction) leaves the pc referring 1193 * to the address one byte after the breakpointed address. 1194 * If the P_PR_BPTADJ flag has been set via /proc, We adjust 1195 * it back so it refers to the breakpointed address. 1196 */ 1197 if (p->p_proc_flag & P_PR_BPTADJ) 1198 rp->r_pc--; 1199 siginfo.si_signo = SIGTRAP; 1200 siginfo.si_code = TRAP_BRKPT; 1201 siginfo.si_addr = (caddr_t)rp->r_pc; 1202 fault = FLTBPT; 1203 break; 1204 1205 case T_AST: 1206 /* 1207 * This occurs only after the cs register has been made to 1208 * look like a kernel selector, either through debugging or 1209 * possibly by functions like setcontext(). The thread is 1210 * about to cause a general protection fault at common_iret() 1211 * in locore. We let that happen immediately instead of 1212 * doing the T_AST processing. 1213 */ 1214 goto cleanup; 1215 1216 case T_AST + USER: /* profiling or resched pseudo trap */ 1217 if (lwp->lwp_pcb.pcb_flags & CPC_OVERFLOW) { 1218 lwp->lwp_pcb.pcb_flags &= ~CPC_OVERFLOW; 1219 if (kcpc_overflow_ast()) { 1220 /* 1221 * Signal performance counter overflow 1222 */ 1223 if (tudebug) 1224 showregs(type, rp, (caddr_t)0); 1225 bzero(&siginfo, sizeof (siginfo)); 1226 siginfo.si_signo = SIGEMT; 1227 siginfo.si_code = EMT_CPCOVF; 1228 siginfo.si_addr = (caddr_t)rp->r_pc; 1229 fault = FLTCPCOVF; 1230 } 1231 } 1232 break; 1233 } 1234 1235 /* 1236 * We can't get here from a system trap 1237 */ 1238 ASSERT(type & USER); 1239 1240 if (fault) { 1241 /* 1242 * Remember the fault and fault adddress 1243 * for real-time (SIGPROF) profiling. 1244 */ 1245 lwp->lwp_lastfault = fault; 1246 lwp->lwp_lastfaddr = siginfo.si_addr; 1247 1248 DTRACE_PROC2(fault, int, fault, ksiginfo_t *, &siginfo); 1249 1250 /* 1251 * If a debugger has declared this fault to be an 1252 * event of interest, stop the lwp. Otherwise just 1253 * deliver the associated signal. 1254 */ 1255 if (siginfo.si_signo != SIGKILL && 1256 prismember(&p->p_fltmask, fault) && 1257 stop_on_fault(fault, &siginfo) == 0) 1258 siginfo.si_signo = 0; 1259 } 1260 1261 if (siginfo.si_signo) 1262 trapsig(&siginfo, (fault == FLTCPCOVF)? 0 : 1); 1263 1264 if (lwp->lwp_oweupc) 1265 profil_tick(rp->r_pc); 1266 1267 if (cur_thread->t_astflag | cur_thread->t_sig_check) { 1268 /* 1269 * Turn off the AST flag before checking all the conditions that 1270 * may have caused an AST. This flag is on whenever a signal or 1271 * unusual condition should be handled after the next trap or 1272 * syscall. 1273 */ 1274 astoff(cur_thread); 1275 cur_thread->t_sig_check = 0; 1276 1277 mutex_enter(&p->p_lock); 1278 if (curthread->t_proc_flag & TP_CHANGEBIND) { 1279 timer_lwpbind(); 1280 curthread->t_proc_flag &= ~TP_CHANGEBIND; 1281 } 1282 mutex_exit(&p->p_lock); 1283 1284 /* 1285 * for kaio requests that are on the per-process poll queue, 1286 * aiop->aio_pollq, they're AIO_POLL bit is set, the kernel 1287 * should copyout their result_t to user memory. by copying 1288 * out the result_t, the user can poll on memory waiting 1289 * for the kaio request to complete. 1290 */ 1291 if (p->p_aio) 1292 aio_cleanup(0); 1293 /* 1294 * If this LWP was asked to hold, call holdlwp(), which will 1295 * stop. holdlwps() sets this up and calls pokelwps() which 1296 * sets the AST flag. 1297 * 1298 * Also check TP_EXITLWP, since this is used by fresh new LWPs 1299 * through lwp_rtt(). That flag is set if the lwp_create(2) 1300 * syscall failed after creating the LWP. 1301 */ 1302 if (ISHOLD(p)) 1303 holdlwp(); 1304 1305 /* 1306 * All code that sets signals and makes ISSIG evaluate true must 1307 * set t_astflag afterwards. 1308 */ 1309 if (ISSIG_PENDING(cur_thread, lwp, p)) { 1310 if (issig(FORREAL)) 1311 psig(); 1312 cur_thread->t_sig_check = 1; 1313 } 1314 1315 if (cur_thread->t_rprof != NULL) { 1316 realsigprof(0, 0); 1317 cur_thread->t_sig_check = 1; 1318 } 1319 1320 /* 1321 * /proc can't enable/disable the trace bit itself 1322 * because that could race with the call gate used by 1323 * system calls via "lcall". If that happened, an 1324 * invalid EFLAGS would result. prstep()/prnostep() 1325 * therefore schedule an AST for the purpose. 1326 */ 1327 if (lwp->lwp_pcb.pcb_flags & REQUEST_STEP) { 1328 lwp->lwp_pcb.pcb_flags &= ~REQUEST_STEP; 1329 rp->r_ps |= PS_T; 1330 } 1331 if (lwp->lwp_pcb.pcb_flags & REQUEST_NOSTEP) { 1332 lwp->lwp_pcb.pcb_flags &= ~REQUEST_NOSTEP; 1333 rp->r_ps &= ~PS_T; 1334 } 1335 } 1336 1337 out: /* We can't get here from a system trap */ 1338 ASSERT(type & USER); 1339 1340 if (ISHOLD(p)) 1341 holdlwp(); 1342 1343 /* 1344 * Set state to LWP_USER here so preempt won't give us a kernel 1345 * priority if it occurs after this point. Call CL_TRAPRET() to 1346 * restore the user-level priority. 1347 * 1348 * It is important that no locks (other than spinlocks) be entered 1349 * after this point before returning to user mode (unless lwp_state 1350 * is set back to LWP_SYS). 1351 */ 1352 lwp->lwp_state = LWP_USER; 1353 1354 if (cur_thread->t_trapret) { 1355 cur_thread->t_trapret = 0; 1356 thread_lock(cur_thread); 1357 CL_TRAPRET(cur_thread); 1358 thread_unlock(cur_thread); 1359 } 1360 if (CPU->cpu_runrun) 1361 preempt(); 1362 (void) new_mstate(cur_thread, mstate); 1363 1364 /* Kernel probe */ 1365 TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 1366 tnf_microstate, state, LMS_USER); 1367 1368 return; 1369 1370 cleanup: /* system traps end up here */ 1371 ASSERT(!(type & USER)); 1372 } 1373 1374 /* 1375 * Patch non-zero to disable preemption of threads in the kernel. 1376 */ 1377 int IGNORE_KERNEL_PREEMPTION = 0; /* XXX - delete this someday */ 1378 1379 struct kpreempt_cnts { /* kernel preemption statistics */ 1380 int kpc_idle; /* executing idle thread */ 1381 int kpc_intr; /* executing interrupt thread */ 1382 int kpc_clock; /* executing clock thread */ 1383 int kpc_blocked; /* thread has blocked preemption (t_preempt) */ 1384 int kpc_notonproc; /* thread is surrendering processor */ 1385 int kpc_inswtch; /* thread has ratified scheduling decision */ 1386 int kpc_prilevel; /* processor interrupt level is too high */ 1387 int kpc_apreempt; /* asynchronous preemption */ 1388 int kpc_spreempt; /* synchronous preemption */ 1389 } kpreempt_cnts; 1390 1391 /* 1392 * kernel preemption: forced rescheduling, preempt the running kernel thread. 1393 * the argument is old PIL for an interrupt, 1394 * or the distingished value KPREEMPT_SYNC. 1395 */ 1396 void 1397 kpreempt(int asyncspl) 1398 { 1399 kthread_t *cur_thread = curthread; 1400 1401 if (IGNORE_KERNEL_PREEMPTION) { 1402 aston(CPU->cpu_dispthread); 1403 return; 1404 } 1405 1406 /* 1407 * Check that conditions are right for kernel preemption 1408 */ 1409 do { 1410 if (cur_thread->t_preempt) { 1411 /* 1412 * either a privileged thread (idle, panic, interrupt) 1413 * or will check when t_preempt is lowered 1414 */ 1415 if (cur_thread->t_pri < 0) 1416 kpreempt_cnts.kpc_idle++; 1417 else if (cur_thread->t_flag & T_INTR_THREAD) { 1418 kpreempt_cnts.kpc_intr++; 1419 if (cur_thread->t_pil == CLOCK_LEVEL) 1420 kpreempt_cnts.kpc_clock++; 1421 } else 1422 kpreempt_cnts.kpc_blocked++; 1423 aston(CPU->cpu_dispthread); 1424 return; 1425 } 1426 if (cur_thread->t_state != TS_ONPROC || 1427 cur_thread->t_disp_queue != CPU->cpu_disp) { 1428 /* this thread will be calling swtch() shortly */ 1429 kpreempt_cnts.kpc_notonproc++; 1430 if (CPU->cpu_thread != CPU->cpu_dispthread) { 1431 /* already in swtch(), force another */ 1432 kpreempt_cnts.kpc_inswtch++; 1433 siron(); 1434 } 1435 return; 1436 } 1437 if (getpil() >= DISP_LEVEL) { 1438 /* 1439 * We can't preempt this thread if it is at 1440 * a PIL >= DISP_LEVEL since it may be holding 1441 * a spin lock (like sched_lock). 1442 */ 1443 siron(); /* check back later */ 1444 kpreempt_cnts.kpc_prilevel++; 1445 return; 1446 } 1447 1448 if (asyncspl != KPREEMPT_SYNC) 1449 kpreempt_cnts.kpc_apreempt++; 1450 else 1451 kpreempt_cnts.kpc_spreempt++; 1452 1453 cur_thread->t_preempt++; 1454 preempt(); 1455 cur_thread->t_preempt--; 1456 } while (CPU->cpu_kprunrun); 1457 } 1458 1459 /* 1460 * Print out debugging info. 1461 */ 1462 static void 1463 showregs(uint_t type, struct regs *rp, caddr_t addr) 1464 { 1465 int s; 1466 1467 s = spl7(); 1468 type &= ~USER; 1469 if (u.u_comm[0]) 1470 printf("%s: ", u.u_comm); 1471 if (type < TRAP_TYPES) 1472 printf("#%s %s\n", trap_type_mnemonic[type], trap_type[type]); 1473 else 1474 switch (type) { 1475 case T_SYSCALL: 1476 printf("Syscall Trap:\n"); 1477 break; 1478 case T_AST: 1479 printf("AST\n"); 1480 break; 1481 default: 1482 printf("Bad Trap = %d\n", type); 1483 break; 1484 } 1485 if (type == T_PGFLT) { 1486 printf("Bad %s fault at addr=0x%lx\n", 1487 USERMODE(rp->r_cs) ? "user": "kernel", (uintptr_t)addr); 1488 } else if (addr) { 1489 printf("addr=0x%lx\n", (uintptr_t)addr); 1490 } 1491 1492 printf("pid=%d, pc=0x%lx, sp=0x%lx, eflags=0x%lx\n", 1493 (ttoproc(curthread) && ttoproc(curthread)->p_pidp) ? 1494 ttoproc(curthread)->p_pid : 0, rp->r_pc, rp->r_sp, rp->r_ps); 1495 1496 #if defined(__lint) 1497 /* 1498 * this clause can be deleted when lint bug 4870403 is fixed 1499 * (lint thinks that bit 32 is illegal in a %b format string) 1500 */ 1501 printf("cr0: %x cr4: %b\n", 1502 (uint_t)getcr0(), (uint_t)getcr4(), FMT_CR4); 1503 #else 1504 printf("cr0: %b cr4: %b\n", 1505 (uint_t)getcr0(), FMT_CR0, (uint_t)getcr4(), FMT_CR4); 1506 #endif 1507 1508 #if defined(__amd64) 1509 printf("cr2: %lx cr3: %lx cr8: %lx\n", getcr2(), getcr3(), getcr8()); 1510 #elif defined(__i386) 1511 printf("cr2: %lx cr3: %lx\n", getcr2(), getcr3()); 1512 #endif 1513 1514 dumpregs(rp); 1515 splx(s); 1516 } 1517 1518 static void 1519 dumpregs(struct regs *rp) 1520 { 1521 #if defined(__amd64) 1522 const char fmt[] = "\t%3s: %16lx %3s: %16lx %3s: %16lx\n"; 1523 1524 printf(fmt, "rdi", rp->r_rdi, "rsi", rp->r_rsi, "rdx", rp->r_rdx); 1525 printf(fmt, "rcx", rp->r_rcx, " r8", rp->r_r8, " r9", rp->r_r9); 1526 printf(fmt, "rax", rp->r_rax, "rbx", rp->r_rbx, "rbp", rp->r_rbp); 1527 printf(fmt, "r10", rp->r_r10, "r11", rp->r_r11, "r12", rp->r_r12); 1528 printf(fmt, "r13", rp->r_r13, "r14", rp->r_r14, "r15", rp->r_r15); 1529 1530 printf(fmt, "fsb", rp->r_fsbase, "gsb", rp->r_gsbase, " ds", rp->r_ds); 1531 printf(fmt, " es", rp->r_es, " fs", rp->r_fs, " gs", rp->r_gs); 1532 1533 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, "rip", rp->r_rip); 1534 printf(fmt, " cs", rp->r_cs, "rfl", rp->r_rfl, "rsp", rp->r_rsp); 1535 1536 printf("\t%3s: %16lx\n", " ss", rp->r_ss); 1537 1538 #elif defined(__i386) 1539 const char fmt[] = "\t%3s: %8lx %3s: %8lx %3s: %8lx %3s: %8lx\n"; 1540 1541 printf(fmt, " gs", rp->r_gs, " fs", rp->r_fs, 1542 " es", rp->r_es, " ds", rp->r_ds); 1543 printf(fmt, "edi", rp->r_edi, "esi", rp->r_esi, 1544 "ebp", rp->r_ebp, "esp", rp->r_esp); 1545 printf(fmt, "ebx", rp->r_ebx, "edx", rp->r_edx, 1546 "ecx", rp->r_ecx, "eax", rp->r_eax); 1547 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, 1548 "eip", rp->r_eip, " cs", rp->r_cs); 1549 printf("\t%3s: %8lx %3s: %8lx %3s: %8lx\n", 1550 "efl", rp->r_efl, "usp", rp->r_uesp, " ss", rp->r_ss); 1551 1552 #endif /* __i386 */ 1553 } 1554 1555 /* 1556 * Handle #gp faults in kernel mode. 1557 * 1558 * One legitimate way this can happen is if we attempt to update segment 1559 * registers to naughty values on the way out of the kernel. 1560 * 1561 * This can happen in a couple of ways: someone - either accidentally or 1562 * on purpose - creates (setcontext(2), lwp_create(2)) or modifies 1563 * (signal(2)) a ucontext that contains silly segment register values. 1564 * Or someone - either accidentally or on purpose - modifies the prgregset_t 1565 * of a subject process via /proc to contain silly segment register values. 1566 * 1567 * (The unfortunate part is that we can end up discovering the bad segment 1568 * register value in the middle of an 'iret' after we've popped most of the 1569 * stack. So it becomes quite difficult to associate an accurate ucontext 1570 * with the lwp, because the act of taking the #gp trap overwrites most of 1571 * what we were going to send the lwp.) 1572 * 1573 * OTOH if it turns out that's -not- the problem, and we're -not- an lwp 1574 * trying to return to user mode and we get a #gp fault, then we need 1575 * to die() -- which will happen if we return non-zero from this routine. 1576 */ 1577 static int 1578 kern_gpfault(struct regs *rp) 1579 { 1580 kthread_t *t = curthread; 1581 proc_t *p = ttoproc(t); 1582 klwp_t *lwp = ttolwp(t); 1583 struct regs tmpregs, *trp = NULL; 1584 caddr_t pc = (caddr_t)rp->r_pc; 1585 int v; 1586 1587 extern void _sys_rtt(), sr_sup(); 1588 1589 #if defined(__amd64) 1590 extern void _update_sregs(), _update_sregs_done(); 1591 static const uint8_t iretq_insn[2] = { 0x48, 0xcf }; 1592 1593 #elif defined(__i386) 1594 static const uint8_t iret_insn[1] = { 0xcf }; 1595 1596 /* 1597 * Note carefully the appallingly awful dependency between 1598 * the instruction sequence used in __SEGREGS_POP and these 1599 * instructions encoded here. 1600 * 1601 * XX64 Add some commentary to locore.s/privregs.h to document this. 1602 */ 1603 static const uint8_t movw_0_esp_gs[4] = { 0x8e, 0x6c, 0x24, 0x0 }; 1604 static const uint8_t movw_4_esp_fs[4] = { 0x8e, 0x64, 0x24, 0x4 }; 1605 static const uint8_t movw_8_esp_es[4] = { 0x8e, 0x44, 0x24, 0x8 }; 1606 static const uint8_t movw_c_esp_ds[4] = { 0x8e, 0x5c, 0x24, 0xc }; 1607 #endif 1608 /* 1609 * if we're not an lwp, or the pc range is outside _sys_rtt, then 1610 * we should immediately be die()ing horribly 1611 */ 1612 if (lwp == NULL || 1613 (uintptr_t)pc < (uintptr_t)_sys_rtt || 1614 (uintptr_t)pc > (uintptr_t)sr_sup) 1615 return (1); 1616 1617 /* 1618 * So at least we're in the right part of the kernel. 1619 * 1620 * Disassemble the instruction at the faulting pc. 1621 * Once we know what it is, we carefully reconstruct the stack 1622 * based on the order in which the stack is deconstructed in 1623 * _sys_rtt. Ew. 1624 */ 1625 1626 #if defined(__amd64) 1627 1628 if (bcmp(pc, iretq_insn, sizeof (iretq_insn)) == 0) { 1629 /* 1630 * We took the #gp while trying to perform the iretq. 1631 * This means that either %cs or %ss are bad. 1632 * All we know for sure is that most of the general 1633 * registers have been restored, including the 1634 * segment registers, and all we have left on the 1635 * topmost part of the lwp's stack are the 1636 * registers that the iretq was unable to consume. 1637 * 1638 * All the rest of the state was crushed by the #gp 1639 * which pushed -its- registers atop our old save area 1640 * (because we had to decrement the stack pointer, sigh) so 1641 * all that we can try and do is to reconstruct the 1642 * crushed frame from the #gp trap frame itself. 1643 */ 1644 trp = &tmpregs; 1645 trp->r_ss = lwptoregs(lwp)->r_ss; 1646 trp->r_sp = lwptoregs(lwp)->r_sp; 1647 trp->r_ps = lwptoregs(lwp)->r_ps; 1648 trp->r_cs = lwptoregs(lwp)->r_cs; 1649 trp->r_pc = lwptoregs(lwp)->r_pc; 1650 bcopy(rp, trp, offsetof(struct regs, r_pc)); 1651 1652 /* 1653 * Validate simple math 1654 */ 1655 ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc); 1656 ASSERT(trp->r_err == rp->r_err); 1657 1658 } else if ((lwp->lwp_pcb.pcb_flags & RUPDATE_PENDING) != 0 && 1659 pc >= (caddr_t)_update_sregs && 1660 pc < (caddr_t)_update_sregs_done) { 1661 /* 1662 * This is the common case -- we're trying to load 1663 * a bad segment register value in the only section 1664 * of kernel code that ever loads segment registers. 1665 * 1666 * We don't need to do anything at this point because 1667 * the pcb contains all the pending segment register 1668 * state, and the regs are still intact because we 1669 * didn't adjust the stack pointer yet. Given the fidelity 1670 * of all this, we could conceivably send a signal 1671 * to the lwp, rather than core-ing. 1672 */ 1673 trp = lwptoregs(lwp); 1674 ASSERT((caddr_t)trp == (caddr_t)rp->r_sp); 1675 } 1676 1677 #elif defined(__i386) 1678 1679 if (bcmp(pc, iret_insn, sizeof (iret_insn)) == 0) { 1680 /* 1681 * We took the #gp while trying to perform the iret. 1682 * This means that either %cs or %ss are bad. 1683 * All we know for sure is that most of the general 1684 * registers have been restored, including the 1685 * segment registers, and all we have left on the 1686 * topmost part of the lwp's stack are the registers that 1687 * the iret was unable to consume. 1688 * 1689 * All the rest of the state was crushed by the #gp 1690 * which pushed -its- registers atop our old save area 1691 * (because we had to decrement the stack pointer, sigh) so 1692 * all that we can try and do is to reconstruct the 1693 * crushed frame from the #gp trap frame itself. 1694 */ 1695 trp = &tmpregs; 1696 trp->r_ss = lwptoregs(lwp)->r_ss; 1697 trp->r_sp = lwptoregs(lwp)->r_sp; 1698 trp->r_ps = lwptoregs(lwp)->r_ps; 1699 trp->r_cs = lwptoregs(lwp)->r_cs; 1700 trp->r_pc = lwptoregs(lwp)->r_pc; 1701 bcopy(rp, trp, offsetof(struct regs, r_pc)); 1702 1703 ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc); 1704 ASSERT(trp->r_err == rp->r_err); 1705 1706 } else { 1707 /* 1708 * Segment registers are reloaded in _sys_rtt 1709 * via the following sequence: 1710 * 1711 * movw 0(%esp), %gs 1712 * movw 4(%esp), %fs 1713 * movw 8(%esp), %es 1714 * movw 12(%esp), %ds 1715 * addl $16, %esp 1716 * 1717 * Thus if any of them fault, we know the user 1718 * registers are left unharmed on the stack. 1719 */ 1720 if (bcmp(pc, movw_0_esp_gs, sizeof (movw_0_esp_gs)) == 0 || 1721 bcmp(pc, movw_4_esp_fs, sizeof (movw_4_esp_fs)) == 0 || 1722 bcmp(pc, movw_8_esp_es, sizeof (movw_8_esp_es)) == 0 || 1723 bcmp(pc, movw_c_esp_ds, sizeof (movw_c_esp_ds)) == 0) 1724 trp = lwptoregs(lwp); 1725 } 1726 #endif /* __amd64 */ 1727 1728 if (trp == NULL) 1729 return (1); 1730 1731 /* 1732 * If we get to here, we're reasonably confident that we've 1733 * correctly decoded what happened on the way out of the kernel. 1734 * Rewrite the lwp's registers so that we can create a core dump 1735 * the (at least vaguely) represents the mcontext we were 1736 * being asked to restore when things went so terribly wrong. 1737 */ 1738 1739 /* 1740 * Make sure that we have a meaningful %trapno and %err. 1741 */ 1742 trp->r_trapno = rp->r_trapno; 1743 trp->r_err = rp->r_err; 1744 1745 if ((caddr_t)trp != (caddr_t)lwptoregs(lwp)) 1746 bcopy(trp, lwptoregs(lwp), sizeof (*trp)); 1747 1748 mutex_enter(&p->p_lock); 1749 lwp->lwp_cursig = SIGSEGV; 1750 mutex_exit(&p->p_lock); 1751 1752 /* 1753 * Terminate all LWPs but don't discard them. If another lwp beat us to 1754 * the punch by calling exit(), evaporate now. 1755 */ 1756 proc_is_exiting(p); 1757 if (exitlwps(1) != 0) { 1758 mutex_enter(&p->p_lock); 1759 lwp_exit(); 1760 } 1761 1762 #ifdef C2_AUDIT 1763 if (audit_active) /* audit core dump */ 1764 audit_core_start(SIGSEGV); 1765 #endif 1766 v = core(SIGSEGV, B_FALSE); 1767 #ifdef C2_AUDIT 1768 if (audit_active) /* audit core dump */ 1769 audit_core_finish(v ? CLD_KILLED : CLD_DUMPED); 1770 #endif 1771 exit(v ? CLD_KILLED : CLD_DUMPED, SIGSEGV); 1772 return (0); 1773 } 1774 1775 /* 1776 * dump_tss() - Display the TSS structure 1777 */ 1778 1779 #if defined(__amd64) 1780 1781 static void 1782 dump_tss(void) 1783 { 1784 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 1785 struct tss *tss = CPU->cpu_tss; 1786 1787 printf(tss_fmt, "tss_rsp0", (void *)tss->tss_rsp0); 1788 printf(tss_fmt, "tss_rsp1", (void *)tss->tss_rsp1); 1789 printf(tss_fmt, "tss_rsp2", (void *)tss->tss_rsp2); 1790 1791 printf(tss_fmt, "tss_ist1", (void *)tss->tss_ist1); 1792 printf(tss_fmt, "tss_ist2", (void *)tss->tss_ist2); 1793 printf(tss_fmt, "tss_ist3", (void *)tss->tss_ist3); 1794 printf(tss_fmt, "tss_ist4", (void *)tss->tss_ist4); 1795 printf(tss_fmt, "tss_ist5", (void *)tss->tss_ist5); 1796 printf(tss_fmt, "tss_ist6", (void *)tss->tss_ist6); 1797 printf(tss_fmt, "tss_ist7", (void *)tss->tss_ist7); 1798 } 1799 1800 #elif defined(__i386) 1801 1802 static void 1803 dump_tss(void) 1804 { 1805 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 1806 struct tss *tss = CPU->cpu_tss; 1807 1808 printf(tss_fmt, "tss_link", (void *)(uintptr_t)tss->tss_link); 1809 printf(tss_fmt, "tss_esp0", (void *)(uintptr_t)tss->tss_esp0); 1810 printf(tss_fmt, "tss_ss0", (void *)(uintptr_t)tss->tss_ss0); 1811 printf(tss_fmt, "tss_esp1", (void *)(uintptr_t)tss->tss_esp1); 1812 printf(tss_fmt, "tss_ss1", (void *)(uintptr_t)tss->tss_ss1); 1813 printf(tss_fmt, "tss_esp2", (void *)(uintptr_t)tss->tss_esp2); 1814 printf(tss_fmt, "tss_ss2", (void *)(uintptr_t)tss->tss_ss2); 1815 printf(tss_fmt, "tss_cr3", (void *)(uintptr_t)tss->tss_cr3); 1816 printf(tss_fmt, "tss_eip", (void *)(uintptr_t)tss->tss_eip); 1817 printf(tss_fmt, "tss_eflags", (void *)(uintptr_t)tss->tss_eflags); 1818 printf(tss_fmt, "tss_eax", (void *)(uintptr_t)tss->tss_eax); 1819 printf(tss_fmt, "tss_ebx", (void *)(uintptr_t)tss->tss_ebx); 1820 printf(tss_fmt, "tss_ecx", (void *)(uintptr_t)tss->tss_ecx); 1821 printf(tss_fmt, "tss_edx", (void *)(uintptr_t)tss->tss_edx); 1822 printf(tss_fmt, "tss_esp", (void *)(uintptr_t)tss->tss_esp); 1823 } 1824 1825 #endif /* __amd64 */ 1826 1827 #if defined(TRAPTRACE) 1828 1829 int ttrace_nrec = 0; /* number of records to dump out */ 1830 int ttrace_dump_nregs = 5; /* dump out this many records with regs too */ 1831 1832 /* 1833 * Dump out the last ttrace_nrec traptrace records on each CPU 1834 */ 1835 static void 1836 dump_ttrace(void) 1837 { 1838 trap_trace_ctl_t *ttc; 1839 trap_trace_rec_t *rec; 1840 uintptr_t current; 1841 int i, j, k; 1842 int n = NCPU; 1843 #if defined(__amd64) 1844 const char banner[] = 1845 "\ncpu address timestamp " 1846 "type vc handler pc\n"; 1847 const char fmt1[] = "%3d %016lx %12llx "; 1848 #elif defined(__i386) 1849 const char banner[] = 1850 "\ncpu address timestamp type vc handler pc\n"; 1851 const char fmt1[] = "%3d %08lx %12llx "; 1852 #endif 1853 const char fmt2[] = "%4s %3x "; 1854 const char fmt3[] = "%8s "; 1855 1856 if (ttrace_nrec == 0) 1857 return; 1858 1859 printf(banner); 1860 1861 for (i = 0; i < n; i++) { 1862 ttc = &trap_trace_ctl[i]; 1863 if (ttc->ttc_first == NULL) 1864 continue; 1865 1866 current = ttc->ttc_next - sizeof (trap_trace_rec_t); 1867 for (j = 0; j < ttrace_nrec; j++) { 1868 struct sysent *sys; 1869 struct autovec *vec; 1870 extern struct av_head autovect[]; 1871 int type; 1872 ulong_t off; 1873 char *sym, *stype; 1874 1875 if (current < ttc->ttc_first) 1876 current = 1877 ttc->ttc_limit - sizeof (trap_trace_rec_t); 1878 1879 if (current == NULL) 1880 continue; 1881 1882 rec = (trap_trace_rec_t *)current; 1883 1884 if (rec->ttr_stamp == 0) 1885 break; 1886 1887 printf(fmt1, i, (uintptr_t)rec, rec->ttr_stamp); 1888 1889 switch (rec->ttr_marker) { 1890 case TT_SYSCALL: 1891 case TT_SYSENTER: 1892 case TT_SYSC: 1893 case TT_SYSC64: 1894 #if defined(__amd64) 1895 sys = &sysent32[rec->ttr_sysnum]; 1896 switch (rec->ttr_marker) { 1897 case TT_SYSC64: 1898 sys = &sysent[rec->ttr_sysnum]; 1899 /*FALLTHROUGH*/ 1900 #elif defined(__i386) 1901 sys = &sysent[rec->ttr_sysnum]; 1902 switch (rec->ttr_marker) { 1903 case TT_SYSC64: 1904 #endif 1905 case TT_SYSC: 1906 stype = "sysc"; /* syscall */ 1907 break; 1908 case TT_SYSCALL: 1909 stype = "lcal"; /* lcall */ 1910 break; 1911 case TT_SYSENTER: 1912 stype = "syse"; /* sysenter */ 1913 break; 1914 default: 1915 break; 1916 } 1917 printf(fmt2, "sysc", rec->ttr_sysnum); 1918 if (sys != NULL) { 1919 sym = kobj_getsymname( 1920 (uintptr_t)sys->sy_callc, 1921 &off); 1922 if (sym != NULL) 1923 printf("%s ", sym); 1924 else 1925 printf("%p ", sys->sy_callc); 1926 } else { 1927 printf("unknown "); 1928 } 1929 break; 1930 1931 case TT_INTERRUPT: 1932 printf(fmt2, "intr", rec->ttr_vector); 1933 vec = (&autovect[rec->ttr_vector])->avh_link; 1934 if (vec != NULL) { 1935 sym = kobj_getsymname( 1936 (uintptr_t)vec->av_vector, &off); 1937 if (sym != NULL) 1938 printf("%s ", sym); 1939 else 1940 printf("%p ", vec->av_vector); 1941 } else { 1942 printf("unknown "); 1943 } 1944 break; 1945 1946 case TT_TRAP: 1947 type = rec->ttr_regs.r_trapno; 1948 printf(fmt2, "trap", type); 1949 printf("#%s ", type < TRAP_TYPES ? 1950 trap_type_mnemonic[type] : "trap"); 1951 break; 1952 1953 default: 1954 break; 1955 } 1956 1957 sym = kobj_getsymname(rec->ttr_regs.r_pc, &off); 1958 if (sym != NULL) 1959 printf("%s+%lx\n", sym, off); 1960 else 1961 printf("%lx\n", rec->ttr_regs.r_pc); 1962 1963 if (ttrace_dump_nregs-- > 0) { 1964 int s; 1965 1966 if (rec->ttr_marker == TT_INTERRUPT) 1967 printf( 1968 "\t\tipl %x spl %x pri %x\n", 1969 rec->ttr_ipl, 1970 rec->ttr_spl, 1971 rec->ttr_pri); 1972 1973 dumpregs(&rec->ttr_regs); 1974 1975 printf("\t%3s: %p\n\n", " ct", 1976 (void *)rec->ttr_curthread); 1977 1978 /* 1979 * print out the pc stack that we recorded 1980 * at trap time (if any) 1981 */ 1982 for (s = 0; s < rec->ttr_sdepth; s++) { 1983 uintptr_t fullpc; 1984 1985 if (s >= TTR_STACK_DEPTH) { 1986 printf("ttr_sdepth corrupt\n"); 1987 break; 1988 } 1989 1990 fullpc = (uintptr_t)rec->ttr_stack[s]; 1991 1992 sym = kobj_getsymname(fullpc, &off); 1993 if (sym != NULL) 1994 printf("-> %s+0x%lx()\n", 1995 sym, off); 1996 else 1997 printf("-> 0x%lx()\n", fullpc); 1998 } 1999 printf("\n"); 2000 } 2001 current -= sizeof (trap_trace_rec_t); 2002 } 2003 } 2004 } 2005 2006 #endif /* TRAPTRACE */ 2007 2008 void 2009 panic_showtrap(struct trap_info *tip) 2010 { 2011 showregs(tip->trap_type, tip->trap_regs, tip->trap_addr); 2012 2013 #if defined(TRAPTRACE) 2014 dump_ttrace(); 2015 #endif /* TRAPTRACE */ 2016 2017 if (tip->trap_type == T_DBLFLT) 2018 dump_tss(); 2019 } 2020 2021 void 2022 panic_savetrap(panic_data_t *pdp, struct trap_info *tip) 2023 { 2024 panic_saveregs(pdp, tip->trap_regs); 2025 } 2026