xref: /titanic_52/usr/src/uts/i86pc/os/dtrace_subr.c (revision b6c3f7863936abeae522e48a13887dddeb691a45)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/dtrace.h>
30 #include <sys/fasttrap.h>
31 #include <sys/x_call.h>
32 #include <sys/cmn_err.h>
33 #include <sys/trap.h>
34 #include <sys/psw.h>
35 #include <sys/privregs.h>
36 #include <sys/machsystm.h>
37 #include <vm/seg_kmem.h>
38 
39 typedef struct dtrace_invop_hdlr {
40 	int (*dtih_func)(uintptr_t, uintptr_t *, uintptr_t);
41 	struct dtrace_invop_hdlr *dtih_next;
42 } dtrace_invop_hdlr_t;
43 
44 dtrace_invop_hdlr_t *dtrace_invop_hdlr;
45 
46 int
47 dtrace_invop(uintptr_t addr, uintptr_t *stack, uintptr_t eax)
48 {
49 	dtrace_invop_hdlr_t *hdlr;
50 	int rval;
51 
52 	for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) {
53 		if ((rval = hdlr->dtih_func(addr, stack, eax)) != 0)
54 			return (rval);
55 	}
56 
57 	return (0);
58 }
59 
60 void
61 dtrace_invop_add(int (*func)(uintptr_t, uintptr_t *, uintptr_t))
62 {
63 	dtrace_invop_hdlr_t *hdlr;
64 
65 	hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP);
66 	hdlr->dtih_func = func;
67 	hdlr->dtih_next = dtrace_invop_hdlr;
68 	dtrace_invop_hdlr = hdlr;
69 }
70 
71 void
72 dtrace_invop_remove(int (*func)(uintptr_t, uintptr_t *, uintptr_t))
73 {
74 	dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL;
75 
76 	for (;;) {
77 		if (hdlr == NULL)
78 			panic("attempt to remove non-existent invop handler");
79 
80 		if (hdlr->dtih_func == func)
81 			break;
82 
83 		prev = hdlr;
84 		hdlr = hdlr->dtih_next;
85 	}
86 
87 	if (prev == NULL) {
88 		ASSERT(dtrace_invop_hdlr == hdlr);
89 		dtrace_invop_hdlr = hdlr->dtih_next;
90 	} else {
91 		ASSERT(dtrace_invop_hdlr != hdlr);
92 		prev->dtih_next = hdlr->dtih_next;
93 	}
94 
95 	kmem_free(hdlr, sizeof (dtrace_invop_hdlr_t));
96 }
97 
98 int
99 dtrace_getipl(void)
100 {
101 	return (CPU->cpu_pri);
102 }
103 
104 /*ARGSUSED*/
105 void
106 dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit))
107 {
108 #ifdef __amd64
109 	extern uintptr_t toxic_addr;
110 	extern size_t toxic_size;
111 
112 	(*func)(0, _userlimit);
113 
114 	if (hole_end > hole_start)
115 		(*func)(hole_start, hole_end);
116 	(*func)(toxic_addr, toxic_addr + toxic_size);
117 #else
118 	extern void *device_arena_contains(void *, size_t, size_t *);
119 	caddr_t	vaddr;
120 	size_t	len;
121 
122 	for (vaddr = (caddr_t)kernelbase; vaddr < (caddr_t)KERNEL_TEXT;
123 	    vaddr += len) {
124 		len = (caddr_t)KERNEL_TEXT - vaddr;
125 		vaddr = device_arena_contains(vaddr, len, &len);
126 		if (vaddr == NULL)
127 			break;
128 		(*func)((uintptr_t)vaddr, (uintptr_t)vaddr + len);
129 	}
130 #endif
131 	(*func)(0, _userlimit);
132 }
133 
134 static int
135 dtrace_xcall_func(dtrace_xcall_t func, void *arg)
136 {
137 	(*func)(arg);
138 
139 	return (0);
140 }
141 
142 /*ARGSUSED*/
143 void
144 dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg)
145 {
146 	cpuset_t set;
147 
148 	CPUSET_ZERO(set);
149 
150 	if (cpu == DTRACE_CPUALL) {
151 		CPUSET_ALL(set);
152 	} else {
153 		CPUSET_ADD(set, cpu);
154 	}
155 
156 	kpreempt_disable();
157 	xc_sync((xc_arg_t)func, (xc_arg_t)arg, 0, X_CALL_HIPRI, set,
158 	    (xc_func_t)dtrace_xcall_func);
159 	kpreempt_enable();
160 }
161 
162 void
163 dtrace_sync_func(void)
164 {}
165 
166 void
167 dtrace_sync(void)
168 {
169 	dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL);
170 }
171 
172 int (*dtrace_pid_probe_ptr)(struct regs *);
173 int (*dtrace_return_probe_ptr)(struct regs *);
174 
175 void
176 dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid)
177 {
178 	krwlock_t *rwp;
179 	proc_t *p = curproc;
180 	extern void trap(struct regs *, caddr_t, processorid_t);
181 
182 	if (USERMODE(rp->r_cs) || (rp->r_ps & PS_VM)) {
183 		if (curthread->t_cred != p->p_cred) {
184 			cred_t *oldcred = curthread->t_cred;
185 			/*
186 			 * DTrace accesses t_cred in probe context.  t_cred
187 			 * must always be either NULL, or point to a valid,
188 			 * allocated cred structure.
189 			 */
190 			curthread->t_cred = crgetcred();
191 			crfree(oldcred);
192 		}
193 	}
194 
195 	if (rp->r_trapno == T_DTRACE_RET) {
196 		uint8_t step = curthread->t_dtrace_step;
197 		uint8_t ret = curthread->t_dtrace_ret;
198 		uintptr_t npc = curthread->t_dtrace_npc;
199 
200 		if (curthread->t_dtrace_ast) {
201 			aston(curthread);
202 			curthread->t_sig_check = 1;
203 		}
204 
205 		/*
206 		 * Clear all user tracing flags.
207 		 */
208 		curthread->t_dtrace_ft = 0;
209 
210 		/*
211 		 * If we weren't expecting to take a return probe trap, kill
212 		 * the process as though it had just executed an unassigned
213 		 * trap instruction.
214 		 */
215 		if (step == 0) {
216 			tsignal(curthread, SIGILL);
217 			return;
218 		}
219 
220 		/*
221 		 * If we hit this trap unrelated to a return probe, we're
222 		 * just here to reset the AST flag since we deferred a signal
223 		 * until after we logically single-stepped the instruction we
224 		 * copied out.
225 		 */
226 		if (ret == 0) {
227 			rp->r_pc = npc;
228 			return;
229 		}
230 
231 		/*
232 		 * We need to wait until after we've called the
233 		 * dtrace_return_probe_ptr function pointer to set %pc.
234 		 */
235 		rwp = &CPU->cpu_ft_lock;
236 		rw_enter(rwp, RW_READER);
237 		if (dtrace_return_probe_ptr != NULL)
238 			(void) (*dtrace_return_probe_ptr)(rp);
239 		rw_exit(rwp);
240 		rp->r_pc = npc;
241 
242 	} else if (rp->r_trapno == T_BPTFLT) {
243 		uint8_t instr, instr2;
244 		caddr_t linearpc;
245 		rwp = &CPU->cpu_ft_lock;
246 
247 		/*
248 		 * The DTrace fasttrap provider uses the breakpoint trap
249 		 * (int 3). We let DTrace take the first crack at handling
250 		 * this trap; if it's not a probe that DTrace knowns about,
251 		 * we call into the trap() routine to handle it like a
252 		 * breakpoint placed by a conventional debugger.
253 		 */
254 		rw_enter(rwp, RW_READER);
255 		if (dtrace_pid_probe_ptr != NULL &&
256 		    (*dtrace_pid_probe_ptr)(rp) == 0) {
257 			rw_exit(rwp);
258 			return;
259 		}
260 		rw_exit(rwp);
261 
262 		if (dtrace_linear_pc(rp, p, &linearpc) != 0) {
263 			trap(rp, addr, cpuid);
264 			return;
265 		}
266 
267 		/*
268 		 * If the instruction that caused the breakpoint trap doesn't
269 		 * look like an int 3 anymore, it may be that this tracepoint
270 		 * was removed just after the user thread executed it. In
271 		 * that case, return to user land to retry the instuction.
272 		 * Note that we assume the length of the instruction to retry
273 		 * is 1 byte because that's the length of FASTTRAP_INSTR.
274 		 * We check for r_pc > 0 and > 2 so that we don't have to
275 		 * deal with segment wraparound.
276 		 */
277 		if (rp->r_pc > 0 && fuword8(linearpc - 1, &instr) == 0 &&
278 		    instr != FASTTRAP_INSTR &&
279 		    (instr != 3 || (rp->r_pc >= 2 &&
280 		    (fuword8(linearpc - 2, &instr2) != 0 || instr2 != 0xCD)))) {
281 			rp->r_pc--;
282 			return;
283 		}
284 
285 		trap(rp, addr, cpuid);
286 
287 	} else {
288 		trap(rp, addr, cpuid);
289 	}
290 }
291 
292 void
293 dtrace_safe_synchronous_signal(void)
294 {
295 	kthread_t *t = curthread;
296 	struct regs *rp = lwptoregs(ttolwp(t));
297 	size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
298 
299 	ASSERT(t->t_dtrace_on);
300 
301 	/*
302 	 * If we're not in the range of scratch addresses, we're not actually
303 	 * tracing user instructions so turn off the flags. If the instruction
304 	 * we copied out caused a synchonous trap, reset the pc back to its
305 	 * original value and turn off the flags.
306 	 */
307 	if (rp->r_pc < t->t_dtrace_scrpc ||
308 	    rp->r_pc > t->t_dtrace_astpc + isz) {
309 		t->t_dtrace_ft = 0;
310 	} else if (rp->r_pc == t->t_dtrace_scrpc ||
311 	    rp->r_pc == t->t_dtrace_astpc) {
312 		rp->r_pc = t->t_dtrace_pc;
313 		t->t_dtrace_ft = 0;
314 	}
315 }
316 
317 int
318 dtrace_safe_defer_signal(void)
319 {
320 	kthread_t *t = curthread;
321 	struct regs *rp = lwptoregs(ttolwp(t));
322 	size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
323 
324 	ASSERT(t->t_dtrace_on);
325 
326 	/*
327 	 * If we're not in the range of scratch addresses, we're not actually
328 	 * tracing user instructions so turn off the flags.
329 	 */
330 	if (rp->r_pc < t->t_dtrace_scrpc ||
331 	    rp->r_pc > t->t_dtrace_astpc + isz) {
332 		t->t_dtrace_ft = 0;
333 		return (0);
334 	}
335 
336 	/*
337 	 * If we've executed the original instruction, but haven't performed
338 	 * the jmp back to t->t_dtrace_npc or the clean up of any registers
339 	 * used to emulate %rip-relative instructions in 64-bit mode, do that
340 	 * here and take the signal right away. We detect this condition by
341 	 * seeing if the program counter is the range [scrpc + isz, astpc).
342 	 */
343 	if (t->t_dtrace_astpc - rp->r_pc <
344 	    t->t_dtrace_astpc - t->t_dtrace_scrpc - isz) {
345 #ifdef __amd64
346 		/*
347 		 * If there is a scratch register and we're on the
348 		 * instruction immediately after the modified instruction,
349 		 * restore the value of that scratch register.
350 		 */
351 		if (t->t_dtrace_reg != 0 &&
352 		    rp->r_pc == t->t_dtrace_scrpc + isz) {
353 			switch (t->t_dtrace_reg) {
354 			case REG_RAX:
355 				rp->r_rax = t->t_dtrace_regv;
356 				break;
357 			case REG_RCX:
358 				rp->r_rcx = t->t_dtrace_regv;
359 				break;
360 			case REG_R8:
361 				rp->r_r8 = t->t_dtrace_regv;
362 				break;
363 			case REG_R9:
364 				rp->r_r9 = t->t_dtrace_regv;
365 				break;
366 			}
367 		}
368 #endif
369 		rp->r_pc = t->t_dtrace_npc;
370 		t->t_dtrace_ft = 0;
371 		return (0);
372 	}
373 
374 	/*
375 	 * Otherwise, make sure we'll return to the kernel after executing
376 	 * the copied out instruction and defer the signal.
377 	 */
378 	if (!t->t_dtrace_step) {
379 		ASSERT(rp->r_pc < t->t_dtrace_astpc);
380 		rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc;
381 		t->t_dtrace_step = 1;
382 	}
383 
384 	t->t_dtrace_ast = 1;
385 
386 	return (1);
387 }
388 
389 /*
390  * Additional artificial frames for the machine type. For i86pc, we're already
391  * accounted for, so return 0. On the hypervisor, we have an additional frame
392  * (xen_callback_handler).
393  */
394 int
395 dtrace_mach_aframes(void)
396 {
397 #ifdef __xpv
398 	return (1);
399 #else
400 	return (0);
401 #endif
402 }
403