1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <sys/systm.h> 29 #include <sys/cyclic.h> 30 #include <sys/cyclic_impl.h> 31 #include <sys/spl.h> 32 #include <sys/x_call.h> 33 #include <sys/kmem.h> 34 #include <sys/machsystm.h> 35 #include <sys/smp_impldefs.h> 36 #include <sys/psm_types.h> 37 #include <sys/atomic.h> 38 #include <sys/clock.h> 39 #include <sys/ddi_impldefs.h> 40 #include <sys/ddi_intr.h> 41 42 static int cbe_vector; 43 static int cbe_ticks = 0; 44 45 static cyc_func_t volatile cbe_xcall_func; 46 static cpu_t *volatile cbe_xcall_cpu; 47 static void *cbe_xcall_farg; 48 static cpuset_t cbe_enabled; 49 50 static ddi_softint_hdl_impl_t cbe_low_hdl = 51 {0, NULL, NULL, 0, 0, NULL, NULL, NULL}; 52 static ddi_softint_hdl_impl_t cbe_clock_hdl = 53 {0, NULL, NULL, 0, 0, NULL, NULL, NULL}; 54 55 cyclic_id_t cbe_hres_cyclic; 56 int cbe_psm_timer_mode = TIMER_ONESHOT; 57 58 void cbe_hres_tick(void); 59 60 int 61 cbe_softclock(void) 62 { 63 cyclic_softint(CPU, CY_LOCK_LEVEL); 64 return (1); 65 } 66 67 int 68 cbe_low_level(void) 69 { 70 cpu_t *cpu = CPU; 71 72 cyclic_softint(cpu, CY_LOW_LEVEL); 73 return (1); 74 } 75 76 /* 77 * We can be in cbe_fire() either due to a cyclic-induced cross call, or due 78 * to the timer firing at level-14. Because cyclic_fire() can tolerate 79 * spurious calls, it would not matter if we called cyclic_fire() in both 80 * cases. 81 * 82 */ 83 int 84 cbe_fire(void) 85 { 86 cpu_t *cpu = CPU; 87 processorid_t me = cpu->cpu_id, i; 88 int cross_call = (cbe_xcall_func != NULL && cbe_xcall_cpu == cpu); 89 90 cyclic_fire(cpu); 91 92 if (cbe_psm_timer_mode != TIMER_ONESHOT && me == 0 && !cross_call) { 93 for (i = 1; i < NCPU; i++) { 94 if (CPU_IN_SET(cbe_enabled, i)) 95 send_dirint(i, CBE_HIGH_PIL); 96 } 97 } 98 99 if (cross_call) { 100 ASSERT(cbe_xcall_func != NULL && cbe_xcall_cpu == cpu); 101 (*cbe_xcall_func)(cbe_xcall_farg); 102 cbe_xcall_func = NULL; 103 cbe_xcall_cpu = NULL; 104 } 105 106 return (1); 107 } 108 109 /*ARGSUSED*/ 110 void 111 cbe_softint(void *arg, cyc_level_t level) 112 { 113 switch (level) { 114 case CY_LOW_LEVEL: 115 cbe_low_hdl.ih_pending = 1; 116 (*setsoftint)(CBE_LOW_PIL); 117 break; 118 case CY_LOCK_LEVEL: 119 cbe_clock_hdl.ih_pending = 1; 120 (*setsoftint)(CBE_LOCK_PIL); 121 break; 122 default: 123 panic("cbe_softint: unexpected soft level %d", level); 124 } 125 } 126 127 /*ARGSUSED*/ 128 void 129 cbe_reprogram(void *arg, hrtime_t time) 130 { 131 if (cbe_psm_timer_mode == TIMER_ONESHOT) 132 (*psm_timer_reprogram)(time); 133 } 134 135 /*ARGSUSED*/ 136 cyc_cookie_t 137 cbe_set_level(void *arg, cyc_level_t level) 138 { 139 int ipl; 140 141 switch (level) { 142 case CY_LOW_LEVEL: 143 ipl = CBE_LOW_PIL; 144 break; 145 case CY_LOCK_LEVEL: 146 ipl = CBE_LOCK_PIL; 147 break; 148 case CY_HIGH_LEVEL: 149 ipl = CBE_HIGH_PIL; 150 break; 151 default: 152 panic("cbe_set_level: unexpected level %d", level); 153 } 154 155 return (splr(ipltospl(ipl))); 156 } 157 158 /*ARGSUSED*/ 159 void 160 cbe_restore_level(void *arg, cyc_cookie_t cookie) 161 { 162 splx(cookie); 163 } 164 165 /*ARGSUSED*/ 166 void 167 cbe_xcall(void *arg, cpu_t *dest, cyc_func_t func, void *farg) 168 { 169 kpreempt_disable(); 170 171 if (dest == CPU) { 172 (*func)(farg); 173 kpreempt_enable(); 174 return; 175 } 176 177 ASSERT(cbe_xcall_func == NULL); 178 179 cbe_xcall_farg = farg; 180 membar_producer(); 181 cbe_xcall_cpu = dest; 182 cbe_xcall_func = func; 183 184 send_dirint(dest->cpu_id, CBE_HIGH_PIL); 185 186 while (cbe_xcall_func != NULL || cbe_xcall_cpu != NULL) 187 continue; 188 189 kpreempt_enable(); 190 191 ASSERT(cbe_xcall_func == NULL && cbe_xcall_cpu == NULL); 192 } 193 194 void * 195 cbe_configure(cpu_t *cpu) 196 { 197 return (cpu); 198 } 199 200 void 201 cbe_enable(void *arg) 202 { 203 processorid_t me = ((cpu_t *)arg)->cpu_id; 204 205 if ((cbe_psm_timer_mode != TIMER_ONESHOT) && (me == 0)) 206 return; 207 208 ASSERT(!CPU_IN_SET(cbe_enabled, me)); 209 CPUSET_ADD(cbe_enabled, me); 210 if (cbe_psm_timer_mode == TIMER_ONESHOT) 211 (*psm_timer_enable)(); 212 } 213 214 void 215 cbe_disable(void *arg) 216 { 217 processorid_t me = ((cpu_t *)arg)->cpu_id; 218 219 if (me == 0) { 220 /* 221 * If this is the boot CPU, we'll quietly refuse to disable 222 * our clock interrupt. 223 */ 224 return; 225 } 226 227 ASSERT(CPU_IN_SET(cbe_enabled, me)); 228 CPUSET_DEL(cbe_enabled, me); 229 if (cbe_psm_timer_mode == TIMER_ONESHOT) 230 (*psm_timer_disable)(); 231 } 232 233 /* 234 * Called only on CPU 0. This is done since TSCs can have deltas between 235 * different cpus see tsc_tick() 236 */ 237 void 238 cbe_hres_tick(void) 239 { 240 int s; 241 242 dtrace_hres_tick(); 243 244 /* 245 * Because hres_tick effectively locks hres_lock, we must be at the 246 * same PIL as that used for CLOCK_LOCK. 247 */ 248 s = splr(ipltospl(XC_HI_PIL)); 249 hres_tick(); 250 splx(s); 251 252 if ((cbe_ticks % hz) == 0) 253 (*hrtime_tick)(); 254 255 cbe_ticks++; 256 257 } 258 259 void 260 cbe_init(void) 261 { 262 cyc_backend_t cbe = { 263 cbe_configure, /* cyb_configure */ 264 NULL, /* cyb_unconfigure */ 265 cbe_enable, /* cyb_enable */ 266 cbe_disable, /* cyb_disable */ 267 cbe_reprogram, /* cyb_reprogram */ 268 cbe_softint, /* cyb_softint */ 269 cbe_set_level, /* cyb_set_level */ 270 cbe_restore_level, /* cyb_restore_level */ 271 cbe_xcall, /* cyb_xcall */ 272 NULL, /* cyb_suspend */ 273 NULL /* cyb_resume */ 274 }; 275 hrtime_t resolution; 276 cyc_handler_t hdlr; 277 cyc_time_t when; 278 279 cbe_vector = (*psm_get_clockirq)(CBE_HIGH_PIL); 280 281 CPUSET_ZERO(cbe_enabled); 282 283 resolution = (*clkinitf)(TIMER_ONESHOT, &cbe_psm_timer_mode); 284 285 mutex_enter(&cpu_lock); 286 cyclic_init(&cbe, resolution); 287 mutex_exit(&cpu_lock); 288 289 (void) add_avintr(NULL, CBE_HIGH_PIL, (avfunc)cbe_fire, 290 "cbe_fire_master", cbe_vector, 0, NULL, NULL); 291 292 if (psm_get_ipivect != NULL) { 293 (void) add_avintr(NULL, CBE_HIGH_PIL, (avfunc)cbe_fire, 294 "cbe_fire_slave", 295 (*psm_get_ipivect)(CBE_HIGH_PIL, PSM_INTR_IPI_HI), 296 0, NULL, NULL); 297 } 298 299 (void) add_avsoftintr((void *)&cbe_clock_hdl, CBE_LOCK_PIL, 300 (avfunc)cbe_softclock, "softclock", NULL, NULL); 301 302 (void) add_avsoftintr((void *)&cbe_low_hdl, CBE_LOW_PIL, 303 (avfunc)cbe_low_level, "low level", NULL, NULL); 304 305 mutex_enter(&cpu_lock); 306 307 hdlr.cyh_level = CY_HIGH_LEVEL; 308 hdlr.cyh_func = (cyc_func_t)cbe_hres_tick; 309 hdlr.cyh_arg = NULL; 310 311 when.cyt_when = 0; 312 when.cyt_interval = nsec_per_tick; 313 314 cbe_hres_cyclic = cyclic_add(&hdlr, &when); 315 316 /* bind to cpu 0, which is also the boot cpu */ 317 cyclic_bind(cbe_hres_cyclic, CPU, NULL); 318 319 if (psm_post_cyclic_setup != NULL) 320 (*psm_post_cyclic_setup)(NULL); 321 322 mutex_exit(&cpu_lock); 323 324 } 325