1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SATA_DEFS_H 28 #define _SATA_DEFS_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Common ATA commands (subset) 38 */ 39 #define SATAC_DIAG 0x90 /* diagnose command */ 40 #define SATAC_RECAL 0x10 /* restore cmd, 4 bits step rate */ 41 #define SATAC_FORMAT 0x50 /* format track command */ 42 #define SATAC_SET_FEATURES 0xef /* set features */ 43 #define SATAC_IDLE_IM 0xe1 /* idle immediate */ 44 #define SATAC_STANDBY_IM 0xe0 /* standby immediate */ 45 #define SATAC_DOOR_LOCK 0xde /* door lock */ 46 #define SATAC_DOOR_UNLOCK 0xdf /* door unlock */ 47 #define SATAC_IDLE 0xe3 /* idle */ 48 49 /* 50 * ATA/ATAPI disk commands (subset) 51 */ 52 #define SATAC_DEVICE_RESET 0x08 /* ATAPI device reset */ 53 #define SATAC_EJECT 0xed /* media eject */ 54 #define SATAC_FLUSH_CACHE 0xe7 /* flush write-cache */ 55 #define SATAC_ID_DEVICE 0xec /* IDENTIFY DEVICE */ 56 #define SATAC_ID_PACKET_DEVICE 0xa1 /* ATAPI identify packet device */ 57 #define SATAC_INIT_DEVPARMS 0x91 /* initialize device parameters */ 58 #define SATAC_PACKET 0xa0 /* ATAPI packet */ 59 #define SATAC_RDMULT 0xc4 /* read multiple w/DMA */ 60 #define SATAC_RDSEC 0x20 /* read sector */ 61 #define SATAC_RDVER 0x40 /* read verify */ 62 #define SATAC_READ_DMA 0xc8 /* read DMA */ 63 #define SATAC_SEEK 0x70 /* seek */ 64 #define SATAC_SERVICE 0xa2 /* queued/overlap service */ 65 #define SATAC_SETMULT 0xc6 /* set multiple mode */ 66 #define SATAC_WRITE_DMA 0xca /* write (multiple) w/DMA */ 67 #define SATAC_WRMULT 0xc5 /* write multiple */ 68 #define SATAC_WRSEC 0x30 /* write sector */ 69 #define SATAC_RDSEC_EXT 0x24 /* read sector extended (LBA48) */ 70 #define SATAC_READ_DMA_EXT 0x25 /* read DMA extended (LBA48) */ 71 #define SATAC_RDMULT_EXT 0x29 /* read multiple extended (LBA48) */ 72 #define SATAC_WRSEC_EXT 0x34 /* read sector extended (LBA48) */ 73 #define SATAC_WRITE_DMA_EXT 0x35 /* read DMA extended (LBA48) */ 74 #define SATAC_WRMULT_EXT 0x39 /* read multiple extended (LBA48) */ 75 76 #define SATAC_READ_DMA_QUEUED 0xc7 /* read DMA / may be queued */ 77 #define SATAC_READ_DMA_QUEUED_EXT 0x26 /* read DMA ext / may be queued */ 78 #define SATAC_WRITE_DMA_QUEUED 0xcc /* read DMA / may be queued */ 79 #define SATAC_WRITE_DMA_QUEUED_EXT 0x36 /* read DMA ext / may be queued */ 80 #define SATAC_READ_PM_REG 0xe4 /* read port mult reg */ 81 #define SATAC_WRITE_PM_REG 0xe8 /* write port mult reg */ 82 83 #define SATAC_READ_FPDMA_QUEUED 0x60 /* First-Party-DMA read queued */ 84 #define SATAC_WRITE_FPDMA_QUEUED 0x61 /* First-Party-DMA write queued */ 85 86 #define SATAC_READ_LOG_EXT 0x2f /* read log */ 87 88 #define SATAC_SMART 0xb0 /* SMART */ 89 90 #define SATA_LOG_PAGE_10 0x10 /* log page 0x10 - SATA error */ 91 /* 92 * Power Managment Commands (subset) 93 */ 94 #define SATAC_CHECK_POWER_MODE 0xe5 /* check power mode */ 95 96 #define SATA_PWRMODE_STANDBY 0 /* standby mode */ 97 #define SATA_PWRMODE_IDLE 0x80 /* idle mode */ 98 #define SATA_PWRMODE_ACTIVE 0xFF /* active or idle mode, rev7 spec */ 99 100 101 /* 102 * SMART FEATURES Subcommands 103 */ 104 #define SATA_SMART_READ_DATA 0xd0 105 #define SATA_SMART_ATTR_AUTOSAVE 0xd2 106 #define SATA_SMART_EXECUTE_OFFLINE_IMM 0xd4 107 #define SATA_SMART_READ_LOG 0xd5 108 #define SATA_SMART_WRITE_LOG 0xd6 109 #define SATA_SMART_ENABLE_OPS 0xd8 110 #define SATA_SMART_DISABLE_OPS 0xd9 111 #define SATA_SMART_RETURN_STATUS 0xda 112 113 /* 114 * SET FEATURES Subcommands 115 */ 116 #define SATAC_SF_ENABLE_WRITE_CACHE 0x02 117 #define SATAC_SF_TRANSFER_MODE 0x03 118 #define SATAC_SF_DISABLE_READ_AHEAD 0x55 119 #define SATAC_SF_DISABLE_WRITE_CACHE 0x82 120 #define SATAC_SF_ENABLE_READ_AHEAD 0xaa 121 122 /* 123 * SET FEATURES transfer mode values 124 */ 125 #define SATAC_TRANSFER_MODE_PIO_DEFAULT 0x00 126 #define SATAC_TRANSFER_MODE_PIO_DISABLE_IODRY 0x01 127 #define SATAC_TRANSFER_MODE_PIO_FLOW_CONTROL 0x08 128 #define SATAC_TRANSFER_MODE_MULTI_WORD_DMA 0x20 129 #define SATAC_TRANSFER_MODE_ULTRA_DMA 0x40 130 131 /* Generic ATA definitions */ 132 133 #define SATA_TAG_QUEUING_SHIFT 3 134 #define SATA_TAG_QUEUING_MASK 0x1f 135 /* 136 * Identify Device data 137 * Although bot ATA and ATAPI devices' Identify Data has the same lenght, 138 * some words have different meaning/content and/or are irrelevant for 139 * other type of device. 140 * Following is the ATA Device Identify data layout 141 */ 142 typedef struct sata_id { 143 /* WORD */ 144 /* OFFSET COMMENT */ 145 ushort_t ai_config; /* 0 general configuration bits */ 146 ushort_t ai_fixcyls; /* 1 # of cylinders (obsolete) */ 147 ushort_t ai_resv0; /* 2 # reserved */ 148 ushort_t ai_heads; /* 3 # of heads (obsolete) */ 149 ushort_t ai_trksiz; /* 4 # of bytes/track (retired) */ 150 ushort_t ai_secsiz; /* 5 # of bytes/sector (retired) */ 151 ushort_t ai_sectors; /* 6 # of sectors/track (obsolete) */ 152 ushort_t ai_resv1[3]; /* 7 "Vendor Unique" */ 153 char ai_drvser[20]; /* 10 Serial number */ 154 ushort_t ai_buftype; /* 20 Buffer type */ 155 ushort_t ai_bufsz; /* 21 Buffer size in 512 byte incr */ 156 ushort_t ai_ecc; /* 22 # of ecc bytes avail on rd/wr */ 157 char ai_fw[8]; /* 23 Firmware revision */ 158 char ai_model[40]; /* 27 Model # */ 159 ushort_t ai_mult1; /* 47 Multiple command flags */ 160 ushort_t ai_dwcap; /* 48 Doubleword capabilities */ 161 ushort_t ai_cap; /* 49 Capabilities */ 162 ushort_t ai_resv2; /* 50 Reserved */ 163 ushort_t ai_piomode; /* 51 PIO timing mode */ 164 ushort_t ai_dmamode; /* 52 DMA timing mode */ 165 ushort_t ai_validinfo; /* 53 bit0: wds 54-58, bit1: 64-70 */ 166 ushort_t ai_curcyls; /* 54 # of current cylinders */ 167 ushort_t ai_curheads; /* 55 # of current heads */ 168 ushort_t ai_cursectrk; /* 56 # of current sectors/track */ 169 ushort_t ai_cursccp[2]; /* 57 current sectors capacity */ 170 ushort_t ai_mult2; /* 59 multiple sectors info */ 171 ushort_t ai_addrsec[2]; /* 60 LBA only: no of addr secs */ 172 ushort_t ai_sworddma; /* 62 single word dma modes */ 173 ushort_t ai_dworddma; /* 63 double word dma modes */ 174 ushort_t ai_advpiomode; /* 64 advanced PIO modes supported */ 175 ushort_t ai_minmwdma; /* 65 min multi-word dma cycle info */ 176 ushort_t ai_recmwdma; /* 66 rec multi-word dma cycle info */ 177 ushort_t ai_minpio; /* 67 min PIO cycle info */ 178 ushort_t ai_minpioflow; /* 68 min PIO cycle info w/flow ctl */ 179 ushort_t ai_resv3[2]; /* 69,70 reserved */ 180 ushort_t ai_typtime[2]; /* 71-72 timing */ 181 ushort_t ai_resv4[2]; /* 73-74 reserved */ 182 ushort_t ai_qdepth; /* 75 queue depth */ 183 ushort_t ai_satacap; /* 76 SATA capabilities */ 184 ushort_t ai_resv5; /* 77 reserved */ 185 ushort_t ai_satafsup; /* 78 SATA features supported */ 186 ushort_t ai_satafenbl; /* 79 SATA features enabled */ 187 ushort_t ai_majorversion; /* 80 major versions supported */ 188 ushort_t ai_minorversion; /* 81 minor version number supported */ 189 ushort_t ai_cmdset82; /* 82 command set supported */ 190 ushort_t ai_cmdset83; /* 83 more command sets supported */ 191 ushort_t ai_cmdset84; /* 84 more command sets supported */ 192 ushort_t ai_features85; /* 85 enabled features */ 193 ushort_t ai_features86; /* 86 enabled features */ 194 ushort_t ai_features87; /* 87 enabled features */ 195 ushort_t ai_ultradma; /* 88 Ultra DMA mode */ 196 ushort_t ai_erasetime; /* 89 security erase time */ 197 ushort_t ai_erasetimex; /* 90 enhanced security erase time */ 198 ushort_t ai_adv_pwr_mgmt; /* 91 advanced power management time */ 199 ushort_t ai_master_pwd; /* 92 master password revision code */ 200 ushort_t ai_hrdwre_reset; /* 93 hardware reset result */ 201 ushort_t ai_acoustic; /* 94 accoustic management values */ 202 ushort_t ai_stream_min_sz; /* 95 stream minimum request size */ 203 ushort_t ai_stream_xfer_d; /* 96 streaming transfer time (DMA) */ 204 ushort_t ai_stream_lat; /* 97 streaming access latency */ 205 ushort_t ai_streamperf[2]; /* 98-99 streaming performance gran. */ 206 ushort_t ai_addrsecxt[4]; /* 100 extended max LBA sector */ 207 ushort_t ai_stream_xfer_p; /* 104 streaming transfer time (PIO) */ 208 ushort_t ai_padding1; /* 105 pad */ 209 ushort_t ai_phys_sect_sz; /* 106 physical sector size */ 210 ushort_t ai_seek_delay; /* 107 inter-seek delay time (usecs) */ 211 ushort_t ai_naa_ieee_oui; /* 108 NAA/IEEE OUI */ 212 ushort_t ai_ieee_oui_uid; /* 109 IEEE OUT/unique id */ 213 ushort_t ai_uid_mid; /* 110 unique id (mid) */ 214 ushort_t ai_uid_low; /* 111 unique id (low) */ 215 ushort_t ai_resv_wwn[4]; /* 112-115 reserved for WWN ext. */ 216 ushort_t ai_incits; /* 116 reserved for INCITS TR-37-2004 */ 217 ushort_t ai_words_lsec[2]; /* 117-118 words per logical sector */ 218 ushort_t ai_cmdset119; /* 119 more command sets supported */ 219 ushort_t ai_features120; /* 120 enabled features */ 220 ushort_t ai_padding2[6]; /* pad to 126 */ 221 ushort_t ai_rmsn; /* 127 removable media notification */ 222 ushort_t ai_securestatus; /* 128 security status */ 223 ushort_t ai_vendor[31]; /* 129-159 vendor specific */ 224 ushort_t ai_padding3[16]; /* 160 pad to 176 */ 225 ushort_t ai_curmedser[30]; /* 176-205 current media serial # */ 226 ushort_t ai_sctsupport; /* 206 SCT command transport */ 227 ushort_t ai_padding4[48]; /* 207 pad to 255 */ 228 ushort_t ai_integrity; /* 255 integrity word */ 229 } sata_id_t; 230 231 232 /* Identify Device: general config bits - word 0 */ 233 234 #define SATA_ATA_TYPE_MASK 0x8001 /* ATA Device type mask */ 235 #define SATA_ATA_TYPE 0x0000 /* ATA device */ 236 #define SATA_REM_MEDIA 0x0080 /* Removable media */ 237 238 #define SATA_ID_SERIAL_OFFSET 10 239 #define SATA_ID_SERIAL_LEN 20 240 #define SATA_ID_MODEL_OFFSET 27 241 #define SATA_ID_MODEL_LEN 40 242 243 /* Identify Device: common capability bits - word 49 */ 244 245 #define SATA_DMA_SUPPORT 0x0100 246 #define SATA_LBA_SUPPORT 0x0200 247 #define SATA_IORDY_DISABLE 0x0400 248 #define SATA_IORDY_SUPPORT 0x0800 249 #define SATA_STANDBYTIMER 0x2000 250 251 /* Identify Device: ai_validinfo (word 53) */ 252 253 #define SATA_VALIDINFO_88 0x0004 /* word 88 supported fields valid */ 254 255 /* Identify Device: ai_majorversion (word 80) */ 256 257 #define SATA_MAJVER_6 0x0040 /* ATA/ATAPI-6 version supported */ 258 #define SATA_MAJVER_4 0x0010 /* ATA/ATAPI-4 version supported */ 259 260 /* Identify Device: command set supported/enabled bits - words 83 and 86 */ 261 262 #define SATA_EXT48 0x0400 /* 48 bit address feature */ 263 #define SATA_RW_DMA_QUEUED_CMD 0x0002 /* R/W DMA Queued supported */ 264 #define SATA_DWNLOAD_MCODE_CMD 0x0001 /* Download Microcode CMD supp/enbld */ 265 266 /* Identify Device: command set supported/enabled bits - words 82 and 85 */ 267 268 #define SATA_SMART_SUPPORTED 0x0001 /* SMART feature set is supported */ 269 #define SATA_WRITE_CACHE 0x0020 /* Write Cache supported/enabled */ 270 #define SATA_LOOK_AHEAD 0x0040 /* Look Ahead supported/enabled */ 271 #define SATA_DEVICE_RESET_CMD 0x0200 /* Device Reset CMD supported/enbld */ 272 #define SATA_READ_BUFFER_CMD 0x2000 /* Read Buffer CMD supported/enbld */ 273 #define SATA_WRITE_BUFFER_CMD 0x1000 /* Write Buffer CMD supported/enbld */ 274 #define SATA_SMART_ENABLED 0x0001 /* SMART feature set is enabled */ 275 276 /* Identify Device: command set supported/enabled bits - words 84 & 87 */ 277 #define SATA_SMART_SELF_TEST_SUPPORTED 0x0002 /* SMART self-test supported */ 278 279 #define SATA_MDMA_SEL_MASK 0x0700 /* Multiword DMA selected */ 280 #define SATA_MDMA_2_SEL 0x0400 /* Multiword DMA mode 2 selected */ 281 #define SATA_MDMA_1_SEL 0x0200 /* Multiword DMA mode 1 selected */ 282 #define SATA_MDMA_0_SEL 0x0100 /* Multiword DMA mode 0 selected */ 283 #define SATA_MDMA_2_SUP 0x0004 /* Multiword DMA mode 2 supported */ 284 #define SATA_MDMA_1_SUP 0x0002 /* Multiword DMA mode 1 supported */ 285 #define SATA_MDMA_0_SUP 0x0001 /* Multiword DMA mode 0 supported */ 286 287 /* Identify Device: command set supported/enabled bits - word 206 */ 288 289 /* All are SCT Command Transport support */ 290 #define SATA_SCT_CMD_TRANS_SUP 0x0001 /* anything */ 291 #define SATA_SCT_CMD_TRANS_LNG_SECT_SUP 0x0002 /* Long Sector Access */ 292 #define SATA_SCT_CMD_TRANS_WR_SAME_SUP 0x0004 /* Write Same */ 293 #define SATA_SCT_CMD_TRANS_ERR_RCOV_SUP 0x0008 /* Error Recovery Control */ 294 #define SATA_SCT_CMD_TRANS_FEAT_CTL_SUP 0x0010 /* Features Control */ 295 #define SATA_SCT_CMD_TRANS_DATA_TBL_SUP 0x0020 /* Data Tables supported */ 296 297 #define SATA_DISK_SECTOR_SIZE 512 /* HD physical sector size */ 298 299 /* Identify Packet Device data definitions (ATAPI devices) */ 300 301 /* Identify Packet Device: general config bits - word 0 */ 302 303 #define SATA_ATAPI_TYPE_MASK 0xc000 304 #define SATA_ATAPI_TYPE 0x8000 /* ATAPI device */ 305 #define SATA_ATAPI_ID_PKT_SZ 0x0003 /* Packet size mask */ 306 #define SATA_ATAPI_ID_PKT_12B 0x0000 /* Packet size 12 bytes */ 307 #define SATA_ATAPI_ID_PKT_16B 0x0001 /* Packet size 16 bytes */ 308 #define SATA_ATAPI_ID_DRQ_TYPE 0x0060 /* DRQ asserted in 3ms after pkt */ 309 #define SATA_ATAPI_ID_DRQ_INTR 0x0020 /* Obsolete in ATA/ATAPI 7 */ 310 311 #define SATA_ATAPI_ID_DEV_TYPE 0x0f00 /* device type/command set mask */ 312 #define SATA_ATAPI_ID_DEV_SHFT 8 313 #define SATA_ATAPI_DIRACC_DEV 0x0000 /* Direct Access device */ 314 #define SATA_ATAPI_SQACC_DEV 0x0100 /* Sequential access dev (tape ?) */ 315 #define SATA_ATAPI_CDROM_DEV 0x0500 /* CD_ROM device */ 316 317 /* 318 * Status bits from ATAPI Interrupt reason register (AT_COUNT) register 319 */ 320 #define SATA_ATAPI_I_COD 0x01 /* Command or Data */ 321 #define SATA_ATAPI_I_IO 0x02 /* IO direction */ 322 #define SATA_ATAPI_I_RELEASE 0x04 /* Release for ATAPI overlap */ 323 324 /* ATAPI feature reg definitions */ 325 326 #define SATA_ATAPI_F_OVERLAP 0x02 327 328 329 /* 330 * ATAPI IDENTIFY_DRIVE capabilities word 331 */ 332 333 #define SATA_ATAPI_ID_CAP_DMA 0x0100 334 #define SATA_ATAPI_ID_CAP_OVERLAP 0x2000 335 336 /* 337 * ATAPI signature bits 338 */ 339 #define SATA_ATAPI_SIG_HI 0xeb /* in high cylinder register */ 340 #define SATA_ATAPI_SIG_LO 0x14 /* in low cylinder register */ 341 342 /* These values are pre-set for CD_ROM/DVD ? */ 343 344 #define SATA_ATAPI_SECTOR_SIZE 2048 345 #define SATA_ATAPI_MAX_BYTES_PER_DRQ 0xf800 /* 16 bits - 2KB ie 62KB */ 346 #define SATA_ATAPI_HEADS 64 347 #define SATA_ATAPI_SECTORS_PER_TRK 32 348 349 /* SATA Capabilites bits (word 76) */ 350 351 #define SATA_NCQ 0x100 352 #define SATA_2_SPEED 0x004 353 #define SATA_1_SPEED 0x002 354 355 /* SATA Features Supported (word 78) - not used */ 356 357 /* SATA Features Enabled (word 79) - not used */ 358 359 /* 360 * Status bits from AT_STATUS register 361 */ 362 #define SATA_STATUS_BSY 0x80 /* controller busy */ 363 #define SATA_STATUS_DRDY 0x40 /* drive ready */ 364 #define SATA_STATUS_DF 0x20 /* device fault */ 365 #define SATA_STATUS_DSC 0x10 /* seek operation complete */ 366 #define SATA_STATUS_DRQ 0x08 /* data request */ 367 #define SATA_STATUS_CORR 0x04 /* obsolete */ 368 #define SATA_STATUS_IDX 0x02 /* obsolete */ 369 #define SATA_STATUS_ERR 0x01 /* error flag */ 370 371 /* 372 * Status bits from AT_ERROR register 373 */ 374 #define SATA_ERROR_ICRC 0x80 /* CRC data transfer error detected */ 375 #define SATA_ERROR_UNC 0x40 /* uncorrectable data error */ 376 #define SATA_ERROR_MC 0x20 /* Media change */ 377 #define SATA_ERROR_IDNF 0x10 /* ID/Address not found */ 378 #define SATA_ERROR_MCR 0x08 /* media change request */ 379 #define SATA_ERROR_ABORT 0x04 /* aborted command */ 380 #define SATA_ERROR_NM 0x02 /* no media */ 381 #define SATA_ERROR_EOM 0x02 /* end of media (Packet cmds) */ 382 #define SATA_ERROR_ILI 0x01 /* cmd sepcific */ 383 384 385 /* 386 * Bits from the device control register 387 */ 388 #define SATA_DEVCTL_NIEN 0x02 /* not interrupt enabled */ 389 #define SATA_DEVCTL_SRST 0x04 /* software reset */ 390 #define SATA_DEVCTL_HOB 0x80 /* high order bit */ 391 392 /* device_reg */ 393 #define SATA_ADH_LBA 0x40 /* addressing in LBA mode not chs */ 394 395 396 #define SCSI_LOG_PAGE_HDR_LEN 4 /* # bytes of a SCSI log page header */ 397 #define SCSI_LOG_PARAM_HDR_LEN 4 /* # byttes of a SCSI log param hdr */ 398 399 /* Number of log entries per extended selftest log block */ 400 #define ENTRIES_PER_EXT_SELFTEST_LOG_BLK 19 401 402 /* Number of entries per SCSI LOG SENSE SELFTEST RESULTS page */ 403 #define SCSI_ENTRIES_IN_LOG_SENSE_SELFTEST_RESULTS 20 404 405 /* Length of a SCSI LOG SENSE SELFTEST RESULTS parameter */ 406 #define SCSI_LOG_SENSE_SELFTEST_PARAM_LEN 0x10 407 408 #define DIAGNOSTIC_FAILURE_ON_COMPONENT 0x40 409 410 #define SCSI_COMPONENT_81 0x81 411 #define SCSI_COMPONENT_82 0x82 412 #define SCSI_COMPONENT_83 0x83 413 #define SCSI_COMPONENT_84 0x84 414 #define SCSI_COMPONENT_85 0x85 415 #define SCSI_COMPONENT_86 0x86 416 #define SCSI_COMPONENT_87 0x87 417 #define SCSI_COMPONENT_88 0x88 418 419 #define SCSI_ASC_ATA_DEV_FEAT_NOT_ENABLED 0x67 420 #define SCSI_ASCQ_ATA_DEV_FEAT_NOT_ENABLED 0x0b 421 422 #define SCSI_PREDICTED_FAILURE 0x5d 423 #define SCSI_GENERAL_HD_FAILURE 0x10 424 425 #define SCSI_INFO_EXCEPTIONS_PARAM_LEN 4 426 427 #define READ_LOG_EXT_LOG_DIRECTORY 0 428 #define READ_LOG_EXT_NCQ_ERROR_RECOVERY 0x10 429 #define SMART_SELFTEST_LOG_PAGE 6 430 #define EXT_SMART_SELFTEST_LOG_PAGE 7 431 432 /* 433 * SATA NCQ error recovery page (0x10) 434 */ 435 struct sata_ncq_error_recovery_page { 436 uint8_t ncq_tag; 437 uint8_t reserved1; 438 uint8_t ncq_status; 439 uint8_t ncq_error; 440 uint8_t ncq_sector_number; 441 uint8_t ncq_cyl_low; 442 uint8_t ncq_cyl_high; 443 uint8_t ncq_dev_head; 444 uint8_t ncq_sector_number_ext; 445 uint8_t ncq_cyl_low_ext; 446 uint8_t ncq_cyl_high_ext; 447 uint8_t reserved2; 448 uint8_t ncq_sector_count; 449 uint8_t ncq_sector_count_ext; 450 uint8_t reserved3[242]; 451 uint8_t ncq_vendor_unique[255]; 452 uint8_t ncq_checksum; 453 }; 454 455 /* 456 * SMART data structures 457 */ 458 struct smart_data { 459 uint8_t smart_vendor_specific[362]; 460 uint8_t smart_offline_data_collection_status; 461 uint8_t smart_selftest_exec_status; 462 uint8_t smart_secs_to_complete_offline_data[2]; 463 uint8_t smart_vendor_specific2; 464 uint8_t smart_offline_data_collection_capability; 465 uint8_t smart_capability[2]; 466 uint8_t smart_error_logging_capability; 467 uint8_t smart_vendor_specific3; 468 uint8_t smart_short_selftest_polling_time; 469 uint8_t smart_extended_selftest_polling_time; 470 uint8_t smart_conveyance_selftest_polling_time; 471 uint8_t smart_reserved[11]; 472 uint8_t smart_vendor_specific4[125]; 473 uint8_t smart_checksum; 474 }; 475 476 struct smart_selftest_log_entry { 477 uint8_t smart_selftest_log_lba_low; 478 uint8_t smart_selftest_log_status; 479 uint8_t smart_selftest_log_timestamp[2]; 480 uint8_t smart_selftest_log_checkpoint; 481 uint8_t smart_selftest_log_failing_lba[4]; /* from LSB to MSB */ 482 uint8_t smart_selftest_log_vendor_specific[15]; 483 }; 484 485 #define NUM_SMART_SELFTEST_LOG_ENTRIES 21 486 struct smart_selftest_log { 487 uint8_t smart_selftest_log_revision[2]; 488 struct smart_selftest_log_entry 489 smart_selftest_log_entries[NUM_SMART_SELFTEST_LOG_ENTRIES]; 490 uint8_t smart_selftest_log_vendor_specific[2]; 491 uint8_t smart_selftest_log_index; 492 uint8_t smart_selftest_log_reserved[2]; 493 uint8_t smart_selftest_log_checksum; 494 }; 495 496 struct smart_ext_selftest_log_entry { 497 uint8_t smart_ext_selftest_log_lba_low; 498 uint8_t smart_ext_selftest_log_status; 499 uint8_t smart_ext_selftest_log_timestamp[2]; 500 uint8_t smart_ext_selftest_log_checkpoint; 501 uint8_t smart_ext_selftest_log_failing_lba[6]; 502 uint8_t smart_ext_selftest_log_vendor_specific[15]; 503 }; 504 505 struct smart_ext_selftest_log { 506 uint8_t smart_ext_selftest_log_rev; 507 uint8_t smart_ext_selftest_log_reserved; 508 uint8_t smart_ext_selftest_log_index[2]; 509 struct smart_ext_selftest_log_entry smart_ext_selftest_log_entries[19]; 510 uint8_t smart_ext_selftest_log_vendor_specific[2]; 511 uint8_t smart_ext_selftest_log_reserved2[11]; 512 uint8_t smart_ext_selftest_log_checksum; 513 }; 514 515 struct read_log_ext_directory { 516 uint8_t read_log_ext_vers[2]; /* general purpose log version */ 517 uint8_t read_log_ext_nblks[255][2]; /* # of blks @ log addr index+1 */ 518 }; 519 520 /* 521 * SMART specific data 522 * These eventually need to go to a generic scsi hearder file 523 * for now they will reside here 524 */ 525 #define PC_CUMULATIVE_VALUES 0x01 526 #define PAGE_CODE_GET_SUPPORTED_LOG_PAGES 0x00 527 #define PAGE_CODE_SELF_TEST_RESULTS 0x10 528 #define PAGE_CODE_INFORMATION_EXCEPTIONS 0x2f 529 #define PAGE_CODE_SMART_READ_DATA 0x30 530 531 532 struct log_parameter { 533 uint8_t param_code[2]; /* parameter dependant */ 534 uint8_t param_ctrl_flags; /* see defines below */ 535 uint8_t param_len; /* # of bytes following */ 536 uint8_t param_values[1]; /* # of bytes defined by param_len */ 537 }; 538 539 /* param_ctrl_flag fields */ 540 #define LOG_CTRL_LP 0x01 /* list parameter */ 541 #define LOG_CTRL_LBIN 0x02 /* list is binary */ 542 #define LOG_CTRL_TMC 0x0c /* threshold met criteria */ 543 #define LOG_CTRL_ETC 0x10 /* enable threshold comparison */ 544 #define LOG_CTRL_TSD 0x20 /* target save disable */ 545 #define LOG_CTRL_DS 0x40 /* disable save */ 546 #define LOG_CTRL_DU 0x80 /* disable update */ 547 548 #define SMART_MAGIC_VAL_1 0x4f 549 #define SMART_MAGIC_VAL_2 0xc2 550 #define SMART_MAGIC_VAL_3 0xf4 551 #define SMART_MAGIC_VAL_4 0x2c 552 553 #define SCT_STATUS_LOG_PAGE 0xe0 554 555 #ifdef __cplusplus 556 } 557 #endif 558 559 #endif /* _SATA_DEFS_H */ 560