xref: /titanic_52/usr/src/uts/common/sys/hotplug/pci/pcihp.h (revision 91d7f85e02991954d1e1bd44673df567ad8dcc87)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_HOTPLUG_PCI_PCIHP_H
27 #define	_SYS_HOTPLUG_PCI_PCIHP_H
28 
29 #ifdef	__cplusplus
30 extern "C" {
31 #endif
32 
33 #ifdef	_KERNEL
34 /*
35  * Interfaces exported by PCI Nexus extension module, kernel/misc/pcihp.
36  */
37 int pcihp_init(dev_info_t *);
38 int pcihp_uninit(dev_info_t *);
39 int pcihp_info(dev_info_t *, ddi_info_cmd_t, void *, void **);
40 struct cb_ops *pcihp_get_cb_ops(void);
41 #endif
42 
43 /* definitions for minor numbers */
44 #define	PCIHP_AP_MINOR_NUM(x, y)		(((uint_t)(x) << 8) | \
45 						((y) & 0xFF))
46 #define	PCIHP_AP_MINOR_NUM_TO_PCI_DEVNUM(x)	((x) & 0xFF)
47 #define	PCIHP_AP_MINOR_NUM_TO_INSTANCE(x)	((x) >> 8)
48 #define	PCIHP_DEVCTL_MINOR	0xFF
49 #define	PCIHP_DEBUG_MINOR	0xFE
50 
51 /* definitons for cPCI platforms */
52 #define	PCI_CONF_EXTCAP		0x34	/* Extended Capabilities Pointer */
53 #define	PCI_ECP_CAPID		0x00	/* Capability ID */
54 #define	PCI_ECP_NEXT		0x01	/* Pointer to Next Capability */
55 #define	PCI_ECP_HS_CSR		0x02	/* Hot Swap Control and Status Reg */
56 #define	CPCI_HOTSWAP_CAPID	0x06	/* Hot Swap Capability ID */
57 
58 #define	HS_CSR_INS		0x80	/* ENUM Status - Insertion */
59 #define	HS_CSR_EXT		0x40	/* ENUM Status - Extraction */
60 #define	HS_CSR_LOO		0x08	/* LED ON/OFF 1=ON 0=OFF */
61 #define	HS_CSR_EIM		0x02	/* ENUM# Signal Mask */
62 
63 #define	PCIHP_MAKE_REG_HIGH(busnum, devnum, funcnum, register)\
64 	(\
65 	((ulong_t)(busnum & 0xff) << 16)	|\
66 	((ulong_t)(devnum & 0x1f) << 11)	|\
67 	((ulong_t)(funcnum & 0x7) <<  8)	|\
68 	((ulong_t)(register & 0x3f)))
69 
70 #define	PCIHP_SUCCESS DDI_SUCCESS
71 #define	PCIHP_FAILURE DDI_FAILURE
72 
73 /* cPCI hotswap definitions */
74 #define	PCIHP_HANDLE_ENUM	1	/* clear interrupt and take action */
75 #define	PCIHP_CLEAR_ENUM	2	/* clear interrupt only. */
76 
77 #ifdef	__cplusplus
78 }
79 #endif
80 
81 #endif	/* _SYS_HOTPLUG_PCI_PCIHP_H */
82