1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_CPUDRV_H 27 #define _SYS_CPUDRV_H 28 29 #include <sys/promif.h> 30 #include <sys/cpuvar.h> 31 #include <sys/taskq.h> 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 #ifdef _KERNEL 38 39 /* 40 * CPU power management data 41 */ 42 /* 43 * Data related to a particular speed. 44 * 45 * All per speed data nodes for a CPU are linked together using down_spd. 46 * The link list is ordered with first node containing data for 47 * normal (maximum) speed. up_spd points to the next speed up. Currently 48 * all up_spd's point to the normal speed but this can be changed in future. 49 * quant_cnt is the number of ticks when monitoring system will be called 50 * next. There are different quant_cnt for different speeds. 51 * 52 * Note that 'speed' has different meaning depending upon the platform. 53 * On SPARC, the speed is really a divisor of the maximum speed (e.g., a speed 54 * of 2 means that it's 1/2 the maximum speed). On x86, speed is a processor 55 * frequency. 56 */ 57 typedef struct cpudrv_pm_spd { 58 uint_t speed; /* platform dependent notion */ 59 uint_t quant_cnt; /* quantum count in ticks */ 60 struct cpudrv_pm_spd *down_spd; /* ptr to next speed down */ 61 struct cpudrv_pm_spd *up_spd; /* ptr to next speed up */ 62 uint_t idle_hwm; /* down if idle thread >= hwm */ 63 uint_t idle_lwm; /* up if idle thread < lwm */ 64 uint_t idle_bhwm_cnt; /* # of iters idle is < hwm */ 65 uint_t idle_blwm_cnt; /* # of iters idle is < lwm */ 66 uint_t user_hwm; /* up if user thread > hwm */ 67 int user_lwm; /* down if user thread <= lwm */ 68 int pm_level; /* power level for framework */ 69 } cpudrv_pm_spd_t; 70 71 /* 72 * Power management data 73 */ 74 typedef struct cpudrv_pm { 75 cpudrv_pm_spd_t *head_spd; /* ptr to head of speed */ 76 cpudrv_pm_spd_t *cur_spd; /* ptr to current speed */ 77 uint_t num_spd; /* number of speeds */ 78 hrtime_t lastquan_mstate[NCMSTATES]; /* last quantum's mstate */ 79 clock_t lastquan_ticks; /* last quantum's clock tick */ 80 int pm_busycnt; /* pm_busy_component() count */ 81 taskq_t *tq; /* taskq handler for CPU monitor */ 82 timeout_id_t timeout_id; /* cpudrv_monitor()'s timeout_id */ 83 int timeout_count; /* count dispatched timeouts */ 84 kmutex_t timeout_lock; /* protect timeout_count */ 85 kcondvar_t timeout_cv; /* wait on timeout_count change */ 86 #if defined(__x86) 87 kthread_t *pm_governor_thread; /* governor thread */ 88 cpudrv_pm_spd_t *top_spd; /* ptr to effective head speed */ 89 #endif 90 boolean_t pm_started; /* PM really started */ 91 } cpudrv_pm_t; 92 93 /* 94 * Idle & user threads water marks in percentage 95 */ 96 #if defined(__x86) 97 #define CPUDRV_IDLE_HWM 85 /* idle high water mark */ 98 #define CPUDRV_IDLE_LWM 70 /* idle low water mark */ 99 #define CPUDRV_IDLE_BLWM_CNT_MAX 1 /* # of iters idle can be < lwm */ 100 #define CPUDRV_IDLE_BHWM_CNT_MAX 1 /* # of iters idle can be < hwm */ 101 #else 102 #define CPUDRV_IDLE_HWM 98 /* idle high water mark */ 103 #define CPUDRV_IDLE_LWM 8 /* idle low water mark */ 104 #define CPUDRV_IDLE_BLWM_CNT_MAX 2 /* # of iters idle can be < lwm */ 105 #define CPUDRV_IDLE_BHWM_CNT_MAX 2 /* # of iters idle can be < hwm */ 106 #endif 107 #define CPUDRV_USER_HWM 20 /* user high water mark */ 108 #define CPUDRV_IDLE_BUF_ZONE 4 /* buffer zone when going down */ 109 110 111 /* 112 * Maximums for creating 'pm-components' property 113 */ 114 #define CPUDRV_COMP_MAX_DIG 4 /* max digits in power level */ 115 /* or divisor */ 116 #define CPUDRV_COMP_MAX_VAL 9999 /* max value in above digits */ 117 118 /* 119 * Component number for calls to PM framework 120 */ 121 #define CPUDRV_COMP_NUM 0 /* first component is 0 */ 122 123 /* 124 * Quantum counts for normal and other clock speeds in terms of ticks. 125 * 126 * In determining the quantum count, we need to balance two opposing factors: 127 * 128 * 1) Minimal delay when user start using the CPU that is in low 129 * power mode -- requires that we monitor more frequently, 130 * 131 * 2) Extra code executed because of frequent monitoring -- requires 132 * that we monitor less frequently. 133 * 134 * We reach a tradeoff between these two requirements by monitoring 135 * more frequently when we are in low speed mode (CPUDRV_QUANT_CNT_OTHR) 136 * so we can bring the CPU up without user noticing it. Moreover, at low 137 * speed we are not using CPU much so extra code execution should be fine. 138 * Since we are in no hurry to bring CPU down and at normal speed and we 139 * might really be using the CPU fully, we monitor less frequently 140 * (CPUDRV_QUANT_CNT_NORMAL). 141 */ 142 #if defined(__x86) 143 #define CPUDRV_QUANT_CNT_NORMAL (hz * 1) /* 1 sec */ 144 #else 145 #define CPUDRV_QUANT_CNT_NORMAL (hz * 5) /* 5 sec */ 146 #endif 147 #define CPUDRV_QUANT_CNT_OTHR (hz * 1) /* 1 sec */ 148 149 /* 150 * Taskq parameters 151 */ 152 #define CPUDRV_TASKQ_THREADS 1 /* # threads to run CPU monitor */ 153 #define CPUDRV_TASKQ_MIN 2 /* min # of taskq entries */ 154 #define CPUDRV_TASKQ_MAX 2 /* max # of taskq entries */ 155 156 157 /* 158 * Device driver state structure 159 */ 160 typedef struct cpudrv_devstate { 161 dev_info_t *dip; /* devinfo handle */ 162 cpu_t *cp; /* CPU data for this node */ 163 processorid_t cpu_id; /* CPU number for this node */ 164 cpudrv_pm_t cpudrv_pm; /* power management data */ 165 kmutex_t lock; /* protects state struct */ 166 } cpudrv_devstate_t; 167 168 extern void *cpudrv_state; 169 extern boolean_t cpudrv_enabled; 170 171 /* 172 * Debugging definitions 173 */ 174 #ifdef DEBUG 175 #define D_INIT 0x00000001 176 #define D_FINI 0x00000002 177 #define D_ATTACH 0x00000004 178 #define D_DETACH 0x00000008 179 #define D_POWER 0x00000010 180 #define D_PM_INIT 0x00000020 181 #define D_PM_FREE 0x00000040 182 #define D_PM_COMP_CREATE 0x00000080 183 #define D_PM_MONITOR 0x00000100 184 #define D_PM_MONITOR_VERBOSE 0x00000200 185 #define D_PM_MONITOR_DELAY 0x00000400 186 187 extern uint_t cpudrv_debug; 188 189 #define _PRINTF prom_printf 190 #define DPRINTF(flag, args) if (cpudrv_debug & flag) _PRINTF args; 191 #else 192 #define DPRINTF(flag, args) 193 #endif /* DEBUG */ 194 195 extern int cpudrv_change_speed(cpudrv_devstate_t *, cpudrv_pm_spd_t *); 196 extern boolean_t cpudrv_get_cpu_id(dev_info_t *, processorid_t *); 197 extern boolean_t cpudrv_is_governor_thread(cpudrv_pm_t *); 198 extern boolean_t cpudrv_mach_init(cpudrv_devstate_t *); 199 extern boolean_t cpudrv_power_ready(void); 200 extern boolean_t cpudrv_is_enabled(cpudrv_devstate_t *); 201 extern void cpudrv_set_supp_freqs(cpudrv_devstate_t *); 202 203 #endif /* _KERNEL */ 204 205 #ifdef __cplusplus 206 } 207 #endif 208 209 #endif /* _SYS_CPUDRV_H */ 210