1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_NGE_H 28 #define _SYS_NGE_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 37 #include <sys/types.h> 38 #include <sys/stream.h> 39 #include <sys/strsun.h> 40 #include <sys/strsubr.h> 41 #include <sys/stat.h> 42 #include <sys/pci.h> 43 #include <sys/note.h> 44 #include <sys/modctl.h> 45 #include <sys/kstat.h> 46 #include <sys/ethernet.h> 47 #include <sys/pattr.h> 48 #include <sys/errno.h> 49 #include <sys/dlpi.h> 50 #include <sys/devops.h> 51 #include <sys/debug.h> 52 #include <sys/conf.h> 53 #include <sys/callb.h> 54 55 #include <netinet/ip6.h> 56 57 #include <inet/common.h> 58 #include <inet/ip.h> 59 #include <netinet/udp.h> 60 #include <inet/mi.h> 61 #include <inet/nd.h> 62 63 #include <sys/ddi.h> 64 #include <sys/sunddi.h> 65 66 #include <sys/mac.h> 67 #include <sys/mac_ether.h> 68 69 /* 70 * Reconfiguring the network devices requires the net_config privilege 71 * in Solaris 10+. 72 */ 73 extern int secpolicy_net_config(const cred_t *, boolean_t); 74 75 #include <sys/netlb.h> 76 #include <sys/miiregs.h> 77 78 #include <sys/dld.h> 79 80 #include "nge_chip.h" 81 82 #define PIO_ADDR(ngep, offset) ((void *)((caddr_t)(ngep)->io_regs+(offset))) 83 /* 84 * Copy an ethernet address 85 */ 86 #define ethaddr_copy(src, dst) bcopy((src), (dst), ETHERADDRL) 87 #define ether_eq(a, b) (bcmp((caddr_t)(a), (caddr_t)(b), (ETHERADDRL)) == 0) 88 89 #define BIS(w, b) (((w) & (b)) ? B_TRUE : B_FALSE) 90 #define BIC(w, b) (((w) & (b)) ? B_FALSE : B_TRUE) 91 #define UPORDOWN(x) ((x) ? "up" : "down") 92 93 #define NGE_DRIVER_NAME "nge" 94 95 /* 96 * 'Progress' bit flags ... 97 */ 98 #define PROGRESS_CFG 0x0001 /* config space mapped */ 99 #define PROGRESS_REGS 0x0002 /* registers mapped */ 100 #define PROGRESS_BUFS 0x0004 /* registers mapped */ 101 #define PROGRESS_RESCHED 0x0008 /* resched softint registered */ 102 #define PROGRESS_FACTOTUM 0x0010 /* factotum softint registered */ 103 #define PROGRESS_SWINT 0x0020 /* s/w interrupt registered */ 104 #define PROGRESS_INTR 0x0040 /* h/w interrupt registered */ 105 /* and mutexen initialised */ 106 #define PROGRESS_HWINT 0x0080 107 #define PROGRESS_PHY 0x0100 /* PHY initialised */ 108 #define PROGRESS_NDD 0x0200 /* NDD parameters set up */ 109 #define PROGRESS_KSTATS 0x0400 /* kstats created */ 110 #define PROGRESS_READY 0x0800 /* ready for work */ 111 112 #define NGE_HW_ERR 0x00 113 #define NGE_HW_LINK 0x01 114 #define NGE_HW_BM 0x02 115 #define NGE_HW_RCHAN 0x03 116 #define NGE_HW_TCHAN 0x04 117 #define NGE_HW_ROM 0x05 118 #define NGE_SW_PROBLEM_ID 0x06 119 120 121 /* 122 * NOTES: 123 * 124 * #defines: 125 * 126 * NGE_PCI_CONFIG_RNUMBER and NGE_PCI_OPREGS_RNUMBER are the 127 * register-set numbers to use for the config space registers 128 * and the operating registers respectively. On an OBP-based 129 * machine, regset 0 refers to CONFIG space, and regset 1 will 130 * be the operating registers in MEMORY space. If an expansion 131 * ROM is fitted, it may appear as a further register set. 132 * 133 * NGE_DMA_MODE defines the mode (STREAMING/CONSISTENT) used 134 * for the data buffers. The descriptors are always set up 135 * in CONSISTENT mode. 136 * 137 * NGE_HEADROOM defines how much space we'll leave in allocated 138 * mblks before the first valid data byte. This should be chosen 139 * to be 2 modulo 4, so that once the ethernet header (14 bytes) 140 * has been stripped off, the packet data will be 4-byte aligned. 141 * The remaining space can be used by upstream modules to prepend 142 * any headers required. 143 */ 144 145 146 #define NGE_PCI_OPREGS_RNUMBER 1 147 #define NGE_DMA_MODE DDI_DMA_STREAMING 148 #define NGE_HEADROOM 6 149 #define ETHER_HEAD_LEN 14 150 #ifndef VTAG_SIZE 151 #define VTAG_SIZE 4 152 #endif 153 154 #define NGE_HALFTICK 268435456LL /* 2**28 ns! */ 155 #define NGE_CYCLIC_PERIOD (4*NGE_HALFTICK) /* ~0.5s */ 156 157 #define NGE_DEFAULT_MTU 1500 158 #define NGE_DEFAULT_SDU 1518 159 #define NGE_MTU_2500 2500 160 #define NGE_MTU_4500 4500 161 #define NGE_MAX_MTU 9000 162 #define NGE_MAX_SDU 9018 163 164 #define NGE_DESC_MIN 0x200 165 166 #define NGE_STD_BUFSZ 1792 167 #define NGE_JB2500_BUFSZ (3*1024) 168 #define NGE_JB4500_BUFSZ (5*1024) 169 #define NGE_JB9000_BUFSZ (9*1024) 170 171 #define NGE_SEND_SLOTS_DESC_1024 1024 172 #define NGE_SEND_SLOTS_DESC_3072 3072 173 #define NGE_SEND_JB2500_SLOTS_DESC 3072 174 #define NGE_SEND_JB4500_SLOTS_DESC 2048 175 #define NGE_SEND_JB9000_SLOTS_DESC 1024 176 #define NGE_SEND_LOWMEM_SLOTS_DESC 1024 177 #define NGE_SEND_SLOTS_BUF 3072 178 179 #define NGE_RECV_SLOTS_DESC_1024 1024 180 #define NGE_RECV_SLOTS_DESC_3072 3072 181 #define NGE_RECV_JB2500_SLOTS_DESC 3072 182 #define NGE_RECV_JB4500_SLOTS_DESC 2048 183 #define NGE_RECV_JB9000_SLOTS_DESC 1024 184 #define NGE_RECV_LOWMEM_SLOTS_DESC 1024 185 #define NGE_RECV_SLOTS_BUF 6144 186 187 #define NGE_SPLIT_32 32 188 #define NGE_SPLIT_96 96 189 #define NGE_SPLIT_256 256 190 191 #define NGE_RX_COPY_SIZE 512 192 #define NGE_TX_COPY_SIZE 512 193 #define NGE_MAP_FRAGS 3 194 #define NGE_MAX_COOKIES 3 195 #define NGE_MAX_DMA_HDR (4*1024) 196 197 /* Used by interrupt moderation */ 198 #define NGE_POLL_QUIET_TIME 100 199 #define NGE_POLL_BUSY_TIME 2 200 #define NGE_TX_N_INTR 128 201 202 /* 203 * NGE-specific ioctls ... 204 */ 205 #define NGE_IOC ((((('N' << 8) + 'G') << 8) + 'E') << 8) 206 207 /* 208 * PHY register read/write ioctls, used by cable test software 209 */ 210 #define NGE_MII_READ (NGE_IOC|1) 211 #define NGE_MII_WRITE (NGE_IOC|2) 212 213 /* 214 * SEEPROM read/write ioctls, for use by SEEPROM upgrade utility 215 * 216 * Note: SEEPROMs can only be accessed as 32-bit words, so <see_addr> 217 * must be a multiple of 4. Not all systems have a SEEPROM fitted! 218 */ 219 #define NGE_SEE_READ (NGE_IOC|3) 220 #define NGE_SEE_WRITE (NGE_IOC|4) 221 222 223 /* 224 * These diagnostic IOCTLS are enabled only in DEBUG drivers 225 */ 226 #define NGE_DIAG (NGE_IOC|5) /* currently a no-op */ 227 #define NGE_PEEK (NGE_IOC|6) 228 #define NGE_POKE (NGE_IOC|7) 229 #define NGE_PHY_RESET (NGE_IOC|8) 230 #define NGE_SOFT_RESET (NGE_IOC|9) 231 #define NGE_HARD_RESET (NGE_IOC|10) 232 233 234 enum NGE_HW_OP { 235 NGE_CLEAR = 0, 236 NGE_SET 237 }; 238 239 /* 240 * Required state according to GLD 241 */ 242 enum nge_mac_state { 243 NGE_MAC_UNKNOWN, 244 NGE_MAC_RESET, 245 NGE_MAC_STOPPED, 246 NGE_MAC_STARTED, 247 NGE_MAC_UNATTACH 248 }; 249 enum loop_type { 250 NGE_LOOP_NONE = 0, 251 NGE_LOOP_EXTERNAL_100, 252 NGE_LOOP_EXTERNAL_10, 253 NGE_LOOP_INTERNAL_PHY, 254 }; 255 256 /* 257 * (Internal) return values from send_msg subroutines 258 */ 259 enum send_status { 260 SEND_COPY_FAIL = -1, /* => GLD_NORESOURCES */ 261 SEND_MAP_FAIL, /* => GLD_NORESOURCES */ 262 SEND_COPY_SUCESS, /* OK, msg queued */ 263 SEND_MAP_SUCCESS /* OK, free msg */ 264 }; 265 266 267 /* 268 * NDD parameter indexes, divided into: 269 * 270 * read-only parameters describing the hardware's capabilities 271 * read-write parameters controlling the advertised capabilities 272 * read-only parameters describing the partner's capabilities 273 * read-only parameters describing the link state 274 */ 275 enum { 276 PARAM_AUTONEG_CAP, 277 PARAM_PAUSE_CAP, 278 PARAM_ASYM_PAUSE_CAP, 279 PARAM_1000FDX_CAP, 280 PARAM_1000HDX_CAP, 281 PARAM_100T4_CAP, 282 PARAM_100FDX_CAP, 283 PARAM_100HDX_CAP, 284 PARAM_10FDX_CAP, 285 PARAM_10HDX_CAP, 286 287 PARAM_ADV_AUTONEG_CAP, 288 PARAM_ADV_PAUSE_CAP, 289 PARAM_ADV_ASYM_PAUSE_CAP, 290 PARAM_ADV_1000FDX_CAP, 291 PARAM_ADV_1000HDX_CAP, 292 PARAM_ADV_100T4_CAP, 293 PARAM_ADV_100FDX_CAP, 294 PARAM_ADV_100HDX_CAP, 295 PARAM_ADV_10FDX_CAP, 296 PARAM_ADV_10HDX_CAP, 297 298 PARAM_LP_AUTONEG_CAP, 299 PARAM_LP_PAUSE_CAP, 300 PARAM_LP_ASYM_PAUSE_CAP, 301 PARAM_LP_1000FDX_CAP, 302 PARAM_LP_1000HDX_CAP, 303 PARAM_LP_100T4_CAP, 304 PARAM_LP_100FDX_CAP, 305 PARAM_LP_100HDX_CAP, 306 PARAM_LP_10FDX_CAP, 307 PARAM_LP_10HDX_CAP, 308 309 PARAM_LINK_STATUS, 310 PARAM_LINK_SPEED, 311 PARAM_LINK_DUPLEX, 312 313 PARAM_LINK_AUTONEG, 314 PARAM_LINK_RX_PAUSE, 315 PARAM_LINK_TX_PAUSE, 316 317 PARAM_LOOP_MODE, 318 PARAM_TXBCOPY_THRESHOLD, 319 PARAM_RXBCOPY_THRESHOLD, 320 PARAM_RECV_MAX_PACKET, 321 PARAM_POLL_QUIET_TIME, 322 PARAM_POLL_BUSY_TIME, 323 PARAM_RX_INTR_HWATER, 324 PARAM_RX_INTR_LWATER, 325 PARAM_TX_N_INTR, 326 327 PARAM_COUNT 328 }; 329 330 331 /* 332 * (Internal) return values from ioctl subroutines 333 */ 334 enum ioc_reply { 335 IOC_INVAL = -1, /* bad, NAK with EINVAL */ 336 IOC_DONE, /* OK, reply sent */ 337 IOC_ACK, /* OK, just send ACK */ 338 IOC_REPLY, /* OK, just send reply */ 339 IOC_RESTART_ACK, /* OK, restart & ACK */ 340 IOC_RESTART_REPLY /* OK, restart & reply */ 341 }; 342 343 enum nge_pp_type { 344 NGE_PP_SPACE_CFG = 0, 345 NGE_PP_SPACE_REG, 346 NGE_PP_SPACE_NIC, 347 NGE_PP_SPACE_MII, 348 NGE_PP_SPACE_NGE, 349 NGE_PP_SPACE_TXDESC, 350 NGE_PP_SPACE_TXBUFF, 351 NGE_PP_SPACE_RXDESC, 352 NGE_PP_SPACE_RXBUFF, 353 NGE_PP_SPACE_STATISTICS, 354 NGE_PP_SPACE_SEEPROM, 355 NGE_PP_SPACE_FLASH 356 }; 357 358 /* 359 * Flag to kstat type 360 */ 361 enum nge_kstat_type { 362 NGE_KSTAT_RAW = 0, 363 NGE_KSTAT_STATS, 364 NGE_KSTAT_CHIPID, 365 NGE_KSTAT_DEBUG, 366 NGE_KSTAT_COUNT 367 }; 368 369 370 /* 371 * Actual state of the nvidia's chip 372 */ 373 enum nge_chip_state { 374 NGE_CHIP_FAULT = -2, /* fault, need reset */ 375 NGE_CHIP_ERROR, /* error, want reset */ 376 NGE_CHIP_INITIAL, /* Initial state only */ 377 NGE_CHIP_RESET, /* reset, need init */ 378 NGE_CHIP_STOPPED, /* Tx/Rx stopped */ 379 NGE_CHIP_RUNNING /* with interrupts */ 380 }; 381 382 enum nge_eeprom_size { 383 EEPROM_1K = 0, 384 EEPROM_2K, 385 EEPROM_4K, 386 EEPROM_8K, 387 EEPROM_16K, 388 EEPROM_32K, 389 EEPROM_64K 390 }; 391 392 enum nge_eeprom_access_wid { 393 ACCESS_8BIT = 0, 394 ACCESS_16BIT 395 }; 396 397 /* 398 * MDIO operation 399 */ 400 enum nge_mdio_operation { 401 NGE_MDIO_READ = 0, 402 NGE_MDIO_WRITE 403 }; 404 405 /* 406 * Speed selection 407 */ 408 enum nge_speed { 409 UNKOWN_SPEED = 0, 410 NGE_10M, 411 NGE_100M, 412 NGE_1000M 413 }; 414 415 /* 416 * Duplex selection 417 */ 418 enum nge_duplex { 419 UNKOWN_DUPLEX = 0, 420 NGE_HD, 421 NGE_FD 422 }; 423 424 typedef struct { 425 ether_addr_t addr; /* in canonical form */ 426 uint8_t spare; 427 uint8_t set; /* nonzero => valid */ 428 } nge_mac_addr_t; 429 430 struct nge; 431 432 /* 433 * Named Data (ND) Parameter Management Structure 434 */ 435 typedef struct { 436 int ndp_info; 437 int ndp_min; 438 int ndp_max; 439 int ndp_val; 440 char *ndp_name; 441 } nd_param_t; 442 443 444 #define CHIP_FLAG_COPPER 0x40 445 446 /* 447 * Collection of physical-layer functions to: 448 * (re)initialise the physical layer 449 * update it to match software settings 450 * check for link status change 451 */ 452 typedef struct { 453 void (*phys_restart)(struct nge *); 454 void (*phys_update)(struct nge *); 455 boolean_t (*phys_check)(struct nge *); 456 } phys_ops_t; 457 458 struct nge_see_rw { 459 uint32_t see_addr; /* Byte offset within SEEPROM */ 460 uint32_t see_data; /* Data read/data to write */ 461 }; 462 463 typedef struct { 464 uint64_t pp_acc_size; /* in bytes: 1,2,4,8 */ 465 uint64_t pp_acc_space; /* See #defines below */ 466 uint64_t pp_acc_offset; 467 uint64_t pp_acc_data; /* output for peek */ 468 /* input for poke */ 469 } nge_peekpoke_t; 470 471 typedef uintptr_t nge_regno_t; /* register # (offset) */ 472 473 typedef struct _mul_list { 474 struct _mul_list *next; 475 uint32_t ref_cnt; 476 ether_addr_t mul_addr; 477 }mul_item, *pmul_item; 478 479 /* 480 * Describes one chunk of allocated DMA-able memory 481 * 482 * In some cases, this is a single chunk as allocated from the system; 483 * but we also use this structure to represent slices carved off such 484 * a chunk. Even when we don't really need all the information, we 485 * use this structure as a convenient way of correlating the various 486 * ways of looking at a piece of memory (kernel VA, IO space DVMA, 487 * handle+offset, etc). 488 */ 489 typedef struct dma_area 490 { 491 492 caddr_t private; /* pointer to nge */ 493 frtn_t rx_recycle; /* recycle function */ 494 mblk_t *mp; 495 ddi_acc_handle_t acc_hdl; /* handle for memory */ 496 void *mem_va; /* CPU VA of memory */ 497 uint32_t nslots; /* number of slots */ 498 uint32_t size; /* size per slot */ 499 size_t alength; /* allocated size */ 500 /* >= product of above */ 501 ddi_dma_handle_t dma_hdl; /* DMA handle */ 502 offset_t offset; /* relative to handle */ 503 ddi_dma_cookie_t cookie; /* associated cookie */ 504 uint32_t ncookies; 505 uint32_t signature; /* buffer signature */ 506 /* for deciding to free */ 507 /* or to reuse buffers */ 508 boolean_t rx_delivered; /* hold by upper layer */ 509 struct dma_area *next; 510 } dma_area_t; 511 512 #define HOST_OWN 0x00000000 513 #define CONTROLER_OWN 0x00000001 514 #define NGE_END_PACKET 0x00000002 515 516 517 typedef struct nge_dmah_node 518 { 519 struct nge_dmah_node *next; 520 ddi_dma_handle_t hndl; 521 } nge_dmah_node_t; 522 523 typedef struct nge_dmah_list 524 { 525 nge_dmah_node_t *head; 526 nge_dmah_node_t *tail; 527 } nge_dmah_list_t; 528 529 /* 530 * Software version of the Recv Descriptor 531 * There's one of these for each recv buffer (up to 512 per ring) 532 */ 533 typedef struct sw_rx_sbd { 534 535 dma_area_t desc; /* (const) related h/w */ 536 /* descriptor area */ 537 dma_area_t *bufp; /* (const) related */ 538 /* buffer area */ 539 uint8_t flags; 540 } sw_rx_sbd_t; 541 542 /* 543 * Software version of the send Buffer Descriptor 544 * There's one of these for each send buffer (up to 512 per ring) 545 */ 546 typedef struct sw_tx_sbd { 547 548 dma_area_t desc; /* (const) related h/w */ 549 /* descriptor area */ 550 dma_area_t pbuf; /* (const) related */ 551 /* buffer area */ 552 void (*tx_recycle)(struct sw_tx_sbd *); 553 uint32_t flags; 554 mblk_t *mp; /* related mblk, if any */ 555 nge_dmah_list_t mp_hndl; 556 uint32_t frags; 557 uint32_t ncookies; /* dma cookie number */ 558 559 } sw_tx_sbd_t; 560 561 /* 562 * Software Receive Buffer (Producer) Ring Control Block 563 * There's one of these for each receiver producer ring (up to 3), 564 * but each holds buffers of a different size. 565 */ 566 typedef struct buff_ring { 567 568 uint64_t nslots; /* descriptor area */ 569 struct nge *ngep; /* (const) containing */ 570 /* driver soft state */ 571 /* initialise same */ 572 uint64_t rx_hold; 573 sw_rx_sbd_t *sw_rbds; /* software descriptors */ 574 sw_rx_sbd_t *free_rbds; /* free ring */ 575 dma_area_t *free_list; /* available buffer queue */ 576 dma_area_t *recycle_list; /* recycling buffer queue */ 577 kmutex_t recycle_lock[1]; 578 uint32_t buf_sign; /* buffer ring signature */ 579 /* for deciding to free */ 580 /* or to reuse buffers */ 581 boolean_t rx_bcopy; 582 } buff_ring_t; 583 584 /* 585 * Software Receive (Return) Ring Control Block 586 * There's one of these for each receiver return ring (up to 16). 587 */ 588 typedef struct recv_ring { 589 /* 590 * The elements flagged (const) in the comments below are 591 * set up once during initialiation and thereafter unchanged. 592 */ 593 dma_area_t desc; /* (const) related h/w */ 594 /* descriptor area */ 595 struct nge *ngep; /* (const) containing */ 596 /* driver soft state */ 597 uint16_t prod_index; /* (const) ptr to h/w */ 598 /* "producer index" */ 599 mac_resource_handle_t handle; 600 } recv_ring_t; 601 602 603 604 /* 605 * Software Send Ring Control Block 606 * There's one of these for each of (up to) 1 send rings 607 */ 608 typedef struct send_ring { 609 /* 610 * The elements flagged (const) in the comments below are 611 * set up once during initialiation and thereafter unchanged. 612 */ 613 dma_area_t desc; /* (const) related h/w */ 614 /* descriptor area */ 615 dma_area_t buf[NGE_SEND_SLOTS_BUF]; 616 /* buffer area(s) */ 617 struct nge *ngep; /* (const) containing */ 618 /* driver soft state */ 619 620 uint64_t tx_hwmark; 621 uint64_t tx_lwmark; 622 623 /* 624 * The tx_lock must be held when updating 625 * the s/w producer index 626 * (tx_next) 627 */ 628 kmutex_t tx_lock[1]; /* serialize h/w update */ 629 uint64_t tx_next; /* next slot to use */ 630 uint64_t tx_flow; 631 632 /* 633 * These counters/indexes are manipulated in the transmit 634 * path using atomics rather than mutexes for speed 635 */ 636 uint64_t tx_free; /* # of slots available */ 637 638 /* 639 * index (tc_next). 640 */ 641 kmutex_t tc_lock[1]; 642 uint64_t tc_next; /* next slot to recycle */ 643 /* ("consumer index") */ 644 645 sw_tx_sbd_t *sw_sbds; /* software descriptors */ 646 647 kmutex_t dmah_lock; 648 nge_dmah_list_t dmah_free; 649 nge_dmah_node_t dmahndl[NGE_MAX_DMA_HDR]; 650 651 } send_ring_t; 652 653 654 typedef struct { 655 uint32_t businfo; /* from private reg */ 656 uint16_t command; /* saved during attach */ 657 658 uint16_t vendor; /* vendor-id */ 659 uint16_t device; /* device-id */ 660 uint16_t subven; /* subsystem-vendor-id */ 661 uint16_t subdev; /* subsystem-id */ 662 uint8_t class_code; 663 uint8_t revision; /* revision-id */ 664 uint8_t clsize; /* cache-line-size */ 665 uint8_t latency; /* latency-timer */ 666 uint8_t flags; 667 668 uint16_t phy_type; /* Fiber module type */ 669 uint64_t hw_mac_addr; /* from chip register */ 670 nge_mac_addr_t vendor_addr; /* transform of same */ 671 } chip_info_t; 672 673 674 typedef struct { 675 offset_t index; 676 char *name; 677 } nge_ksindex_t; 678 679 typedef struct { 680 uint64_t tso_err_mss; 681 uint64_t tso_dis; 682 uint64_t tso_err_nosum; 683 uint64_t tso_err_hov; 684 uint64_t tso_err_huf; 685 uint64_t tso_err_l2; 686 uint64_t tso_err_ip; 687 uint64_t tso_err_l4; 688 uint64_t tso_err_tcp; 689 uint64_t hsum_err_ip; 690 uint64_t hsum_err_l4; 691 }fe_statistics_t; 692 693 /* 694 * statistics parameters to tune the driver 695 */ 696 typedef struct { 697 uint64_t intr_count; 698 uint64_t intr_lval; 699 uint64_t recv_realloc; 700 uint64_t poll_time; 701 uint64_t recy_free; 702 uint64_t recv_count; 703 uint64_t xmit_count; 704 uint64_t obytes; 705 uint64_t rbytes; 706 uint64_t mp_alloc_err; 707 uint64_t dma_alloc_err; 708 uint64_t kmem_alloc_err; 709 uint64_t load_context; 710 uint64_t ip_hwsum_err; 711 uint64_t tcp_hwsum_err; 712 uint64_t rx_nobuffer; 713 uint64_t rx_err; 714 uint64_t tx_stop_err; 715 uint64_t tx_stall; 716 uint64_t tx_rsrv_fail; 717 uint64_t tx_resched; 718 fe_statistics_t fe_err; 719 }nge_sw_statistics_t; 720 721 typedef struct { 722 nge_hw_statistics_t hw_statistics; 723 nge_sw_statistics_t sw_statistics; 724 }nge_statistics_t; 725 726 struct nge_desc_attr { 727 728 size_t rxd_size; 729 size_t txd_size; 730 731 ddi_dma_attr_t *dma_attr; 732 ddi_dma_attr_t *tx_dma_attr; 733 734 void (*rxd_fill)(void *, const ddi_dma_cookie_t *, size_t); 735 uint32_t (*rxd_check)(const void *, size_t *); 736 737 void (*txd_fill)(void *, const ddi_dma_cookie_t *, size_t, 738 uint32_t, boolean_t); 739 740 uint32_t (*txd_check)(const void *, size_t *); 741 }; 742 743 typedef struct nge_desc_attr nge_desc_attr_t; 744 745 /* 746 * Structure used to hold the device-specific config parameters. 747 * The setting of such parameters may not consistent with the 748 * hardware feature of the device. It's used for software purpose. 749 */ 750 typedef struct nge_dev_spec_param { 751 boolean_t msi; /* specifies msi support */ 752 boolean_t msi_x; /* specifies msi_x support */ 753 boolean_t vlan; /* specifies vlan support */ 754 boolean_t advanced_pm; /* advanced power management support */ 755 boolean_t tx_pause_frame; /* specifies tx pause frame support */ 756 boolean_t rx_pause_frame; /* specifies rx pause frame support */ 757 boolean_t jumbo; /* jumbo frame support */ 758 boolean_t tx_rx_64byte; /* set the max tx/rx prd fetch size */ 759 boolean_t rx_hw_checksum; /* specifies tx hw checksum feature */ 760 uint32_t tx_hw_checksum; /* specifies rx hw checksum feature */ 761 uint32_t desc_type; /* specifies descriptor type */ 762 uint32_t rx_desc_num; /* specifies rx descriptor number */ 763 uint32_t tx_desc_num; /* specifies tx descriptor number */ 764 uint32_t nge_split; /* specifies the split number */ 765 } nge_dev_spec_param_t; 766 767 typedef struct nge { 768 /* 769 * These fields are set by attach() and unchanged thereafter ... 770 */ 771 dev_info_t *devinfo; /* device instance */ 772 mac_handle_t mh; /* mac module handle */ 773 chip_info_t chipinfo; 774 ddi_acc_handle_t cfg_handle; /* DDI I/O handle */ 775 ddi_acc_handle_t io_handle; /* DDI I/O handle */ 776 void *io_regs; /* mapped registers */ 777 778 ddi_periodic_t periodic_id; /* periodical callback */ 779 uint32_t factotum_flag; 780 ddi_softint_handle_t factotum_hdl; /* factotum callback */ 781 ddi_softint_handle_t resched_hdl; /* reschedule callback */ 782 uint_t soft_pri; 783 784 ddi_intr_handle_t *htable; /* for array of interrupts */ 785 int intr_type; /* type of interrupt */ 786 int intr_actual_cnt; /* alloc intrs count */ 787 int intr_req_cnt; /* request intrs count */ 788 uint_t intr_pri; /* interrupt priority */ 789 int intr_cap; /* interrupt capabilities */ 790 791 uint32_t progress; /* attach tracking */ 792 uint32_t debug; /* flag to debug function */ 793 794 char ifname[8]; /* "nge0" ... "nge999" */ 795 796 797 enum nge_mac_state nge_mac_state; /* definitions above */ 798 enum nge_chip_state nge_chip_state; /* definitions above */ 799 boolean_t promisc; 800 boolean_t suspended; 801 802 int resched_needed; 803 uint32_t default_mtu; 804 uint32_t max_sdu; 805 uint32_t buf_size; 806 uint32_t rx_desc; 807 uint32_t tx_desc; 808 uint32_t rx_buf; 809 uint32_t nge_split; 810 uint32_t watchdog; 811 uint32_t lowmem_mode; 812 813 814 /* 815 * Runtime read-write data starts here ... 816 * 1 Receive Rings 817 * 1 Send Rings 818 * 819 * Note: they're not necessarily all used. 820 */ 821 struct buff_ring buff[1]; 822 struct recv_ring recv[1]; 823 struct send_ring send[1]; 824 825 826 kmutex_t genlock[1]; 827 krwlock_t rwlock[1]; 828 kmutex_t softlock[1]; 829 uint32_t intr_masks; 830 boolean_t poll; 831 boolean_t ch_intr_mode; 832 boolean_t intr_moderation; 833 uint32_t recv_count; 834 uint32_t quiet_time; 835 uint32_t busy_time; 836 uint32_t stint_count; 837 uint32_t sw_intr_intv; 838 nge_mac_addr_t cur_uni_addr; 839 uint32_t rx_datahwm; 840 uint32_t rx_prdlwm; 841 uint32_t rx_prdhwm; 842 uint32_t rx_def; 843 uint32_t desc_mode; 844 845 mul_item *pcur_mulist; 846 nge_mac_addr_t cur_mul_addr; 847 nge_mac_addr_t cur_mul_mask; 848 849 nge_desc_attr_t desc_attr; 850 851 /* 852 * Link state data (protected by genlock) 853 */ 854 int32_t link_state; /* See GLD #defines */ 855 uint32_t stall_cknum; /* Stall check number */ 856 857 uint32_t phy_xmii_addr; 858 uint32_t phy_id; 859 uint32_t phy_mode; 860 const phys_ops_t *physops; 861 uint16_t phy_gen_status; 862 863 uint32_t param_loop_mode; 864 865 /* 866 * NDD parameters (protected by genlock) 867 */ 868 caddr_t nd_data_p; 869 nd_param_t nd_params[PARAM_COUNT]; 870 871 kstat_t *nge_kstats[NGE_KSTAT_COUNT]; 872 nge_statistics_t statistics; 873 874 nge_dev_spec_param_t dev_spec_param; 875 876 uint32_t param_en_pause:1, 877 param_en_asym_pause:1, 878 param_en_1000hdx:1, 879 param_en_1000fdx:1, 880 param_en_100fdx:1, 881 param_en_100hdx:1, 882 param_en_10fdx:1, 883 param_en_10hdx:1, 884 param_pad_to_32:24; 885 } nge_t; 886 887 extern const nge_ksindex_t nge_statistics[]; 888 889 /* 890 * Shorthand for the NDD parameters 891 */ 892 #define param_adv_autoneg nd_params[PARAM_ADV_AUTONEG_CAP].ndp_val 893 #define param_adv_pause nd_params[PARAM_ADV_PAUSE_CAP].ndp_val 894 #define param_adv_asym_pause nd_params[PARAM_ADV_ASYM_PAUSE_CAP].ndp_val 895 #define param_adv_1000fdx nd_params[PARAM_ADV_1000FDX_CAP].ndp_val 896 #define param_adv_1000hdx nd_params[PARAM_ADV_1000HDX_CAP].ndp_val 897 #define param_adv_100fdx nd_params[PARAM_ADV_100FDX_CAP].ndp_val 898 #define param_adv_100hdx nd_params[PARAM_ADV_100HDX_CAP].ndp_val 899 #define param_adv_10fdx nd_params[PARAM_ADV_10FDX_CAP].ndp_val 900 #define param_adv_10hdx nd_params[PARAM_ADV_10HDX_CAP].ndp_val 901 902 #define param_lp_autoneg nd_params[PARAM_LP_AUTONEG_CAP].ndp_val 903 #define param_lp_pause nd_params[PARAM_LP_PAUSE_CAP].ndp_val 904 #define param_lp_asym_pause nd_params[PARAM_LP_ASYM_PAUSE_CAP].ndp_val 905 #define param_lp_1000fdx nd_params[PARAM_LP_1000FDX_CAP].ndp_val 906 #define param_lp_1000hdx nd_params[PARAM_LP_1000HDX_CAP].ndp_val 907 #define param_lp_100fdx nd_params[PARAM_LP_100FDX_CAP].ndp_val 908 #define param_lp_100hdx nd_params[PARAM_LP_100HDX_CAP].ndp_val 909 #define param_lp_10fdx nd_params[PARAM_LP_10FDX_CAP].ndp_val 910 #define param_lp_10hdx nd_params[PARAM_LP_10HDX_CAP].ndp_val 911 912 #define param_link_up nd_params[PARAM_LINK_STATUS].ndp_val 913 #define param_link_speed nd_params[PARAM_LINK_SPEED].ndp_val 914 #define param_link_duplex nd_params[PARAM_LINK_DUPLEX].ndp_val 915 916 #define param_link_autoneg nd_params[PARAM_LINK_AUTONEG].ndp_val 917 #define param_link_rx_pause nd_params[PARAM_LINK_RX_PAUSE].ndp_val 918 #define param_link_tx_pause nd_params[PARAM_LINK_TX_PAUSE].ndp_val 919 920 #define param_loop_mode nd_params[PARAM_LOOP_MODE].ndp_val 921 922 #define param_txbcopy_threshold nd_params[PARAM_TXBCOPY_THRESHOLD].ndp_val 923 #define param_rxbcopy_threshold nd_params[PARAM_RXBCOPY_THRESHOLD].ndp_val 924 #define param_recv_max_packet nd_params[PARAM_RECV_MAX_PACKET].ndp_val 925 #define param_poll_quiet_time nd_params[PARAM_POLL_QUIET_TIME].ndp_val 926 #define param_poll_busy_time nd_params[PARAM_POLL_BUSY_TIME].ndp_val 927 #define param_rx_intr_hwater nd_params[PARAM_RX_INTR_HWATER].ndp_val 928 #define param_rx_intr_lwater nd_params[PARAM_RX_INTR_LWATER].ndp_val 929 #define param_tx_n_intr nd_params[PARAM_TX_N_INTR].ndp_val 930 931 /* 932 * Sync a DMA area described by a dma_area_t 933 */ 934 #define DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl, \ 935 (area).offset, (area).alength, (flag))) 936 937 /* 938 * Find the (kernel virtual) address of block of memory 939 * described by a dma_area_t 940 */ 941 #define DMA_VPTR(area) ((area).mem_va) 942 943 /* 944 * Zero a block of memory described by a dma_area_t 945 */ 946 #define DMA_ZERO(area) bzero(DMA_VPTR(area), (area).alength) 947 948 /* 949 * Next/Prev value of a cyclic index 950 */ 951 #define NEXT(index, limit) ((index) + 1 < (limit) ? (index) + 1 : 0) 952 #define PREV(index, limit) (0 == (index) ? (limit - 1) : (index) - 1) 953 954 #define NEXT_INDEX(ndx, num, lim)\ 955 (((ndx) + (num) < (lim)) ? ((ndx) + (num)) : ((ndx) + (num) - (lim))) 956 957 958 /* 959 * Property lookups 960 */ 961 #define NGE_PROP_EXISTS(d, n) ddi_prop_exists(DDI_DEV_T_ANY, (d), \ 962 DDI_PROP_DONTPASS, (n)) 963 #define NGE_PROP_GET_INT(d, n) ddi_prop_get_int(DDI_DEV_T_ANY, (d), \ 964 DDI_PROP_DONTPASS, (n), -1) 965 966 967 /* 968 * Debugging ... 969 */ 970 #ifdef DEBUG 971 #define NGE_DEBUGGING 1 972 #else 973 #define NGE_DEBUGGING 0 974 #endif /* DEBUG */ 975 976 /* 977 * Bit flags in the 'debug' word ... 978 */ 979 #define NGE_DBG_STOP 0x00000001 /* early debug_enter() */ 980 #define NGE_DBG_TRACE 0x00000002 /* general flow tracing */ 981 982 #define NGE_DBG_MII 0x00000010 /* low-level MII access */ 983 #define NGE_DBG_CHIP 0x00000020 /* low(ish)-level code */ 984 985 #define NGE_DBG_RECV 0x00000100 /* receive-side code */ 986 #define NGE_DBG_SEND 0x00000200 /* packet-send code */ 987 988 #define NGE_DBG_INIT 0x00100000 /* initialisation */ 989 #define NGE_DBG_NEMO 0x00200000 /* MAC layer entry points */ 990 #define NGE_DBG_STATS 0x00400000 /* statistics */ 991 992 #define NGE_DBG_BADIOC 0x01000000 /* unknown ioctls */ 993 994 #define NGE_DBG_NDD 0x10000000 /* NDD operations */ 995 996 997 998 /* 999 * 'Do-if-debugging' macro. The parameter <command> should be one or more 1000 * C statements (but without the *final* semicolon), which will either be 1001 * compiled inline or completely ignored, depending on the NGE_DEBUGGING 1002 * compile-time flag. 1003 * 1004 * You should get a compile-time error (at least on a DEBUG build) if 1005 * your statement isn't actually a statement, rather than unexpected 1006 * run-time behaviour caused by unintended matching of if-then-elses etc. 1007 * 1008 * Note that the NGE_DDB() macro itself can only be used as a statement, 1009 * not an expression, and should always be followed by a semicolon. 1010 */ 1011 #if NGE_DEBUGGING 1012 #define NGE_DDB(command) do { \ 1013 { command; } \ 1014 _NOTE(CONSTANTCONDITION) \ 1015 } while (0) 1016 #else /* NGE_DEBUGGING */ 1017 #define NGE_DDB(command) 1018 /* 1019 * Old way of debugging. This is a poor way, as it leeaves empty 1020 * statements that cause lint to croak. 1021 * #define NGE_DDB(command) do { \ 1022 * { _NOTE(EMPTY); } \ 1023 * _NOTE(CONSTANTCONDITION) \ 1024 * } while (0) 1025 */ 1026 #endif /* NGE_DEBUGGING */ 1027 1028 /* 1029 * 'Internal' macros used to construct the TRACE/DEBUG macros below. 1030 * These provide the primitive conditional-call capability required. 1031 * Note: the parameter <args> is a parenthesised list of the actual 1032 * printf-style arguments to be passed to the debug function ... 1033 */ 1034 #define NGE_XDB(b, w, f, args) NGE_DDB(if ((b) & (w)) f args) 1035 #define NGE_GDB(b, args) NGE_XDB(b, nge_debug, (*nge_gdb()), args) 1036 #define NGE_LDB(b, args) NGE_XDB(b, ngep->debug, \ 1037 (*nge_db(ngep)), args) 1038 #define NGE_CDB(f, args) NGE_XDB(NGE_DBG, ngep->debug, f, args) 1039 1040 /* 1041 * Conditional-print macros. 1042 * 1043 * Define NGE_DBG to be the relevant member of the set of NGE_DBG_* values 1044 * above before using the NGE_GDEBUG() or NGE_DEBUG() macros. The 'G' 1045 * versions look at the Global debug flag word (nge_debug); the non-G 1046 * versions look in the per-instance data (ngep->debug) and so require a 1047 * variable called 'ngep' to be in scope (and initialised!) before use. 1048 * 1049 * You could redefine NGE_TRC too if you really need two different 1050 * flavours of debugging output in the same area of code, but I don't 1051 * really recommend it. 1052 * 1053 * Note: the parameter <args> is a parenthesised list of the actual 1054 * arguments to be passed to the debug function, usually a printf-style 1055 * format string and corresponding values to be formatted. 1056 */ 1057 1058 #define NGE_TRC NGE_DBG_TRACE 1059 1060 #define NGE_GTRACE(args) NGE_GDB(NGE_TRC, args) 1061 #define NGE_GDEBUG(args) NGE_GDB(NGE_DBG, args) 1062 #define NGE_TRACE(args) NGE_LDB(NGE_TRC, args) 1063 #define NGE_DEBUG(args) NGE_LDB(NGE_DBG, args) 1064 1065 /* 1066 * Debug-only action macros 1067 */ 1068 1069 1070 #define NGE_REPORT(args) NGE_DDB(nge_log args) 1071 1072 boolean_t nge_atomic_decrease(uint64_t *count_p, uint64_t n); 1073 void nge_atomic_increase(uint64_t *count_p, uint64_t n); 1074 1075 int nge_alloc_dma_mem(nge_t *ngep, size_t memsize, 1076 ddi_device_acc_attr_t *attr_p, uint_t dma_flags, dma_area_t *dma_p); 1077 void nge_free_dma_mem(dma_area_t *dma_p); 1078 int nge_restart(nge_t *ngep); 1079 void nge_wake_factotum(nge_t *ngep); 1080 1081 uint8_t nge_reg_get8(nge_t *ngep, nge_regno_t regno); 1082 void nge_reg_put8(nge_t *ngep, nge_regno_t regno, uint8_t data); 1083 uint16_t nge_reg_get16(nge_t *ngep, nge_regno_t regno); 1084 void nge_reg_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 1085 uint32_t nge_reg_get32(nge_t *ngep, nge_regno_t regno); 1086 void nge_reg_put32(nge_t *ngep, nge_regno_t regno, uint32_t data); 1087 uint_t nge_chip_factotum(caddr_t args1, caddr_t args2); 1088 void nge_chip_cfg_init(nge_t *ngep, chip_info_t *infop, boolean_t reset); 1089 void nge_init_dev_spec_param(nge_t *ngep); 1090 int nge_chip_stop(nge_t *ngep, boolean_t fault); 1091 void nge_restore_mac_addr(nge_t *ngep); 1092 int nge_chip_reset(nge_t *ngep); 1093 int nge_chip_start(nge_t *ngep); 1094 void nge_chip_sync(nge_t *ngep); 1095 1096 uint_t nge_chip_intr(caddr_t arg1, caddr_t arg2); 1097 enum ioc_reply nge_chip_ioctl(nge_t *ngep, mblk_t *mp, struct iocblk *iocp); 1098 1099 void nge_phys_init(nge_t *ngep); 1100 boolean_t nge_phy_reset(nge_t *ngep); 1101 uint16_t nge_mii_get16(nge_t *ngep, nge_regno_t regno); 1102 void nge_mii_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 1103 1104 void nge_recv_recycle(caddr_t arg); 1105 void nge_receive(nge_t *ngep); 1106 1107 uint_t nge_reschedule(caddr_t args1, caddr_t args2); 1108 mblk_t *nge_m_tx(void *arg, mblk_t *mp); 1109 1110 void nge_tx_recycle(nge_t *ngep, boolean_t is_intr); 1111 void nge_tx_recycle_all(nge_t *ngep); 1112 1113 enum ioc_reply nge_nd_ioctl(nge_t *ngep, queue_t *wq, 1114 mblk_t *mp, struct iocblk *iocp); 1115 int nge_nd_init(nge_t *ngep); 1116 void nge_nd_cleanup(nge_t *ngep); 1117 1118 1119 void nge_init_kstats(nge_t *ngep, int instance); 1120 void nge_fini_kstats(nge_t *ngep); 1121 int nge_m_stat(void *arg, uint_t stat, uint64_t *val); 1122 1123 uint32_t nge_atomic_shl32(uint32_t *sp, uint_t count); 1124 1125 void nge_log(nge_t *ngep, const char *fmt, ...); 1126 void nge_problem(nge_t *ngep, const char *fmt, ...); 1127 void nge_error(nge_t *ngep, const char *fmt, ...); 1128 void 1129 nge_report(nge_t *ngep, uint8_t error_id); 1130 1131 void (*nge_db(nge_t *ngep))(const char *fmt, ...); 1132 void (*nge_gdb(void))(const char *fmt, ...); 1133 extern uint32_t nge_debug; 1134 1135 /* 1136 * DESC MODE 2 1137 */ 1138 1139 extern void nge_sum_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 1140 extern uint32_t nge_sum_rxd_check(const void *, size_t *); 1141 1142 extern void nge_sum_txd_fill(void *, const ddi_dma_cookie_t *, 1143 size_t, uint32_t, boolean_t); 1144 extern uint32_t nge_sum_txd_check(const void *, size_t *); 1145 1146 /* 1147 * DESC MODE 3 1148 */ 1149 1150 extern void nge_hot_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 1151 extern uint32_t nge_hot_rxd_check(const void *, size_t *); 1152 1153 extern void nge_hot_txd_fill(void *, const ddi_dma_cookie_t *, 1154 size_t, uint32_t, boolean_t); 1155 extern uint32_t nge_hot_txd_check(const void *, size_t *); 1156 1157 #ifdef __cplusplus 1158 } 1159 #endif 1160 1161 #endif /* _SYS_NGE_H */ 1162