1 /* 2 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2007, Intel Corporation 8 * All rights reserved. 9 */ 10 11 /* 12 * Sun elects to use this software under the BSD license. 13 */ 14 15 /* 16 * This file is provided under a dual BSD/GPLv2 license. When using or 17 * redistributing this file, you may do so under either license. 18 * 19 * GPL LICENSE SUMMARY 20 * 21 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved. 22 * 23 * This program is free software; you can redistribute it and/or modify 24 * it under the terms of version 2 of the GNU Geeral Public License as 25 * published by the Free Software Foundation. 26 * 27 * This program is distributed in the hope that it will be useful, but 28 * WITHOUT ANY WARRANTY; without even the implied warranty of 29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 30 * General Public License for more details. 31 * 32 * You should have received a copy of the GNU General Public License 33 * along with this program; if not, write to the Free Software 34 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 35 * USA 36 * 37 * The full GNU General Public License is included in this distribution 38 * in the file called LICENSE.GPL. 39 * 40 * Contact Information: 41 * James P. Ketrenos <ipw2100-admin@linux.intel.com> 42 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 43 * 44 * BSD LICENSE 45 * 46 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved. 47 * All rights reserved. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 53 * * Redistributions of source code must retain the above copyright 54 * notice, this list of conditions and the following disclaimer. 55 * * Redistributions in binary form must reproduce the above copyright 56 * notice, this list of conditions and the following disclaimer in 57 * the documentation and/or other materials provided with the 58 * distribution. 59 * * Neither the name Intel Corporation nor the names of its 60 * contributors may be used to endorse or promote products derived 61 * from this software without specific prior written permission. 62 * 63 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 64 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 65 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 66 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 67 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 68 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 69 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 70 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 71 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 72 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 73 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 74 */ 75 76 #ifndef _IWK_EEPROM_H_ 77 #define _IWK_EEPROM_H_ 78 79 #pragma ident "%Z%%M% %I% %E% SMI" 80 81 /* 82 * This file defines EEPROM related constants, enums, and inline functions. 83 */ 84 85 /* 86 * EEPROM field values 87 */ 88 #define ANTENNA_SWITCH_NORMAL 0 89 #define ANTENNA_SWITCH_INVERSE 1 90 91 enum { 92 EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ 93 EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ 94 /* Bit 2 Reserved */ 95 EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ 96 EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ 97 EEPROM_CHANNEL_WIDE = (1 << 5), 98 EEPROM_CHANNEL_NARROW = (1 << 6), 99 EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ 100 }; 101 102 /* 103 * EEPROM field lengths 104 */ 105 #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 106 107 /* 108 * EEPROM field lengths 109 */ 110 #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 111 #define EEPROM_REGULATORY_SKU_ID_LENGTH 4 112 #define EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH 14 113 #define EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH 13 114 #define EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH 12 115 #define EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH 11 116 #define EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH 6 117 118 119 #define EEPROM_REGULATORY_NUMBER_OF_BANDS 5 120 121 /* 122 * SKU Capabilities 123 */ 124 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) 125 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) 126 #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7) 127 128 /* 129 * *regulatory* channel data from eeprom, one for each channel 130 */ 131 struct iwl_eeprom_channel { 132 uint8_t flags; /* flags copied from EEPROM */ 133 int8_t max_power_avg; /* max power (dBm) on this chnl, limit 31 */ 134 }; 135 136 /* 137 * Mapping of a Tx power level, at factory calibration temperature, 138 * to a radio/DSP gain table index. 139 * One for each of 5 "sample" power levels in each band. 140 * v_det is measured at the factory, using the 3945's built-in power amplifier 141 * (PA) output voltage detector. This same detector is used during Tx of 142 * long packets in normal operation to provide feedback as to proper output 143 * level. 144 * Data copied from EEPROM. 145 */ 146 struct iwl_eeprom_txpower_sample { 147 uint8_t gain_index; /* index into power (gain) setup table ... */ 148 int8_t power; /* ... for this pwr level for this chnl group */ 149 uint16_t v_det; /* PA output voltage */ 150 }; 151 152 /* 153 * Mappings of Tx power levels -> nominal radio/DSP gain table indexes. 154 * One for each channel group (a.k.a. "band") (1 for BG, 4 for A). 155 * Tx power setup code interpolates between the 5 "sample" power levels 156 * to determine the nominal setup for a requested power level. 157 * Data copied from EEPROM. 158 * DO NOT ALTER THIS STRUCTURE!!! 159 */ 160 struct iwl_eeprom_txpower_group { 161 /* 5 power levels */ 162 struct iwl_eeprom_txpower_sample samples[5]; 163 /* coefficients for voltage->power formula (signed) */ 164 uint32_t a, b, c, d, e; 165 /* these modify coeffs based on frequency (signed) */ 166 uint32_t Fa, Fb, Fc, Fd, Fe; 167 /* highest power possible by h/w in this * band */ 168 int8_t saturation_power; 169 /* "representative" channel # in this band */ 170 uint8_t group_channel; 171 /* h/w temperature at factory calib this band (signed) */ 172 uint16_t temperature; 173 }; 174 175 /* 176 * Temperature-based Tx-power compensation data, not band-specific. 177 * These coefficients are use to modify a/b/c/d/e coeffs based on 178 * difference between current temperature and factory calib temperature. 179 * Data copied from EEPROM. 180 */ 181 struct iwl_eeprom_temperature_corr { 182 uint32_t Ta; 183 uint32_t Tb; 184 uint32_t Tc; 185 uint32_t Td; 186 uint32_t Te; 187 }; 188 189 #define EEP_TX_POWER_TX_CHAINS (2) 190 #define EEP_TX_POWER_BANDS (8) 191 #define EEP_TX_POWER_MEASURE (3) 192 #define EEP_TX_POWER_VERSION (2) 193 #define EEP_TX_POWER_VERSION_NEW (5) 194 195 struct iwk_eep_calib_measure { 196 uint8_t temperature; 197 uint8_t gain_idx; 198 uint8_t actual_pow; 199 int8_t pa_det; 200 }; 201 202 struct iwk_eep_calib_channel_info { 203 uint8_t ch_num; 204 struct iwk_eep_calib_measure 205 measure[EEP_TX_POWER_TX_CHAINS][EEP_TX_POWER_MEASURE]; 206 }; 207 208 struct iwk_eep_calib_subband_info { 209 uint8_t ch_from; 210 uint8_t ch_to; 211 struct iwk_eep_calib_channel_info ch1; 212 struct iwk_eep_calib_channel_info ch2; 213 }; 214 215 struct iwk_eep_calib_info { 216 uint8_t saturation_power24; 217 uint8_t saturation_power52; 218 uint16_t voltage; 219 struct iwk_eep_calib_subband_info band_info_tbl[EEP_TX_POWER_BANDS]; 220 }; 221 222 struct iwk_eep_channel { 223 uint8_t flags; 224 int8_t max_power_avg; /* each channel's maximum power, 31 as limit */ 225 }; 226 227 /* 228 * eeprom map 229 */ 230 struct iwk_eep { 231 uint8_t reser0[16]; 232 uint16_t device_id; 233 uint8_t reser1[2]; 234 uint16_t pmc; 235 uint8_t reser2[20]; 236 uint8_t mac_address[6]; 237 uint8_t reser3[58]; 238 uint16_t board_revision; 239 uint8_t reser4[11]; 240 uint8_t board_pba_number[9]; 241 uint8_t reser5[8]; 242 uint16_t version; 243 uint8_t sku_cap; 244 uint8_t leds_mode; 245 uint16_t oem_mode; 246 uint16_t wowlan_mode; 247 uint16_t leds_times_interval; 248 uint8_t leds_off_time; 249 uint8_t leds_on_time; 250 uint8_t almgor_m_version; 251 uint8_t antenna_switch_type; 252 uint8_t reser6[8]; 253 uint16_t board_revision_4965; 254 uint8_t reser7[13]; 255 uint8_t board_pba_number_4965[9]; 256 uint8_t reser8[10]; 257 uint8_t sku_id[4]; 258 uint16_t band_1_count; 259 struct iwk_eep_channel band_1_channels[14]; 260 uint16_t band_2_count; 261 struct iwk_eep_channel band_2_channels[13]; 262 uint16_t band_3_count; 263 struct iwk_eep_channel band_3_channels[12]; 264 uint16_t band_4_count; 265 struct iwk_eep_channel band_4_channels[11]; 266 uint16_t band_5_count; 267 struct iwk_eep_channel band_5_channels[6]; 268 uint8_t reser10[2]; 269 struct iwk_eep_channel band_24_channels[7]; 270 uint8_t reser11[2]; 271 struct iwk_eep_channel band_52_channels[11]; 272 uint8_t reser12[6]; 273 uint16_t calib_version; 274 uint8_t reser13[2]; 275 uint16_t satruation_power; 276 uint8_t reser14[94]; 277 struct iwk_eep_calib_info calib_info; 278 uint8_t reser15[140]; 279 }; 280 281 #define CSR_EEPROM_REG (CSR_BASE+0x02c) 282 #define CSR_EEPROM_GP (CSR_BASE+0x030) 283 #define CSR_EEPROM_GP_VALID_MSK 0x00000007 284 #define CSR_EEPROM_GP_BAD_SIGNATURE 0x00000000 285 286 287 288 #endif /* _IWK_EEPROM_H_ */ 289