1 /* 2 * CDDL HEADER START 3 * 4 * Copyright(c) 2007-2009 Intel Corporation. All rights reserved. 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 23 /* 24 * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 25 * Use is subject to license terms. 26 */ 27 /* 28 * Copyright 2014 Pluribus Networks Inc. 29 */ 30 31 #include "igb_sw.h" 32 33 /* 34 * Update driver private statistics. 35 */ 36 static int 37 igb_update_stats(kstat_t *ks, int rw) 38 { 39 igb_t *igb; 40 struct e1000_hw *hw; 41 igb_stat_t *igb_ks; 42 uint32_t val_low, val_high; 43 #ifdef IGB_DEBUG 44 int i; 45 #endif 46 47 if (rw == KSTAT_WRITE) 48 return (EACCES); 49 50 igb = (igb_t *)ks->ks_private; 51 igb_ks = (igb_stat_t *)ks->ks_data; 52 hw = &igb->hw; 53 54 mutex_enter(&igb->gen_lock); 55 56 /* 57 * Basic information. 58 */ 59 igb_ks->reset_count.value.ui64 = igb->reset_count; 60 igb_ks->dout_sync.value.ui64 = igb->dout_sync; 61 62 #ifdef IGB_DEBUG 63 igb_ks->rx_frame_error.value.ui64 = 0; 64 igb_ks->rx_cksum_error.value.ui64 = 0; 65 igb_ks->rx_exceed_pkt.value.ui64 = 0; 66 for (i = 0; i < igb->num_rx_rings; i++) { 67 igb_ks->rx_frame_error.value.ui64 += 68 igb->rx_rings[i].stat_frame_error; 69 igb_ks->rx_cksum_error.value.ui64 += 70 igb->rx_rings[i].stat_cksum_error; 71 igb_ks->rx_exceed_pkt.value.ui64 += 72 igb->rx_rings[i].stat_exceed_pkt; 73 } 74 75 igb_ks->tx_overload.value.ui64 = 0; 76 igb_ks->tx_fail_no_tbd.value.ui64 = 0; 77 igb_ks->tx_fail_no_tcb.value.ui64 = 0; 78 igb_ks->tx_fail_dma_bind.value.ui64 = 0; 79 igb_ks->tx_reschedule.value.ui64 = 0; 80 for (i = 0; i < igb->num_tx_rings; i++) { 81 igb_ks->tx_overload.value.ui64 += 82 igb->tx_rings[i].stat_overload; 83 igb_ks->tx_fail_no_tbd.value.ui64 += 84 igb->tx_rings[i].stat_fail_no_tbd; 85 igb_ks->tx_fail_no_tcb.value.ui64 += 86 igb->tx_rings[i].stat_fail_no_tcb; 87 igb_ks->tx_fail_dma_bind.value.ui64 += 88 igb->tx_rings[i].stat_fail_dma_bind; 89 igb_ks->tx_reschedule.value.ui64 += 90 igb->tx_rings[i].stat_reschedule; 91 } 92 93 /* 94 * Hardware calculated statistics. 95 */ 96 igb_ks->gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC); 97 igb_ks->gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC); 98 igb_ks->prc64.value.ul += E1000_READ_REG(hw, E1000_PRC64); 99 igb_ks->prc127.value.ul += E1000_READ_REG(hw, E1000_PRC127); 100 igb_ks->prc255.value.ul += E1000_READ_REG(hw, E1000_PRC255); 101 igb_ks->prc511.value.ul += E1000_READ_REG(hw, E1000_PRC511); 102 igb_ks->prc1023.value.ul += E1000_READ_REG(hw, E1000_PRC1023); 103 igb_ks->prc1522.value.ul += E1000_READ_REG(hw, E1000_PRC1522); 104 igb_ks->ptc64.value.ul += E1000_READ_REG(hw, E1000_PTC64); 105 igb_ks->ptc127.value.ul += E1000_READ_REG(hw, E1000_PTC127); 106 igb_ks->ptc255.value.ul += E1000_READ_REG(hw, E1000_PTC255); 107 igb_ks->ptc511.value.ul += E1000_READ_REG(hw, E1000_PTC511); 108 igb_ks->ptc1023.value.ul += E1000_READ_REG(hw, E1000_PTC1023); 109 igb_ks->ptc1522.value.ul += E1000_READ_REG(hw, E1000_PTC1522); 110 111 /* 112 * The 64-bit register will reset whenever the upper 113 * 32 bits are read. So we need to read the lower 114 * 32 bits first, then read the upper 32 bits. 115 */ 116 val_low = E1000_READ_REG(hw, E1000_GORCL); 117 val_high = E1000_READ_REG(hw, E1000_GORCH); 118 igb_ks->gor.value.ui64 += (uint64_t)val_high << 32 | (uint64_t)val_low; 119 120 val_low = E1000_READ_REG(hw, E1000_GOTCL); 121 val_high = E1000_READ_REG(hw, E1000_GOTCH); 122 igb_ks->got.value.ui64 += (uint64_t)val_high << 32 | (uint64_t)val_low; 123 #endif 124 igb_ks->symerrs.value.ui64 += E1000_READ_REG(hw, E1000_SYMERRS); 125 igb_ks->mpc.value.ui64 += E1000_READ_REG(hw, E1000_MPC); 126 igb_ks->rlec.value.ui64 += E1000_READ_REG(hw, E1000_RLEC); 127 igb_ks->fcruc.value.ui64 += E1000_READ_REG(hw, E1000_FCRUC); 128 igb_ks->rfc.value.ul += E1000_READ_REG(hw, E1000_RFC); 129 igb_ks->tncrs.value.ul += E1000_READ_REG(hw, E1000_TNCRS); 130 igb_ks->tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC); 131 igb_ks->tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC); 132 igb_ks->xonrxc.value.ui64 += E1000_READ_REG(hw, E1000_XONRXC); 133 igb_ks->xontxc.value.ui64 += E1000_READ_REG(hw, E1000_XONTXC); 134 igb_ks->xoffrxc.value.ui64 += E1000_READ_REG(hw, E1000_XOFFRXC); 135 igb_ks->xofftxc.value.ui64 += E1000_READ_REG(hw, E1000_XOFFTXC); 136 137 mutex_exit(&igb->gen_lock); 138 139 if (igb_check_acc_handle(igb->osdep.reg_handle) != DDI_FM_OK) { 140 ddi_fm_service_impact(igb->dip, DDI_SERVICE_DEGRADED); 141 return (EIO); 142 } 143 144 return (0); 145 } 146 147 /* 148 * Create and initialize the driver private statistics. 149 */ 150 int 151 igb_init_stats(igb_t *igb) 152 { 153 kstat_t *ks; 154 igb_stat_t *igb_ks; 155 156 /* 157 * Create and init kstat 158 */ 159 ks = kstat_create(MODULE_NAME, ddi_get_instance(igb->dip), 160 "statistics", "net", KSTAT_TYPE_NAMED, 161 sizeof (igb_stat_t) / sizeof (kstat_named_t), 0); 162 163 if (ks == NULL) { 164 igb_error(igb, 165 "Could not create kernel statistics"); 166 return (IGB_FAILURE); 167 } 168 169 igb->igb_ks = ks; 170 171 igb_ks = (igb_stat_t *)ks->ks_data; 172 173 /* 174 * Initialize all the statistics. 175 */ 176 kstat_named_init(&igb_ks->reset_count, "reset_count", 177 KSTAT_DATA_UINT64); 178 kstat_named_init(&igb_ks->dout_sync, "DMA_out_sync", 179 KSTAT_DATA_UINT64); 180 181 #ifdef IGB_DEBUG 182 kstat_named_init(&igb_ks->rx_frame_error, "rx_frame_error", 183 KSTAT_DATA_UINT64); 184 kstat_named_init(&igb_ks->rx_cksum_error, "rx_cksum_error", 185 KSTAT_DATA_UINT64); 186 kstat_named_init(&igb_ks->rx_exceed_pkt, "rx_exceed_pkt", 187 KSTAT_DATA_UINT64); 188 kstat_named_init(&igb_ks->tx_overload, "tx_overload", 189 KSTAT_DATA_UINT64); 190 kstat_named_init(&igb_ks->tx_fail_no_tbd, "tx_fail_no_tbd", 191 KSTAT_DATA_UINT64); 192 kstat_named_init(&igb_ks->tx_fail_no_tcb, "tx_fail_no_tcb", 193 KSTAT_DATA_UINT64); 194 kstat_named_init(&igb_ks->tx_fail_dma_bind, "tx_fail_dma_bind", 195 KSTAT_DATA_UINT64); 196 kstat_named_init(&igb_ks->tx_reschedule, "tx_reschedule", 197 KSTAT_DATA_UINT64); 198 199 kstat_named_init(&igb_ks->gprc, "good_pkts_recvd", 200 KSTAT_DATA_UINT64); 201 kstat_named_init(&igb_ks->gptc, "good_pkts_xmitd", 202 KSTAT_DATA_UINT64); 203 kstat_named_init(&igb_ks->gor, "good_octets_recvd", 204 KSTAT_DATA_UINT64); 205 kstat_named_init(&igb_ks->got, "good_octets_xmitd", 206 KSTAT_DATA_UINT64); 207 kstat_named_init(&igb_ks->prc64, "pkts_recvd_( 64b)", 208 KSTAT_DATA_UINT64); 209 kstat_named_init(&igb_ks->prc127, "pkts_recvd_( 65- 127b)", 210 KSTAT_DATA_UINT64); 211 kstat_named_init(&igb_ks->prc255, "pkts_recvd_( 127- 255b)", 212 KSTAT_DATA_UINT64); 213 kstat_named_init(&igb_ks->prc511, "pkts_recvd_( 256- 511b)", 214 KSTAT_DATA_UINT64); 215 kstat_named_init(&igb_ks->prc1023, "pkts_recvd_( 511-1023b)", 216 KSTAT_DATA_UINT64); 217 kstat_named_init(&igb_ks->prc1522, "pkts_recvd_(1024-1522b)", 218 KSTAT_DATA_UINT64); 219 kstat_named_init(&igb_ks->ptc64, "pkts_xmitd_( 64b)", 220 KSTAT_DATA_UINT64); 221 kstat_named_init(&igb_ks->ptc127, "pkts_xmitd_( 65- 127b)", 222 KSTAT_DATA_UINT64); 223 kstat_named_init(&igb_ks->ptc255, "pkts_xmitd_( 128- 255b)", 224 KSTAT_DATA_UINT64); 225 kstat_named_init(&igb_ks->ptc511, "pkts_xmitd_( 255- 511b)", 226 KSTAT_DATA_UINT64); 227 kstat_named_init(&igb_ks->ptc1023, "pkts_xmitd_( 512-1023b)", 228 KSTAT_DATA_UINT64); 229 kstat_named_init(&igb_ks->ptc1522, "pkts_xmitd_(1024-1522b)", 230 KSTAT_DATA_UINT64); 231 #endif 232 233 kstat_named_init(&igb_ks->symerrs, "recv_symbol_errors", 234 KSTAT_DATA_UINT64); 235 kstat_named_init(&igb_ks->mpc, "recv_missed_packets", 236 KSTAT_DATA_UINT64); 237 kstat_named_init(&igb_ks->rlec, "recv_length_errors", 238 KSTAT_DATA_UINT64); 239 kstat_named_init(&igb_ks->fcruc, "recv_unsupport_FC_pkts", 240 KSTAT_DATA_UINT64); 241 kstat_named_init(&igb_ks->rfc, "recv_frag", 242 KSTAT_DATA_UINT64); 243 kstat_named_init(&igb_ks->tncrs, "xmit_with_no_CRS", 244 KSTAT_DATA_UINT64); 245 kstat_named_init(&igb_ks->tsctc, "xmit_TCP_seg_contexts", 246 KSTAT_DATA_UINT64); 247 kstat_named_init(&igb_ks->tsctfc, "xmit_TCP_seg_contexts_fail", 248 KSTAT_DATA_UINT64); 249 kstat_named_init(&igb_ks->xonrxc, "XONs_recvd", 250 KSTAT_DATA_UINT64); 251 kstat_named_init(&igb_ks->xontxc, "XONs_xmitd", 252 KSTAT_DATA_UINT64); 253 kstat_named_init(&igb_ks->xoffrxc, "XOFFs_recvd", 254 KSTAT_DATA_UINT64); 255 kstat_named_init(&igb_ks->xofftxc, "XOFFs_xmitd", 256 KSTAT_DATA_UINT64); 257 258 /* 259 * Function to provide kernel stat update on demand 260 */ 261 ks->ks_update = igb_update_stats; 262 263 ks->ks_private = (void *)igb; 264 265 /* 266 * Add kstat to systems kstat chain 267 */ 268 kstat_install(ks); 269 270 return (IGB_SUCCESS); 271 } 272 273 /* 274 * Retrieve a value for one of the statistics for a particular rx ring 275 */ 276 int 277 igb_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val) 278 { 279 igb_rx_ring_t *rx_ring = (igb_rx_ring_t *)rh; 280 281 switch (stat) { 282 case MAC_STAT_RBYTES: 283 *val = rx_ring->rx_bytes; 284 break; 285 286 case MAC_STAT_IPACKETS: 287 *val = rx_ring->rx_pkts; 288 break; 289 290 default: 291 *val = 0; 292 return (ENOTSUP); 293 } 294 295 return (0); 296 } 297 298 /* 299 * Retrieve a value for one of the statistics for a particular tx ring 300 */ 301 int 302 igb_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val) 303 { 304 igb_tx_ring_t *tx_ring = (igb_tx_ring_t *)rh; 305 306 switch (stat) { 307 case MAC_STAT_OBYTES: 308 *val = tx_ring->tx_bytes; 309 break; 310 311 case MAC_STAT_OPACKETS: 312 *val = tx_ring->tx_pkts; 313 break; 314 315 default: 316 *val = 0; 317 return (ENOTSUP); 318 } 319 320 return (0); 321 } 322