1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2007 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms of the CDDLv1. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 /* 29 * ********************************************************************** 30 * * 31 * Module Name: * 32 * e1000g_rx.c * 33 * * 34 * Abstract: * 35 * This file contains some routines that take care of Receive * 36 * interrupt and also for the received packets it sends up to * 37 * upper layer. * 38 * It tries to do a zero copy if free buffers are available in * 39 * the pool. * 40 * * 41 * ********************************************************************** 42 */ 43 44 #include "e1000g_sw.h" 45 #include "e1000g_debug.h" 46 47 static p_rx_sw_packet_t e1000g_get_buf(e1000g_rx_ring_t *rx_ring); 48 #pragma inline(e1000g_get_buf) 49 static void e1000g_priv_devi_list_clean(); 50 51 /* 52 * e1000g_rxfree_func - the call-back function to reclaim rx buffer 53 * 54 * This function is called when an mp is freed by the user thru 55 * freeb call (Only for mp constructed through desballoc call) 56 * It returns back the freed buffer to the freelist 57 */ 58 void 59 e1000g_rxfree_func(p_rx_sw_packet_t packet) 60 { 61 struct e1000g *Adapter; 62 e1000g_rx_ring_t *rx_ring; 63 64 rx_ring = (e1000g_rx_ring_t *)packet->rx_ring; 65 Adapter = rx_ring->adapter; 66 67 /* 68 * Here the rx recycling processes different rx packets in different 69 * threads, so we protect it with RW_READER to ensure it won't block 70 * other rx recycling threads. 71 */ 72 rw_enter(&e1000g_rx_detach_lock, RW_READER); 73 74 if (packet->flag == E1000G_RX_SW_FREE) { 75 rw_exit(&e1000g_rx_detach_lock); 76 return; 77 } 78 79 if (packet->flag == E1000G_RX_SW_STOP) { 80 packet->flag = E1000G_RX_SW_FREE; 81 rw_exit(&e1000g_rx_detach_lock); 82 83 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 84 rx_ring->pending_count--; 85 e1000g_mblks_pending--; 86 87 if (rx_ring->pending_count == 0) { 88 while (rx_ring->pending_list != NULL) { 89 packet = rx_ring->pending_list; 90 rx_ring->pending_list = 91 rx_ring->pending_list->next; 92 93 ASSERT(packet->mp == NULL); 94 e1000g_free_rx_sw_packet(packet); 95 } 96 } 97 98 /* 99 * If e1000g_force_detach is enabled, we need to clean up 100 * the idle priv_dip entries in the private dip list while 101 * e1000g_mblks_pending is zero. 102 */ 103 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 104 e1000g_priv_devi_list_clean(); 105 rw_exit(&e1000g_rx_detach_lock); 106 return; 107 } 108 109 if (packet->flag == E1000G_RX_SW_DETACH) { 110 packet->flag = E1000G_RX_SW_FREE; 111 rw_exit(&e1000g_rx_detach_lock); 112 113 ASSERT(packet->mp == NULL); 114 e1000g_free_rx_sw_packet(packet); 115 116 /* 117 * Here the e1000g_mblks_pending may be modified by different 118 * rx recycling threads simultaneously, so we need to protect 119 * it with RW_WRITER. 120 */ 121 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 122 e1000g_mblks_pending--; 123 124 /* 125 * If e1000g_force_detach is enabled, we need to clean up 126 * the idle priv_dip entries in the private dip list while 127 * e1000g_mblks_pending is zero. 128 */ 129 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 130 e1000g_priv_devi_list_clean(); 131 rw_exit(&e1000g_rx_detach_lock); 132 return; 133 } 134 135 packet->flag = E1000G_RX_SW_FREE; 136 137 if (packet->mp == NULL) { 138 /* 139 * Allocate a mblk that binds to the data buffer 140 */ 141 packet->mp = desballoc((unsigned char *) 142 packet->rx_buf->address - E1000G_IPALIGNROOM, 143 packet->rx_buf->size + E1000G_IPALIGNROOM, 144 BPRI_MED, &packet->free_rtn); 145 146 if (packet->mp != NULL) { 147 packet->mp->b_rptr += E1000G_IPALIGNROOM; 148 packet->mp->b_wptr += E1000G_IPALIGNROOM; 149 } else { 150 E1000G_STAT(rx_ring->stat_esballoc_fail); 151 } 152 } 153 154 mutex_enter(&rx_ring->freelist_lock); 155 QUEUE_PUSH_TAIL(&rx_ring->free_list, &packet->Link); 156 rx_ring->avail_freepkt++; 157 mutex_exit(&rx_ring->freelist_lock); 158 159 rw_exit(&e1000g_rx_detach_lock); 160 } 161 162 /* 163 * e1000g_priv_devi_list_clean - clean up e1000g_private_devi_list 164 * 165 * We will walk the e1000g_private_devi_list to free the entry marked 166 * with the E1000G_PRIV_DEVI_DETACH flag. 167 */ 168 static void 169 e1000g_priv_devi_list_clean() 170 { 171 private_devi_list_t *devi_node, *devi_del; 172 173 if (e1000g_private_devi_list == NULL) 174 return; 175 176 devi_node = e1000g_private_devi_list; 177 while ((devi_node != NULL) && 178 (devi_node->flag == E1000G_PRIV_DEVI_DETACH)) { 179 e1000g_private_devi_list = devi_node->next; 180 kmem_free(devi_node->priv_dip, 181 sizeof (struct dev_info)); 182 kmem_free(devi_node, 183 sizeof (private_devi_list_t)); 184 devi_node = e1000g_private_devi_list; 185 } 186 if (e1000g_private_devi_list == NULL) 187 return; 188 while (devi_node->next != NULL) { 189 if (devi_node->next->flag == E1000G_PRIV_DEVI_DETACH) { 190 devi_del = devi_node->next; 191 devi_node->next = devi_del->next; 192 kmem_free(devi_del->priv_dip, 193 sizeof (struct dev_info)); 194 kmem_free(devi_del, 195 sizeof (private_devi_list_t)); 196 } else { 197 devi_node = devi_node->next; 198 } 199 } 200 } 201 202 /* 203 * e1000g_rx_setup - setup rx data structures 204 * 205 * This routine initializes all of the receive related 206 * structures. This includes the receive descriptors, the 207 * actual receive buffers, and the rx_sw_packet software 208 * structures. 209 */ 210 void 211 e1000g_rx_setup(struct e1000g *Adapter) 212 { 213 struct e1000_hw *hw; 214 p_rx_sw_packet_t packet; 215 struct e1000_rx_desc *descriptor; 216 uint32_t buf_low; 217 uint32_t buf_high; 218 uint32_t reg_val; 219 int i; 220 int size; 221 e1000g_rx_ring_t *rx_ring; 222 223 hw = &Adapter->shared; 224 rx_ring = Adapter->rx_ring; 225 226 /* 227 * zero out all of the receive buffer descriptor memory 228 * assures any previous data or status is erased 229 */ 230 bzero(rx_ring->rbd_area, 231 sizeof (struct e1000_rx_desc) * Adapter->rx_desc_num); 232 233 if (!Adapter->rx_buffer_setup) { 234 /* Init the list of "Receive Buffer" */ 235 QUEUE_INIT_LIST(&rx_ring->recv_list); 236 237 /* Init the list of "Free Receive Buffer" */ 238 QUEUE_INIT_LIST(&rx_ring->free_list); 239 240 /* 241 * Setup Receive list and the Free list. Note that 242 * the both were allocated in one packet area. 243 */ 244 packet = rx_ring->packet_area; 245 descriptor = rx_ring->rbd_first; 246 247 for (i = 0; i < Adapter->rx_desc_num; 248 i++, packet = packet->next, descriptor++) { 249 ASSERT(packet != NULL); 250 ASSERT(descriptor != NULL); 251 descriptor->buffer_addr = 252 packet->rx_buf->dma_address; 253 254 /* Add this rx_sw_packet to the receive list */ 255 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 256 &packet->Link); 257 } 258 259 for (i = 0; i < Adapter->rx_freelist_num; 260 i++, packet = packet->next) { 261 ASSERT(packet != NULL); 262 /* Add this rx_sw_packet to the free list */ 263 QUEUE_PUSH_TAIL(&rx_ring->free_list, 264 &packet->Link); 265 } 266 rx_ring->avail_freepkt = Adapter->rx_freelist_num; 267 268 Adapter->rx_buffer_setup = B_TRUE; 269 } else { 270 /* Setup the initial pointer to the first rx descriptor */ 271 packet = (p_rx_sw_packet_t) 272 QUEUE_GET_HEAD(&rx_ring->recv_list); 273 descriptor = rx_ring->rbd_first; 274 275 for (i = 0; i < Adapter->rx_desc_num; i++) { 276 ASSERT(packet != NULL); 277 ASSERT(descriptor != NULL); 278 descriptor->buffer_addr = 279 packet->rx_buf->dma_address; 280 281 /* Get next rx_sw_packet */ 282 packet = (p_rx_sw_packet_t) 283 QUEUE_GET_NEXT(&rx_ring->recv_list, &packet->Link); 284 descriptor++; 285 } 286 } 287 288 /* 289 * Setup our descriptor pointers 290 */ 291 rx_ring->rbd_next = rx_ring->rbd_first; 292 293 size = Adapter->rx_desc_num * sizeof (struct e1000_rx_desc); 294 E1000_WRITE_REG(hw, E1000_RDLEN, size); 295 size = E1000_READ_REG(hw, E1000_RDLEN); 296 297 /* To get lower order bits */ 298 buf_low = (uint32_t)rx_ring->rbd_dma_addr; 299 /* To get the higher order bits */ 300 buf_high = (uint32_t)(rx_ring->rbd_dma_addr >> 32); 301 302 E1000_WRITE_REG(hw, E1000_RDBAH, buf_high); 303 E1000_WRITE_REG(hw, E1000_RDBAL, buf_low); 304 305 /* 306 * Setup our HW Rx Head & Tail descriptor pointers 307 */ 308 E1000_WRITE_REG(hw, E1000_RDT, 309 (uint32_t)(rx_ring->rbd_last - rx_ring->rbd_first)); 310 E1000_WRITE_REG(hw, E1000_RDH, 0); 311 312 /* 313 * Setup the Receive Control Register (RCTL), and ENABLE the 314 * receiver. The initial configuration is to: Enable the receiver, 315 * accept broadcasts, discard bad packets (and long packets), 316 * disable VLAN filter checking, set the receive descriptor 317 * minimum threshold size to 1/2, and the receive buffer size to 318 * 2k. 319 */ 320 reg_val = E1000_RCTL_EN | /* Enable Receive Unit */ 321 E1000_RCTL_BAM | /* Accept Broadcast Packets */ 322 E1000_RCTL_LPE | /* Large Packet Enable bit */ 323 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT) | 324 E1000_RCTL_RDMTS_HALF | 325 E1000_RCTL_LBM_NO; /* Loopback Mode = none */ 326 327 if (Adapter->strip_crc) 328 reg_val |= E1000_RCTL_SECRC; /* Strip Ethernet CRC */ 329 330 switch (hw->mac.max_frame_size) { 331 case ETHERMAX: 332 reg_val |= E1000_RCTL_SZ_2048; 333 break; 334 case FRAME_SIZE_UPTO_4K: 335 reg_val |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX; 336 break; 337 case FRAME_SIZE_UPTO_8K: 338 reg_val |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX; 339 break; 340 case FRAME_SIZE_UPTO_9K: 341 case FRAME_SIZE_UPTO_16K: 342 reg_val |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX; 343 break; 344 default: 345 reg_val |= E1000_RCTL_SZ_2048; 346 break; 347 } 348 349 if (e1000_tbi_sbp_enabled_82543(hw)) 350 reg_val |= E1000_RCTL_SBP; 351 352 /* 353 * Enable early receives on supported devices, only takes effect when 354 * packet size is equal or larger than the specified value (in 8 byte 355 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 356 */ 357 if ((hw->mac.type == e1000_82573) || (hw->mac.type == e1000_ich9lan)) 358 E1000_WRITE_REG(hw, E1000_ERT, E1000_ERT_2048); 359 360 E1000_WRITE_REG(hw, E1000_RCTL, reg_val); 361 362 reg_val = 363 E1000_RXCSUM_TUOFL | /* TCP/UDP checksum offload Enable */ 364 E1000_RXCSUM_IPOFL; /* IP checksum offload Enable */ 365 366 E1000_WRITE_REG(hw, E1000_RXCSUM, reg_val); 367 } 368 369 /* 370 * e1000g_get_buf - get an rx sw packet from the free_list 371 */ 372 static p_rx_sw_packet_t 373 e1000g_get_buf(e1000g_rx_ring_t *rx_ring) 374 { 375 struct e1000g *Adapter; 376 p_rx_sw_packet_t packet; 377 378 Adapter = rx_ring->adapter; 379 380 mutex_enter(&rx_ring->freelist_lock); 381 packet = (p_rx_sw_packet_t) 382 QUEUE_POP_HEAD(&rx_ring->free_list); 383 if (packet != NULL) 384 rx_ring->avail_freepkt--; 385 mutex_exit(&rx_ring->freelist_lock); 386 387 return (packet); 388 } 389 390 /* 391 * e1000g_receive - main receive routine 392 * 393 * This routine will process packets received in an interrupt 394 */ 395 mblk_t * 396 e1000g_receive(struct e1000g *Adapter) 397 { 398 struct e1000_hw *hw; 399 mblk_t *nmp; 400 mblk_t *ret_mp; 401 mblk_t *ret_nmp; 402 struct e1000_rx_desc *current_desc; 403 struct e1000_rx_desc *last_desc; 404 p_rx_sw_packet_t packet; 405 p_rx_sw_packet_t newpkt; 406 USHORT length; 407 uint32_t pkt_count; 408 uint32_t desc_count; 409 boolean_t accept_frame; 410 boolean_t end_of_packet; 411 boolean_t need_copy; 412 e1000g_rx_ring_t *rx_ring; 413 dma_buffer_t *rx_buf; 414 uint16_t cksumflags; 415 416 ret_mp = NULL; 417 ret_nmp = NULL; 418 pkt_count = 0; 419 desc_count = 0; 420 cksumflags = 0; 421 422 hw = &Adapter->shared; 423 rx_ring = Adapter->rx_ring; 424 425 /* Sync the Rx descriptor DMA buffers */ 426 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 427 0, 0, DDI_DMA_SYNC_FORKERNEL); 428 429 if (e1000g_check_dma_handle(rx_ring->rbd_dma_handle) != DDI_FM_OK) { 430 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 431 Adapter->chip_state = E1000G_ERROR; 432 } 433 434 current_desc = rx_ring->rbd_next; 435 if (!(current_desc->status & E1000_RXD_STAT_DD)) { 436 /* 437 * don't send anything up. just clear the RFD 438 */ 439 E1000G_DEBUG_STAT(rx_ring->stat_none); 440 return (ret_mp); 441 } 442 443 /* 444 * Loop through the receive descriptors starting at the last known 445 * descriptor owned by the hardware that begins a packet. 446 */ 447 while ((current_desc->status & E1000_RXD_STAT_DD) && 448 (pkt_count < Adapter->rx_limit_onintr)) { 449 450 desc_count++; 451 /* 452 * Now this can happen in Jumbo frame situation. 453 */ 454 if (current_desc->status & E1000_RXD_STAT_EOP) { 455 /* packet has EOP set */ 456 end_of_packet = B_TRUE; 457 } else { 458 /* 459 * If this received buffer does not have the 460 * End-Of-Packet bit set, the received packet 461 * will consume multiple buffers. We won't send this 462 * packet upstack till we get all the related buffers. 463 */ 464 end_of_packet = B_FALSE; 465 } 466 467 /* 468 * Get a pointer to the actual receive buffer 469 * The mp->b_rptr is mapped to The CurrentDescriptor 470 * Buffer Address. 471 */ 472 packet = 473 (p_rx_sw_packet_t)QUEUE_GET_HEAD(&rx_ring->recv_list); 474 ASSERT(packet != NULL); 475 476 rx_buf = packet->rx_buf; 477 478 length = current_desc->length; 479 480 #ifdef __sparc 481 if (packet->dma_type == USE_DVMA) 482 dvma_sync(rx_buf->dma_handle, 0, 483 DDI_DMA_SYNC_FORKERNEL); 484 else 485 (void) ddi_dma_sync(rx_buf->dma_handle, 486 E1000G_IPALIGNROOM, length, 487 DDI_DMA_SYNC_FORKERNEL); 488 #else 489 (void) ddi_dma_sync(rx_buf->dma_handle, 490 E1000G_IPALIGNROOM, length, 491 DDI_DMA_SYNC_FORKERNEL); 492 #endif 493 494 if (e1000g_check_dma_handle( 495 rx_buf->dma_handle) != DDI_FM_OK) { 496 ddi_fm_service_impact(Adapter->dip, 497 DDI_SERVICE_DEGRADED); 498 Adapter->chip_state = E1000G_ERROR; 499 } 500 501 accept_frame = (current_desc->errors == 0) || 502 ((current_desc->errors & 503 (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) != 0); 504 505 if (hw->mac.type == e1000_82543) { 506 unsigned char last_byte; 507 508 last_byte = 509 *((unsigned char *)rx_buf->address + length - 1); 510 511 if (TBI_ACCEPT(hw, 512 current_desc->status, current_desc->errors, 513 current_desc->length, last_byte)) { 514 515 e1000_tbi_adjust_stats(Adapter, 516 length, hw->mac.addr); 517 518 length--; 519 accept_frame = B_TRUE; 520 } else if (e1000_tbi_sbp_enabled_82543(hw) && 521 (current_desc->errors == E1000_RXD_ERR_CE)) { 522 accept_frame = B_TRUE; 523 } 524 } 525 526 /* 527 * Indicate the packet to the NOS if it was good. 528 * Normally, hardware will discard bad packets for us. 529 * Check for the packet to be a valid Ethernet packet 530 */ 531 if (!accept_frame) { 532 /* 533 * error in incoming packet, either the packet is not a 534 * ethernet size packet, or the packet has an error. In 535 * either case, the packet will simply be discarded. 536 */ 537 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 538 "Process Receive Interrupts: Error in Packet\n"); 539 540 E1000G_STAT(rx_ring->stat_error); 541 /* 542 * Returning here as we are done here. There is 543 * no point in waiting for while loop to elapse 544 * and the things which were done. More efficient 545 * and less error prone... 546 */ 547 goto rx_drop; 548 } 549 550 /* 551 * If the Ethernet CRC is not stripped by the hardware, 552 * we need to strip it before sending it up to the stack. 553 */ 554 if (end_of_packet && !Adapter->strip_crc) { 555 if (length > CRC_LENGTH) { 556 length -= CRC_LENGTH; 557 } else { 558 /* 559 * If the fragment is smaller than the CRC, 560 * drop this fragment, do the processing of 561 * the end of the packet. 562 */ 563 ASSERT(rx_ring->rx_mblk_tail != NULL); 564 rx_ring->rx_mblk_tail->b_wptr -= 565 CRC_LENGTH - length; 566 rx_ring->rx_mblk_len -= 567 CRC_LENGTH - length; 568 569 QUEUE_POP_HEAD(&rx_ring->recv_list); 570 571 goto rx_end_of_packet; 572 } 573 } 574 575 need_copy = B_TRUE; 576 577 if (length <= Adapter->rx_bcopy_thresh) 578 goto rx_copy; 579 580 /* 581 * Get the pre-constructed mblk that was associated 582 * to the receive data buffer. 583 */ 584 if (packet->mp == NULL) { 585 packet->mp = desballoc((unsigned char *) 586 rx_buf->address - E1000G_IPALIGNROOM, 587 length + E1000G_IPALIGNROOM, 588 BPRI_MED, &packet->free_rtn); 589 590 if (packet->mp != NULL) { 591 packet->mp->b_rptr += E1000G_IPALIGNROOM; 592 packet->mp->b_wptr += E1000G_IPALIGNROOM; 593 } else { 594 E1000G_STAT(rx_ring->stat_esballoc_fail); 595 } 596 } 597 598 if (packet->mp != NULL) { 599 /* 600 * We have two sets of buffer pool. One associated with 601 * the Rxdescriptors and other a freelist buffer pool. 602 * Each time we get a good packet, Try to get a buffer 603 * from the freelist pool using e1000g_get_buf. If we 604 * get free buffer, then replace the descriptor buffer 605 * address with the free buffer we just got, and pass 606 * the pre-constructed mblk upstack. (note no copying) 607 * 608 * If we failed to get a free buffer, then try to 609 * allocate a new buffer(mp) and copy the recv buffer 610 * content to our newly allocated buffer(mp). Don't 611 * disturb the desriptor buffer address. (note copying) 612 */ 613 newpkt = e1000g_get_buf(rx_ring); 614 615 if (newpkt != NULL) { 616 /* 617 * Get the mblk associated to the data, 618 * and strip it off the sw packet. 619 */ 620 nmp = packet->mp; 621 packet->mp = NULL; 622 packet->flag = E1000G_RX_SW_SENDUP; 623 624 /* 625 * Now replace old buffer with the new 626 * one we got from free list 627 * Both the RxSwPacket as well as the 628 * Receive Buffer Descriptor will now 629 * point to this new packet. 630 */ 631 packet = newpkt; 632 633 current_desc->buffer_addr = 634 newpkt->rx_buf->dma_address; 635 636 need_copy = B_FALSE; 637 } else { 638 E1000G_DEBUG_STAT(rx_ring->stat_no_freepkt); 639 } 640 } 641 642 rx_copy: 643 if (need_copy) { 644 /* 645 * No buffers available on free list, 646 * bcopy the data from the buffer and 647 * keep the original buffer. Dont want to 648 * do this.. Yack but no other way 649 */ 650 if ((nmp = allocb(length + E1000G_IPALIGNROOM, 651 BPRI_MED)) == NULL) { 652 /* 653 * The system has no buffers available 654 * to send up the incoming packet, hence 655 * the packet will have to be processed 656 * when there're more buffers available. 657 */ 658 E1000G_STAT(rx_ring->stat_allocb_fail); 659 goto rx_drop; 660 } 661 nmp->b_rptr += E1000G_IPALIGNROOM; 662 nmp->b_wptr += E1000G_IPALIGNROOM; 663 /* 664 * The free list did not have any buffers 665 * available, so, the received packet will 666 * have to be copied into a mp and the original 667 * buffer will have to be retained for future 668 * packet reception. 669 */ 670 bcopy(rx_buf->address, nmp->b_wptr, length); 671 } 672 673 /* 674 * The rx_sw_packet MUST be popped off the 675 * RxSwPacketList before either a putnext or freemsg 676 * is done on the mp that has now been created by the 677 * desballoc. If not, it is possible that the free 678 * routine will get called from the interrupt context 679 * and try to put this packet on the free list 680 */ 681 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 682 683 ASSERT(nmp != NULL); 684 nmp->b_wptr += length; 685 686 if (rx_ring->rx_mblk == NULL) { 687 /* 688 * TCP/UDP checksum offload and 689 * IP checksum offload 690 */ 691 if (!(current_desc->status & E1000_RXD_STAT_IXSM)) { 692 /* 693 * Check TCP/UDP checksum 694 */ 695 if ((current_desc->status & 696 E1000_RXD_STAT_TCPCS) && 697 !(current_desc->errors & 698 E1000_RXD_ERR_TCPE)) 699 cksumflags |= HCK_FULLCKSUM | 700 HCK_FULLCKSUM_OK; 701 /* 702 * Check IP Checksum 703 */ 704 if ((current_desc->status & 705 E1000_RXD_STAT_IPCS) && 706 !(current_desc->errors & 707 E1000_RXD_ERR_IPE)) 708 cksumflags |= HCK_IPV4_HDRCKSUM; 709 } 710 } 711 712 /* 713 * We need to maintain our packet chain in the global 714 * Adapter structure, for the Rx processing can end 715 * with a fragment that has no EOP set. 716 */ 717 if (rx_ring->rx_mblk == NULL) { 718 /* Get the head of the message chain */ 719 rx_ring->rx_mblk = nmp; 720 rx_ring->rx_mblk_tail = nmp; 721 rx_ring->rx_mblk_len = length; 722 } else { /* Not the first packet */ 723 /* Continue adding buffers */ 724 rx_ring->rx_mblk_tail->b_cont = nmp; 725 rx_ring->rx_mblk_tail = nmp; 726 rx_ring->rx_mblk_len += length; 727 } 728 ASSERT(rx_ring->rx_mblk != NULL); 729 ASSERT(rx_ring->rx_mblk_tail != NULL); 730 ASSERT(rx_ring->rx_mblk_tail->b_cont == NULL); 731 732 /* 733 * Now this MP is ready to travel upwards but some more 734 * fragments are coming. 735 * We will send packet upwards as soon as we get EOP 736 * set on the packet. 737 */ 738 if (!end_of_packet) { 739 /* 740 * continue to get the next descriptor, 741 * Tail would be advanced at the end 742 */ 743 goto rx_next_desc; 744 } 745 746 rx_end_of_packet: 747 /* 748 * Found packet with EOP 749 * Process the last fragment. 750 */ 751 if (cksumflags != 0) { 752 (void) hcksum_assoc(rx_ring->rx_mblk, 753 NULL, NULL, 0, 0, 0, 0, cksumflags, 0); 754 cksumflags = 0; 755 } 756 757 /* 758 * Count packets that span multi-descriptors 759 */ 760 E1000G_DEBUG_STAT_COND(rx_ring->stat_multi_desc, 761 (rx_ring->rx_mblk->b_cont != NULL)); 762 763 /* 764 * Append to list to send upstream 765 */ 766 if (ret_mp == NULL) { 767 ret_mp = ret_nmp = rx_ring->rx_mblk; 768 } else { 769 ret_nmp->b_next = rx_ring->rx_mblk; 770 ret_nmp = rx_ring->rx_mblk; 771 } 772 ret_nmp->b_next = NULL; 773 774 rx_ring->rx_mblk = NULL; 775 rx_ring->rx_mblk_tail = NULL; 776 rx_ring->rx_mblk_len = 0; 777 778 pkt_count++; 779 780 rx_next_desc: 781 /* 782 * Zero out the receive descriptors status 783 */ 784 current_desc->status = 0; 785 786 if (current_desc == rx_ring->rbd_last) 787 rx_ring->rbd_next = rx_ring->rbd_first; 788 else 789 rx_ring->rbd_next++; 790 791 last_desc = current_desc; 792 current_desc = rx_ring->rbd_next; 793 794 /* 795 * Put the buffer that we just indicated back 796 * at the end of our list 797 */ 798 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 799 &packet->Link); 800 } /* while loop */ 801 802 if (pkt_count >= Adapter->rx_limit_onintr) 803 E1000G_STAT(rx_ring->stat_exceed_pkt); 804 805 /* Sync the Rx descriptor DMA buffers */ 806 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 807 0, 0, DDI_DMA_SYNC_FORDEV); 808 809 /* 810 * Advance the E1000's Receive Queue #0 "Tail Pointer". 811 */ 812 E1000_WRITE_REG(hw, E1000_RDT, 813 (uint32_t)(last_desc - rx_ring->rbd_first)); 814 815 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 816 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 817 Adapter->chip_state = E1000G_ERROR; 818 } 819 820 return (ret_mp); 821 822 rx_drop: 823 /* 824 * Zero out the receive descriptors status 825 */ 826 current_desc->status = 0; 827 828 /* Sync the Rx descriptor DMA buffers */ 829 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 830 0, 0, DDI_DMA_SYNC_FORDEV); 831 832 if (current_desc == rx_ring->rbd_last) 833 rx_ring->rbd_next = rx_ring->rbd_first; 834 else 835 rx_ring->rbd_next++; 836 837 last_desc = current_desc; 838 839 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 840 841 QUEUE_PUSH_TAIL(&rx_ring->recv_list, &packet->Link); 842 /* 843 * Reclaim all old buffers already allocated during 844 * Jumbo receives.....for incomplete reception 845 */ 846 if (rx_ring->rx_mblk != NULL) { 847 freemsg(rx_ring->rx_mblk); 848 rx_ring->rx_mblk = NULL; 849 rx_ring->rx_mblk_tail = NULL; 850 rx_ring->rx_mblk_len = 0; 851 } 852 /* 853 * Advance the E1000's Receive Queue #0 "Tail Pointer". 854 */ 855 E1000_WRITE_REG(hw, E1000_RDT, 856 (uint32_t)(last_desc - rx_ring->rbd_first)); 857 858 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 859 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 860 Adapter->chip_state = E1000G_ERROR; 861 } 862 863 return (ret_mp); 864 } 865