1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * This file is part of the Chelsio T4 Ethernet driver. 14 * 15 * Copyright (C) 2005-2013 Chelsio Communications. All rights reserved. 16 * 17 * This program is distributed in the hope that it will be useful, but WITHOUT 18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 19 * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this 20 * release for licensing terms and conditions. 21 */ 22 23 #ifndef __CXGBE_COMMON_H 24 #define __CXGBE_COMMON_H 25 26 #include "shared.h" 27 #include "t4_hw.h" 28 29 #define GLBL_INTR_MASK (F_CIM | F_MPS | F_PL | F_PCIE | F_MC | F_EDC0 | \ 30 F_EDC1 | F_LE | F_TP | F_MA | F_PM_TX | F_PM_RX | F_ULP_RX | \ 31 F_CPL_SWITCH | F_SGE | F_ULP_TX) 32 33 enum { 34 MAX_NPORTS = 4, /* max # of ports */ 35 SERNUM_LEN = 24, /* Serial # length */ 36 EC_LEN = 16, /* E/C length */ 37 ID_LEN = 16, /* ID length */ 38 PN_LEN = 16, /* Part Number length */ 39 MACADDR_LEN = 12, /* MAC Address length */ 40 }; 41 42 enum { MEM_EDC0, MEM_EDC1, MEM_MC }; 43 44 enum { 45 MEMWIN0_APERTURE = 2048, 46 MEMWIN0_BASE = 0x1b800, 47 MEMWIN1_APERTURE = 32768, 48 MEMWIN1_BASE = 0x28000, 49 MEMWIN2_APERTURE = 65536, 50 MEMWIN2_BASE = 0x30000, 51 }; 52 53 enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST }; 54 55 enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR }; 56 57 enum { 58 PAUSE_RX = 1 << 0, 59 PAUSE_TX = 1 << 1, 60 PAUSE_AUTONEG = 1 << 2 61 }; 62 63 struct port_stats { 64 u64 tx_octets; /* total # of octets in good frames */ 65 u64 tx_frames; /* all good frames */ 66 u64 tx_bcast_frames; /* all broadcast frames */ 67 u64 tx_mcast_frames; /* all multicast frames */ 68 u64 tx_ucast_frames; /* all unicast frames */ 69 u64 tx_error_frames; /* all error frames */ 70 71 u64 tx_frames_64; /* # of Tx frames in a particular range */ 72 u64 tx_frames_65_127; 73 u64 tx_frames_128_255; 74 u64 tx_frames_256_511; 75 u64 tx_frames_512_1023; 76 u64 tx_frames_1024_1518; 77 u64 tx_frames_1519_max; 78 79 u64 tx_drop; /* # of dropped Tx frames */ 80 u64 tx_pause; /* # of transmitted pause frames */ 81 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */ 82 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */ 83 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */ 84 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */ 85 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */ 86 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */ 87 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */ 88 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */ 89 90 u64 rx_octets; /* total # of octets in good frames */ 91 u64 rx_frames; /* all good frames */ 92 u64 rx_bcast_frames; /* all broadcast frames */ 93 u64 rx_mcast_frames; /* all multicast frames */ 94 u64 rx_ucast_frames; /* all unicast frames */ 95 u64 rx_too_long; /* # of frames exceeding MTU */ 96 u64 rx_jabber; /* # of jabber frames */ 97 u64 rx_fcs_err; /* # of received frames with bad FCS */ 98 u64 rx_len_err; /* # of received frames with length error */ 99 u64 rx_symbol_err; /* symbol errors */ 100 u64 rx_runt; /* # of short frames */ 101 102 u64 rx_frames_64; /* # of Rx frames in a particular range */ 103 u64 rx_frames_65_127; 104 u64 rx_frames_128_255; 105 u64 rx_frames_256_511; 106 u64 rx_frames_512_1023; 107 u64 rx_frames_1024_1518; 108 u64 rx_frames_1519_max; 109 110 u64 rx_pause; /* # of received pause frames */ 111 u64 rx_ppp0; /* # of received PPP prio 0 frames */ 112 u64 rx_ppp1; /* # of received PPP prio 1 frames */ 113 u64 rx_ppp2; /* # of received PPP prio 2 frames */ 114 u64 rx_ppp3; /* # of received PPP prio 3 frames */ 115 u64 rx_ppp4; /* # of received PPP prio 4 frames */ 116 u64 rx_ppp5; /* # of received PPP prio 5 frames */ 117 u64 rx_ppp6; /* # of received PPP prio 6 frames */ 118 u64 rx_ppp7; /* # of received PPP prio 7 frames */ 119 120 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */ 121 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */ 122 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */ 123 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */ 124 u64 rx_trunc0; /* buffer-group 0 truncated packets */ 125 u64 rx_trunc1; /* buffer-group 1 truncated packets */ 126 u64 rx_trunc2; /* buffer-group 2 truncated packets */ 127 u64 rx_trunc3; /* buffer-group 3 truncated packets */ 128 }; 129 130 struct lb_port_stats { 131 u64 octets; 132 u64 frames; 133 u64 bcast_frames; 134 u64 mcast_frames; 135 u64 ucast_frames; 136 u64 error_frames; 137 138 u64 frames_64; 139 u64 frames_65_127; 140 u64 frames_128_255; 141 u64 frames_256_511; 142 u64 frames_512_1023; 143 u64 frames_1024_1518; 144 u64 frames_1519_max; 145 146 u64 drop; 147 148 u64 ovflow0; 149 u64 ovflow1; 150 u64 ovflow2; 151 u64 ovflow3; 152 u64 trunc0; 153 u64 trunc1; 154 u64 trunc2; 155 u64 trunc3; 156 }; 157 158 struct tp_tcp_stats { 159 u32 tcpOutRsts; 160 u64 tcpInSegs; 161 u64 tcpOutSegs; 162 u64 tcpRetransSegs; 163 }; 164 165 struct tp_usm_stats { 166 u32 frames; 167 u32 drops; 168 u64 octets; 169 }; 170 171 struct tp_fcoe_stats { 172 u32 framesDDP; 173 u32 framesDrop; 174 u64 octetsDDP; 175 }; 176 177 struct tp_err_stats { 178 u32 macInErrs[4]; 179 u32 hdrInErrs[4]; 180 u32 tcpInErrs[4]; 181 u32 tnlCongDrops[4]; 182 u32 ofldChanDrops[4]; 183 u32 tnlTxDrops[4]; 184 u32 ofldVlanDrops[4]; 185 u32 tcp6InErrs[4]; 186 u32 ofldNoNeigh; 187 u32 ofldCongDefer; 188 }; 189 190 struct tp_proxy_stats { 191 u32 proxy[4]; 192 }; 193 194 struct tp_cpl_stats { 195 u32 req[4]; 196 u32 rsp[4]; 197 u32 tx_err[4]; 198 }; 199 200 struct tp_rdma_stats { 201 u32 rqe_dfr_mod; 202 u32 rqe_dfr_pkt; 203 }; 204 205 struct tp_params { 206 unsigned int ntxchan; /* # of Tx channels */ 207 unsigned int tre; /* log2 of core clocks per TP tick */ 208 unsigned int dack_re; /* DACK timer resolution */ 209 unsigned int la_mask; /* what events are recorded by TP LA */ 210 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */ 211 }; 212 213 struct vpd_params { 214 unsigned int cclk; 215 u8 ec[EC_LEN + 1]; 216 u8 sn[SERNUM_LEN + 1]; 217 u8 id[ID_LEN + 1]; 218 u8 pn[PN_LEN + 1]; 219 u8 na[MACADDR_LEN + 1]; 220 }; 221 222 struct pci_params { 223 unsigned int vpd_cap_addr; 224 unsigned char speed; 225 unsigned char width; 226 }; 227 228 /* 229 * Firmware device log. 230 */ 231 struct devlog_params { 232 u32 memtype; /* which memory (EDC0, EDC1, MC) */ 233 u32 start; /* start of log in firmware memory */ 234 u32 size; /* size of log */ 235 }; 236 237 struct adapter_params { 238 struct tp_params tp; 239 struct vpd_params vpd; 240 struct pci_params pci; 241 struct devlog_params devlog; 242 243 unsigned int sf_size; /* serial flash size in bytes */ 244 unsigned int sf_nsec; /* # of flash sectors */ 245 246 unsigned int fw_vers; 247 unsigned int tp_vers; 248 u8 api_vers[7]; 249 250 unsigned short mtus[NMTUS]; 251 unsigned short a_wnd[NCCTRL_WIN]; 252 unsigned short b_wnd[NCCTRL_WIN]; 253 254 unsigned int mc_size; /* MC memory size */ 255 unsigned int nfilters; /* size of filter region */ 256 257 unsigned int cim_la_size; 258 259 unsigned int nports; /* # of ethernet ports */ 260 unsigned int portvec; 261 unsigned int rev; /* chip revision */ 262 unsigned int offload; 263 264 unsigned char bypass; 265 266 unsigned int ofldq_wr_cred; 267 }; 268 269 enum { /* chip revisions */ 270 T4_REV_A = 0, 271 }; 272 273 struct trace_params { 274 u32 data[TRACE_LEN / 4]; 275 u32 mask[TRACE_LEN / 4]; 276 unsigned short snap_len; 277 unsigned short min_len; 278 unsigned char skip_ofst; 279 unsigned char skip_len; 280 unsigned char invert; 281 unsigned char port; 282 }; 283 284 struct link_config { 285 unsigned short supported; /* link capabilities */ 286 unsigned short advertising; /* advertised capabilities */ 287 unsigned short requested_speed; /* speed user has requested */ 288 unsigned short speed; /* actual link speed */ 289 unsigned char requested_fc; /* flow control user has requested */ 290 unsigned char fc; /* actual link flow control */ 291 unsigned char autoneg; /* autonegotiating? */ 292 unsigned char link_ok; /* link up? */ 293 }; 294 295 #include "adapter.h" 296 297 #ifndef PCI_VENDOR_ID_CHELSIO 298 #define PCI_VENDOR_ID_CHELSIO 0x1425 299 #endif 300 301 #define for_each_port(adapter, iter) \ 302 for (iter = 0; iter < (adapter)->params.nports; ++iter) 303 304 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, 305 u32 val); 306 307 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, 308 void *rpl, bool sleep_ok); 309 310 int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, 311 int size, void *rpl); 312 313 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, 314 unsigned int data_reg, u32 *vals, unsigned int nregs, 315 unsigned int start_idx); 316 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, 317 unsigned int data_reg, const u32 *vals, 318 unsigned int nregs, unsigned int start_idx); 319 320 struct fw_filter_wr; 321 322 void t4_intr_enable(struct adapter *adapter); 323 void t4_intr_disable(struct adapter *adapter); 324 void t4_intr_clear(struct adapter *adapter); 325 int t4_slow_intr_handler(struct adapter *adapter); 326 327 int t4_hash_mac_addr(const u8 *addr); 328 int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port, 329 struct link_config *lc); 330 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); 331 int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data); 332 int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data); 333 int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz); 334 int t4_seeprom_wp(struct adapter *adapter, int enable); 335 int t4_read_flash(struct adapter *adapter, unsigned int addr, 336 unsigned int nwords, u32 *data, int byte_oriented); 337 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); 338 unsigned int t4_flash_cfg_addr(struct adapter *adapter); 339 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 340 int t4_get_fw_version(struct adapter *adapter, u32 *vers); 341 int t4_get_tp_version(struct adapter *adapter, u32 *vers); 342 int t4_check_fw_version(struct adapter *adapter); 343 int t4_init_hw(struct adapter *adapter, u32 fw_params); 344 int t4_prep_adapter(struct adapter *adapter); 345 int t4_port_init(struct port_info *p, int mbox, int pf, int vf); 346 int t4_reinit_adapter(struct adapter *adap); 347 void t4_fatal_err(struct adapter *adapter); 348 int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, 349 int filter_index, int enable); 350 void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, 351 int filter_index, int *enabled); 352 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, 353 int start, int n, const u16 *rspq, unsigned int nrspq); 354 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, 355 unsigned int flags); 356 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, 357 unsigned int flags, unsigned int defq); 358 int t4_read_rss(struct adapter *adapter, u16 *entries); 359 void t4_read_rss_key(struct adapter *adapter, u32 *key); 360 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx); 361 void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, 362 u32 *valp); 363 void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, 364 u32 val); 365 void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, 366 u32 *vfl, u32 *vfh); 367 void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index, 368 u32 vfl, u32 vfh); 369 u32 t4_read_rss_pf_map(struct adapter *adapter); 370 void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap); 371 u32 t4_read_rss_pf_mask(struct adapter *adapter); 372 void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask); 373 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask); 374 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 375 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 376 void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); 377 int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, 378 size_t n); 379 int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, 380 size_t n); 381 int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, 382 unsigned int *valp); 383 int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, 384 const unsigned int *valp); 385 int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n, 386 unsigned int *valp); 387 int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); 388 void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, 389 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); 390 void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); 391 int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity); 392 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, 393 u64 *parity); 394 int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size, 395 __be32 *data); 396 int t4_mem_win_read(struct adapter *adap, u32 addr, __be32 *data); 397 398 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); 399 void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); 400 void t4_clr_port_stats(struct adapter *adap, int idx); 401 402 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); 403 void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); 404 void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]); 405 void t4_get_tx_sched(struct adapter *adap, unsigned int sched, 406 unsigned int *kbps, unsigned int *ipg); 407 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, 408 unsigned int mask, unsigned int val); 409 void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); 410 void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st); 411 void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st); 412 void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st); 413 void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st); 414 void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st); 415 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, 416 struct tp_tcp_stats *v6); 417 void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, 418 struct tp_fcoe_stats *st); 419 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, 420 const unsigned short *alpha, const unsigned short *beta); 421 422 void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); 423 424 int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps); 425 int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg); 426 int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals, 427 unsigned int start, unsigned int n); 428 void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); 429 int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map); 430 void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); 431 432 void t4_wol_magic_enable(struct adapter *adap, unsigned int port, 433 const u8 *addr); 434 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, 435 u64 mask0, u64 mask1, unsigned int crc, bool enable); 436 437 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, 438 enum dev_master master, enum dev_state *state); 439 int t4_fw_initialize(struct adapter *adap, unsigned int mbox); 440 int t4_fw_bye(struct adapter *adap, unsigned int mbox); 441 int t4_early_init(struct adapter *adap, unsigned int mbox); 442 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); 443 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 444 unsigned int vf, unsigned int nparams, const u32 *params, u32 *val); 445 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 446 unsigned int vf, unsigned int nparams, const u32 *params, 447 const u32 *val); 448 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, 449 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, 450 unsigned int rxqi, unsigned int rxq, unsigned int tc, unsigned int vi, 451 unsigned int cmask, unsigned int pmask, unsigned int exactf, 452 unsigned int rcaps, unsigned int wxcaps); 453 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, 454 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, 455 unsigned int *rss_size); 456 int t4_free_vi(struct adapter *adap, unsigned int mbox, 457 unsigned int pf, unsigned int vf, unsigned int viid); 458 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, 459 int mtu, int promisc, int all_multi, int bcast, int vlanex, 460 bool sleep_ok); 461 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, 462 unsigned int viid, bool free, unsigned int naddr, const u8 **addr, 463 u16 *idx, u64 *hash, bool sleep_ok); 464 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, 465 int idx, const u8 *addr, bool persist, bool add_smt); 466 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, 467 bool ucast, u64 vec, bool sleep_ok); 468 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, 469 bool rx_en, bool tx_en); 470 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, 471 unsigned int nblinks); 472 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 473 unsigned int mmd, unsigned int reg, unsigned int *valp); 474 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 475 unsigned int mmd, unsigned int reg, unsigned int val); 476 int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start, 477 unsigned int pf, unsigned int vf, unsigned int iqid, unsigned int fl0id, 478 unsigned int fl1id); 479 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 480 unsigned int vf, unsigned int iqtype, unsigned int iqid, 481 unsigned int fl0id, unsigned int fl1id); 482 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 483 unsigned int vf, unsigned int eqid); 484 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 485 unsigned int vf, unsigned int eqid); 486 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 487 unsigned int vf, unsigned int eqid); 488 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid, 489 enum ctxt_type ctype, u32 *data); 490 int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, 491 enum ctxt_type ctype, u32 *data); 492 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); 493 494 /* common.c */ 495 int is_offload(const struct adapter *adap); 496 unsigned int core_ticks_per_usec(const struct adapter *adap); 497 int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, int size, 498 void *rpl); 499 int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, int size, 500 void *rpl); 501 unsigned int us_to_core_ticks(const struct adapter *adap, unsigned int us); 502 unsigned int core_ticks_to_us(const struct adapter *adapter, 503 unsigned int ticks); 504 unsigned int dack_ticks_to_usec(const struct adapter *adap, unsigned int ticks); 505 int is_bypass(const adapter_t *adap); 506 int is_bypass_device(int device); 507 int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask, int polarity, 508 int attempts, int delay); 509 int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, 510 int polarity, int attempts, int delay, u32 *valp); 511 512 #endif /* __CXGBE_COMMON_H */ 513