xref: /titanic_52/usr/src/uts/common/io/cxgbe/common/common.h (revision 56b2bdd1f04d465cfe4a95b88ae5cba5884154e4)
1*56b2bdd1SGireesh Nagabhushana /*
2*56b2bdd1SGireesh Nagabhushana  * This file and its contents are supplied under the terms of the
3*56b2bdd1SGireesh Nagabhushana  * Common Development and Distribution License ("CDDL"), version 1.0.
4*56b2bdd1SGireesh Nagabhushana  * You may only use this file in accordance with the terms of version
5*56b2bdd1SGireesh Nagabhushana  * 1.0 of the CDDL.
6*56b2bdd1SGireesh Nagabhushana  *
7*56b2bdd1SGireesh Nagabhushana  * A full copy of the text of the CDDL should have accompanied this
8*56b2bdd1SGireesh Nagabhushana  * source. A copy of the CDDL is also available via the Internet at
9*56b2bdd1SGireesh Nagabhushana  * http://www.illumos.org/license/CDDL.
10*56b2bdd1SGireesh Nagabhushana  */
11*56b2bdd1SGireesh Nagabhushana 
12*56b2bdd1SGireesh Nagabhushana /*
13*56b2bdd1SGireesh Nagabhushana  * This file is part of the Chelsio T4 Ethernet driver.
14*56b2bdd1SGireesh Nagabhushana  *
15*56b2bdd1SGireesh Nagabhushana  * Copyright (C) 2005-2013 Chelsio Communications.  All rights reserved.
16*56b2bdd1SGireesh Nagabhushana  *
17*56b2bdd1SGireesh Nagabhushana  * This program is distributed in the hope that it will be useful, but WITHOUT
18*56b2bdd1SGireesh Nagabhushana  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19*56b2bdd1SGireesh Nagabhushana  * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
20*56b2bdd1SGireesh Nagabhushana  * release for licensing terms and conditions.
21*56b2bdd1SGireesh Nagabhushana  */
22*56b2bdd1SGireesh Nagabhushana 
23*56b2bdd1SGireesh Nagabhushana #ifndef __CXGBE_COMMON_H
24*56b2bdd1SGireesh Nagabhushana #define	__CXGBE_COMMON_H
25*56b2bdd1SGireesh Nagabhushana 
26*56b2bdd1SGireesh Nagabhushana #include "shared.h"
27*56b2bdd1SGireesh Nagabhushana #include "t4_hw.h"
28*56b2bdd1SGireesh Nagabhushana 
29*56b2bdd1SGireesh Nagabhushana #define	GLBL_INTR_MASK (F_CIM | F_MPS | F_PL | F_PCIE | F_MC | F_EDC0 | \
30*56b2bdd1SGireesh Nagabhushana 		F_EDC1 | F_LE | F_TP | F_MA | F_PM_TX | F_PM_RX | F_ULP_RX | \
31*56b2bdd1SGireesh Nagabhushana 		F_CPL_SWITCH | F_SGE | F_ULP_TX)
32*56b2bdd1SGireesh Nagabhushana 
33*56b2bdd1SGireesh Nagabhushana enum {
34*56b2bdd1SGireesh Nagabhushana 	MAX_NPORTS	= 4,	/* max # of ports */
35*56b2bdd1SGireesh Nagabhushana 	SERNUM_LEN	= 24,	/* Serial # length */
36*56b2bdd1SGireesh Nagabhushana 	EC_LEN		= 16,	/* E/C length */
37*56b2bdd1SGireesh Nagabhushana 	ID_LEN		= 16,	/* ID length */
38*56b2bdd1SGireesh Nagabhushana 	PN_LEN		= 16,	/* Part Number length */
39*56b2bdd1SGireesh Nagabhushana 	MACADDR_LEN	= 12,	/* MAC Address length */
40*56b2bdd1SGireesh Nagabhushana };
41*56b2bdd1SGireesh Nagabhushana 
42*56b2bdd1SGireesh Nagabhushana enum { MEM_EDC0, MEM_EDC1, MEM_MC };
43*56b2bdd1SGireesh Nagabhushana 
44*56b2bdd1SGireesh Nagabhushana enum {
45*56b2bdd1SGireesh Nagabhushana 	MEMWIN0_APERTURE = 2048,
46*56b2bdd1SGireesh Nagabhushana 	MEMWIN0_BASE	 = 0x1b800,
47*56b2bdd1SGireesh Nagabhushana 	MEMWIN1_APERTURE = 32768,
48*56b2bdd1SGireesh Nagabhushana 	MEMWIN1_BASE	 = 0x28000,
49*56b2bdd1SGireesh Nagabhushana 	MEMWIN2_APERTURE = 65536,
50*56b2bdd1SGireesh Nagabhushana 	MEMWIN2_BASE	 = 0x30000,
51*56b2bdd1SGireesh Nagabhushana };
52*56b2bdd1SGireesh Nagabhushana 
53*56b2bdd1SGireesh Nagabhushana enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST };
54*56b2bdd1SGireesh Nagabhushana 
55*56b2bdd1SGireesh Nagabhushana enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR };
56*56b2bdd1SGireesh Nagabhushana 
57*56b2bdd1SGireesh Nagabhushana enum {
58*56b2bdd1SGireesh Nagabhushana 	PAUSE_RX	= 1 << 0,
59*56b2bdd1SGireesh Nagabhushana 	PAUSE_TX	= 1 << 1,
60*56b2bdd1SGireesh Nagabhushana 	PAUSE_AUTONEG	= 1 << 2
61*56b2bdd1SGireesh Nagabhushana };
62*56b2bdd1SGireesh Nagabhushana 
63*56b2bdd1SGireesh Nagabhushana struct port_stats {
64*56b2bdd1SGireesh Nagabhushana 	u64 tx_octets;		  /* total # of octets in good frames */
65*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames;		  /* all good frames */
66*56b2bdd1SGireesh Nagabhushana 	u64 tx_bcast_frames;	  /* all broadcast frames */
67*56b2bdd1SGireesh Nagabhushana 	u64 tx_mcast_frames;	  /* all multicast frames */
68*56b2bdd1SGireesh Nagabhushana 	u64 tx_ucast_frames;	  /* all unicast frames */
69*56b2bdd1SGireesh Nagabhushana 	u64 tx_error_frames;	  /* all error frames */
70*56b2bdd1SGireesh Nagabhushana 
71*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames_64;	  /* # of Tx frames in a particular range */
72*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames_65_127;
73*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames_128_255;
74*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames_256_511;
75*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames_512_1023;
76*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames_1024_1518;
77*56b2bdd1SGireesh Nagabhushana 	u64 tx_frames_1519_max;
78*56b2bdd1SGireesh Nagabhushana 
79*56b2bdd1SGireesh Nagabhushana 	u64 tx_drop;		  /* # of dropped Tx frames */
80*56b2bdd1SGireesh Nagabhushana 	u64 tx_pause;		  /* # of transmitted pause frames */
81*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp0;		  /* # of transmitted PPP prio 0 frames */
82*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp1;		  /* # of transmitted PPP prio 1 frames */
83*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp2;		  /* # of transmitted PPP prio 2 frames */
84*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp3;		  /* # of transmitted PPP prio 3 frames */
85*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp4;		  /* # of transmitted PPP prio 4 frames */
86*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp5;		  /* # of transmitted PPP prio 5 frames */
87*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp6;		  /* # of transmitted PPP prio 6 frames */
88*56b2bdd1SGireesh Nagabhushana 	u64 tx_ppp7;		  /* # of transmitted PPP prio 7 frames */
89*56b2bdd1SGireesh Nagabhushana 
90*56b2bdd1SGireesh Nagabhushana 	u64 rx_octets;		  /* total # of octets in good frames */
91*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames;		  /* all good frames */
92*56b2bdd1SGireesh Nagabhushana 	u64 rx_bcast_frames;	  /* all broadcast frames */
93*56b2bdd1SGireesh Nagabhushana 	u64 rx_mcast_frames;	  /* all multicast frames */
94*56b2bdd1SGireesh Nagabhushana 	u64 rx_ucast_frames;	  /* all unicast frames */
95*56b2bdd1SGireesh Nagabhushana 	u64 rx_too_long;	  /* # of frames exceeding MTU */
96*56b2bdd1SGireesh Nagabhushana 	u64 rx_jabber;		  /* # of jabber frames */
97*56b2bdd1SGireesh Nagabhushana 	u64 rx_fcs_err;		  /* # of received frames with bad FCS */
98*56b2bdd1SGireesh Nagabhushana 	u64 rx_len_err;		  /* # of received frames with length error */
99*56b2bdd1SGireesh Nagabhushana 	u64 rx_symbol_err;	  /* symbol errors */
100*56b2bdd1SGireesh Nagabhushana 	u64 rx_runt;		  /* # of short frames */
101*56b2bdd1SGireesh Nagabhushana 
102*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames_64;	  /* # of Rx frames in a particular range */
103*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames_65_127;
104*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames_128_255;
105*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames_256_511;
106*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames_512_1023;
107*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames_1024_1518;
108*56b2bdd1SGireesh Nagabhushana 	u64 rx_frames_1519_max;
109*56b2bdd1SGireesh Nagabhushana 
110*56b2bdd1SGireesh Nagabhushana 	u64 rx_pause;		  /* # of received pause frames */
111*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp0;		  /* # of received PPP prio 0 frames */
112*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp1;		  /* # of received PPP prio 1 frames */
113*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp2;		  /* # of received PPP prio 2 frames */
114*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp3;		  /* # of received PPP prio 3 frames */
115*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp4;		  /* # of received PPP prio 4 frames */
116*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp5;		  /* # of received PPP prio 5 frames */
117*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp6;		  /* # of received PPP prio 6 frames */
118*56b2bdd1SGireesh Nagabhushana 	u64 rx_ppp7;		  /* # of received PPP prio 7 frames */
119*56b2bdd1SGireesh Nagabhushana 
120*56b2bdd1SGireesh Nagabhushana 	u64 rx_ovflow0;		  /* drops due to buffer-group 0 overflows */
121*56b2bdd1SGireesh Nagabhushana 	u64 rx_ovflow1;		  /* drops due to buffer-group 1 overflows */
122*56b2bdd1SGireesh Nagabhushana 	u64 rx_ovflow2;		  /* drops due to buffer-group 2 overflows */
123*56b2bdd1SGireesh Nagabhushana 	u64 rx_ovflow3;		  /* drops due to buffer-group 3 overflows */
124*56b2bdd1SGireesh Nagabhushana 	u64 rx_trunc0;		  /* buffer-group 0 truncated packets */
125*56b2bdd1SGireesh Nagabhushana 	u64 rx_trunc1;		  /* buffer-group 1 truncated packets */
126*56b2bdd1SGireesh Nagabhushana 	u64 rx_trunc2;		  /* buffer-group 2 truncated packets */
127*56b2bdd1SGireesh Nagabhushana 	u64 rx_trunc3;		  /* buffer-group 3 truncated packets */
128*56b2bdd1SGireesh Nagabhushana };
129*56b2bdd1SGireesh Nagabhushana 
130*56b2bdd1SGireesh Nagabhushana struct lb_port_stats {
131*56b2bdd1SGireesh Nagabhushana 	u64 octets;
132*56b2bdd1SGireesh Nagabhushana 	u64 frames;
133*56b2bdd1SGireesh Nagabhushana 	u64 bcast_frames;
134*56b2bdd1SGireesh Nagabhushana 	u64 mcast_frames;
135*56b2bdd1SGireesh Nagabhushana 	u64 ucast_frames;
136*56b2bdd1SGireesh Nagabhushana 	u64 error_frames;
137*56b2bdd1SGireesh Nagabhushana 
138*56b2bdd1SGireesh Nagabhushana 	u64 frames_64;
139*56b2bdd1SGireesh Nagabhushana 	u64 frames_65_127;
140*56b2bdd1SGireesh Nagabhushana 	u64 frames_128_255;
141*56b2bdd1SGireesh Nagabhushana 	u64 frames_256_511;
142*56b2bdd1SGireesh Nagabhushana 	u64 frames_512_1023;
143*56b2bdd1SGireesh Nagabhushana 	u64 frames_1024_1518;
144*56b2bdd1SGireesh Nagabhushana 	u64 frames_1519_max;
145*56b2bdd1SGireesh Nagabhushana 
146*56b2bdd1SGireesh Nagabhushana 	u64 drop;
147*56b2bdd1SGireesh Nagabhushana 
148*56b2bdd1SGireesh Nagabhushana 	u64 ovflow0;
149*56b2bdd1SGireesh Nagabhushana 	u64 ovflow1;
150*56b2bdd1SGireesh Nagabhushana 	u64 ovflow2;
151*56b2bdd1SGireesh Nagabhushana 	u64 ovflow3;
152*56b2bdd1SGireesh Nagabhushana 	u64 trunc0;
153*56b2bdd1SGireesh Nagabhushana 	u64 trunc1;
154*56b2bdd1SGireesh Nagabhushana 	u64 trunc2;
155*56b2bdd1SGireesh Nagabhushana 	u64 trunc3;
156*56b2bdd1SGireesh Nagabhushana };
157*56b2bdd1SGireesh Nagabhushana 
158*56b2bdd1SGireesh Nagabhushana struct tp_tcp_stats {
159*56b2bdd1SGireesh Nagabhushana 	u32 tcpOutRsts;
160*56b2bdd1SGireesh Nagabhushana 	u64 tcpInSegs;
161*56b2bdd1SGireesh Nagabhushana 	u64 tcpOutSegs;
162*56b2bdd1SGireesh Nagabhushana 	u64 tcpRetransSegs;
163*56b2bdd1SGireesh Nagabhushana };
164*56b2bdd1SGireesh Nagabhushana 
165*56b2bdd1SGireesh Nagabhushana struct tp_usm_stats {
166*56b2bdd1SGireesh Nagabhushana 	u32 frames;
167*56b2bdd1SGireesh Nagabhushana 	u32 drops;
168*56b2bdd1SGireesh Nagabhushana 	u64 octets;
169*56b2bdd1SGireesh Nagabhushana };
170*56b2bdd1SGireesh Nagabhushana 
171*56b2bdd1SGireesh Nagabhushana struct tp_fcoe_stats {
172*56b2bdd1SGireesh Nagabhushana 	u32 framesDDP;
173*56b2bdd1SGireesh Nagabhushana 	u32 framesDrop;
174*56b2bdd1SGireesh Nagabhushana 	u64 octetsDDP;
175*56b2bdd1SGireesh Nagabhushana };
176*56b2bdd1SGireesh Nagabhushana 
177*56b2bdd1SGireesh Nagabhushana struct tp_err_stats {
178*56b2bdd1SGireesh Nagabhushana 	u32 macInErrs[4];
179*56b2bdd1SGireesh Nagabhushana 	u32 hdrInErrs[4];
180*56b2bdd1SGireesh Nagabhushana 	u32 tcpInErrs[4];
181*56b2bdd1SGireesh Nagabhushana 	u32 tnlCongDrops[4];
182*56b2bdd1SGireesh Nagabhushana 	u32 ofldChanDrops[4];
183*56b2bdd1SGireesh Nagabhushana 	u32 tnlTxDrops[4];
184*56b2bdd1SGireesh Nagabhushana 	u32 ofldVlanDrops[4];
185*56b2bdd1SGireesh Nagabhushana 	u32 tcp6InErrs[4];
186*56b2bdd1SGireesh Nagabhushana 	u32 ofldNoNeigh;
187*56b2bdd1SGireesh Nagabhushana 	u32 ofldCongDefer;
188*56b2bdd1SGireesh Nagabhushana };
189*56b2bdd1SGireesh Nagabhushana 
190*56b2bdd1SGireesh Nagabhushana struct tp_proxy_stats {
191*56b2bdd1SGireesh Nagabhushana 	u32 proxy[4];
192*56b2bdd1SGireesh Nagabhushana };
193*56b2bdd1SGireesh Nagabhushana 
194*56b2bdd1SGireesh Nagabhushana struct tp_cpl_stats {
195*56b2bdd1SGireesh Nagabhushana 	u32 req[4];
196*56b2bdd1SGireesh Nagabhushana 	u32 rsp[4];
197*56b2bdd1SGireesh Nagabhushana 	u32 tx_err[4];
198*56b2bdd1SGireesh Nagabhushana };
199*56b2bdd1SGireesh Nagabhushana 
200*56b2bdd1SGireesh Nagabhushana struct tp_rdma_stats {
201*56b2bdd1SGireesh Nagabhushana 	u32 rqe_dfr_mod;
202*56b2bdd1SGireesh Nagabhushana 	u32 rqe_dfr_pkt;
203*56b2bdd1SGireesh Nagabhushana };
204*56b2bdd1SGireesh Nagabhushana 
205*56b2bdd1SGireesh Nagabhushana struct tp_params {
206*56b2bdd1SGireesh Nagabhushana 	unsigned int ntxchan;		/* # of Tx channels */
207*56b2bdd1SGireesh Nagabhushana 	unsigned int tre;		/* log2 of core clocks per TP tick */
208*56b2bdd1SGireesh Nagabhushana 	unsigned int dack_re;		/* DACK timer resolution */
209*56b2bdd1SGireesh Nagabhushana 	unsigned int la_mask;		/* what events are recorded by TP LA */
210*56b2bdd1SGireesh Nagabhushana 	unsigned short tx_modq[NCHAN];	/* channel to modulation queue map */
211*56b2bdd1SGireesh Nagabhushana };
212*56b2bdd1SGireesh Nagabhushana 
213*56b2bdd1SGireesh Nagabhushana struct vpd_params {
214*56b2bdd1SGireesh Nagabhushana 	unsigned int cclk;
215*56b2bdd1SGireesh Nagabhushana 	u8 ec[EC_LEN + 1];
216*56b2bdd1SGireesh Nagabhushana 	u8 sn[SERNUM_LEN + 1];
217*56b2bdd1SGireesh Nagabhushana 	u8 id[ID_LEN + 1];
218*56b2bdd1SGireesh Nagabhushana 	u8 pn[PN_LEN + 1];
219*56b2bdd1SGireesh Nagabhushana 	u8 na[MACADDR_LEN + 1];
220*56b2bdd1SGireesh Nagabhushana };
221*56b2bdd1SGireesh Nagabhushana 
222*56b2bdd1SGireesh Nagabhushana struct pci_params {
223*56b2bdd1SGireesh Nagabhushana 	unsigned int  vpd_cap_addr;
224*56b2bdd1SGireesh Nagabhushana 	unsigned char speed;
225*56b2bdd1SGireesh Nagabhushana 	unsigned char width;
226*56b2bdd1SGireesh Nagabhushana };
227*56b2bdd1SGireesh Nagabhushana 
228*56b2bdd1SGireesh Nagabhushana /*
229*56b2bdd1SGireesh Nagabhushana  * Firmware device log.
230*56b2bdd1SGireesh Nagabhushana  */
231*56b2bdd1SGireesh Nagabhushana struct devlog_params {
232*56b2bdd1SGireesh Nagabhushana 	u32 memtype;			/* which memory (EDC0, EDC1, MC) */
233*56b2bdd1SGireesh Nagabhushana 	u32 start;			/* start of log in firmware memory */
234*56b2bdd1SGireesh Nagabhushana 	u32 size;			/* size of log */
235*56b2bdd1SGireesh Nagabhushana };
236*56b2bdd1SGireesh Nagabhushana 
237*56b2bdd1SGireesh Nagabhushana struct adapter_params {
238*56b2bdd1SGireesh Nagabhushana 	struct tp_params  tp;
239*56b2bdd1SGireesh Nagabhushana 	struct vpd_params vpd;
240*56b2bdd1SGireesh Nagabhushana 	struct pci_params pci;
241*56b2bdd1SGireesh Nagabhushana 	struct devlog_params devlog;
242*56b2bdd1SGireesh Nagabhushana 
243*56b2bdd1SGireesh Nagabhushana 	unsigned int sf_size;		/* serial flash size in bytes */
244*56b2bdd1SGireesh Nagabhushana 	unsigned int sf_nsec;		/* # of flash sectors */
245*56b2bdd1SGireesh Nagabhushana 
246*56b2bdd1SGireesh Nagabhushana 	unsigned int fw_vers;
247*56b2bdd1SGireesh Nagabhushana 	unsigned int tp_vers;
248*56b2bdd1SGireesh Nagabhushana 	u8 api_vers[7];
249*56b2bdd1SGireesh Nagabhushana 
250*56b2bdd1SGireesh Nagabhushana 	unsigned short mtus[NMTUS];
251*56b2bdd1SGireesh Nagabhushana 	unsigned short a_wnd[NCCTRL_WIN];
252*56b2bdd1SGireesh Nagabhushana 	unsigned short b_wnd[NCCTRL_WIN];
253*56b2bdd1SGireesh Nagabhushana 
254*56b2bdd1SGireesh Nagabhushana 	unsigned int mc_size;		/* MC memory size */
255*56b2bdd1SGireesh Nagabhushana 	unsigned int nfilters;		/* size of filter region */
256*56b2bdd1SGireesh Nagabhushana 
257*56b2bdd1SGireesh Nagabhushana 	unsigned int cim_la_size;
258*56b2bdd1SGireesh Nagabhushana 
259*56b2bdd1SGireesh Nagabhushana 	unsigned int nports;		/* # of ethernet ports */
260*56b2bdd1SGireesh Nagabhushana 	unsigned int portvec;
261*56b2bdd1SGireesh Nagabhushana 	unsigned int rev;		/* chip revision */
262*56b2bdd1SGireesh Nagabhushana 	unsigned int offload;
263*56b2bdd1SGireesh Nagabhushana 
264*56b2bdd1SGireesh Nagabhushana 	unsigned char bypass;
265*56b2bdd1SGireesh Nagabhushana 
266*56b2bdd1SGireesh Nagabhushana 	unsigned int ofldq_wr_cred;
267*56b2bdd1SGireesh Nagabhushana };
268*56b2bdd1SGireesh Nagabhushana 
269*56b2bdd1SGireesh Nagabhushana enum {					/* chip revisions */
270*56b2bdd1SGireesh Nagabhushana 	T4_REV_A  = 0,
271*56b2bdd1SGireesh Nagabhushana };
272*56b2bdd1SGireesh Nagabhushana 
273*56b2bdd1SGireesh Nagabhushana struct trace_params {
274*56b2bdd1SGireesh Nagabhushana 	u32 data[TRACE_LEN / 4];
275*56b2bdd1SGireesh Nagabhushana 	u32 mask[TRACE_LEN / 4];
276*56b2bdd1SGireesh Nagabhushana 	unsigned short snap_len;
277*56b2bdd1SGireesh Nagabhushana 	unsigned short min_len;
278*56b2bdd1SGireesh Nagabhushana 	unsigned char skip_ofst;
279*56b2bdd1SGireesh Nagabhushana 	unsigned char skip_len;
280*56b2bdd1SGireesh Nagabhushana 	unsigned char invert;
281*56b2bdd1SGireesh Nagabhushana 	unsigned char port;
282*56b2bdd1SGireesh Nagabhushana };
283*56b2bdd1SGireesh Nagabhushana 
284*56b2bdd1SGireesh Nagabhushana struct link_config {
285*56b2bdd1SGireesh Nagabhushana 	unsigned short supported;	/* link capabilities */
286*56b2bdd1SGireesh Nagabhushana 	unsigned short advertising;	/* advertised capabilities */
287*56b2bdd1SGireesh Nagabhushana 	unsigned short requested_speed;	/* speed user has requested */
288*56b2bdd1SGireesh Nagabhushana 	unsigned short speed;		/* actual link speed */
289*56b2bdd1SGireesh Nagabhushana 	unsigned char  requested_fc;	/* flow control user has requested */
290*56b2bdd1SGireesh Nagabhushana 	unsigned char  fc;		/* actual link flow control */
291*56b2bdd1SGireesh Nagabhushana 	unsigned char  autoneg;		/* autonegotiating? */
292*56b2bdd1SGireesh Nagabhushana 	unsigned char  link_ok;		/* link up? */
293*56b2bdd1SGireesh Nagabhushana };
294*56b2bdd1SGireesh Nagabhushana 
295*56b2bdd1SGireesh Nagabhushana #include "adapter.h"
296*56b2bdd1SGireesh Nagabhushana 
297*56b2bdd1SGireesh Nagabhushana #ifndef PCI_VENDOR_ID_CHELSIO
298*56b2bdd1SGireesh Nagabhushana #define	PCI_VENDOR_ID_CHELSIO 0x1425
299*56b2bdd1SGireesh Nagabhushana #endif
300*56b2bdd1SGireesh Nagabhushana 
301*56b2bdd1SGireesh Nagabhushana #define	for_each_port(adapter, iter) \
302*56b2bdd1SGireesh Nagabhushana 	for (iter = 0; iter < (adapter)->params.nports; ++iter)
303*56b2bdd1SGireesh Nagabhushana 
304*56b2bdd1SGireesh Nagabhushana void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask,
305*56b2bdd1SGireesh Nagabhushana 	u32 val);
306*56b2bdd1SGireesh Nagabhushana 
307*56b2bdd1SGireesh Nagabhushana int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
308*56b2bdd1SGireesh Nagabhushana 	void *rpl, bool sleep_ok);
309*56b2bdd1SGireesh Nagabhushana 
310*56b2bdd1SGireesh Nagabhushana int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
311*56b2bdd1SGireesh Nagabhushana 	int size, void *rpl);
312*56b2bdd1SGireesh Nagabhushana 
313*56b2bdd1SGireesh Nagabhushana void t4_read_indirect(struct adapter *adap, unsigned int addr_reg,
314*56b2bdd1SGireesh Nagabhushana 	unsigned int data_reg, u32 *vals, unsigned int nregs,
315*56b2bdd1SGireesh Nagabhushana 	unsigned int start_idx);
316*56b2bdd1SGireesh Nagabhushana void t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
317*56b2bdd1SGireesh Nagabhushana 	unsigned int data_reg, const u32 *vals,
318*56b2bdd1SGireesh Nagabhushana 	unsigned int nregs, unsigned int start_idx);
319*56b2bdd1SGireesh Nagabhushana 
320*56b2bdd1SGireesh Nagabhushana struct fw_filter_wr;
321*56b2bdd1SGireesh Nagabhushana 
322*56b2bdd1SGireesh Nagabhushana void t4_intr_enable(struct adapter *adapter);
323*56b2bdd1SGireesh Nagabhushana void t4_intr_disable(struct adapter *adapter);
324*56b2bdd1SGireesh Nagabhushana void t4_intr_clear(struct adapter *adapter);
325*56b2bdd1SGireesh Nagabhushana int t4_slow_intr_handler(struct adapter *adapter);
326*56b2bdd1SGireesh Nagabhushana 
327*56b2bdd1SGireesh Nagabhushana int t4_hash_mac_addr(const u8 *addr);
328*56b2bdd1SGireesh Nagabhushana int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
329*56b2bdd1SGireesh Nagabhushana 	struct link_config *lc);
330*56b2bdd1SGireesh Nagabhushana int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
331*56b2bdd1SGireesh Nagabhushana int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);
332*56b2bdd1SGireesh Nagabhushana int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);
333*56b2bdd1SGireesh Nagabhushana int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz);
334*56b2bdd1SGireesh Nagabhushana int t4_seeprom_wp(struct adapter *adapter, int enable);
335*56b2bdd1SGireesh Nagabhushana int t4_read_flash(struct adapter *adapter, unsigned int addr,
336*56b2bdd1SGireesh Nagabhushana 	unsigned int nwords, u32 *data, int byte_oriented);
337*56b2bdd1SGireesh Nagabhushana int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
338*56b2bdd1SGireesh Nagabhushana unsigned int t4_flash_cfg_addr(struct adapter *adapter);
339*56b2bdd1SGireesh Nagabhushana int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
340*56b2bdd1SGireesh Nagabhushana int t4_get_fw_version(struct adapter *adapter, u32 *vers);
341*56b2bdd1SGireesh Nagabhushana int t4_get_tp_version(struct adapter *adapter, u32 *vers);
342*56b2bdd1SGireesh Nagabhushana int t4_check_fw_version(struct adapter *adapter);
343*56b2bdd1SGireesh Nagabhushana int t4_init_hw(struct adapter *adapter, u32 fw_params);
344*56b2bdd1SGireesh Nagabhushana int t4_prep_adapter(struct adapter *adapter);
345*56b2bdd1SGireesh Nagabhushana int t4_port_init(struct port_info *p, int mbox, int pf, int vf);
346*56b2bdd1SGireesh Nagabhushana int t4_reinit_adapter(struct adapter *adap);
347*56b2bdd1SGireesh Nagabhushana void t4_fatal_err(struct adapter *adapter);
348*56b2bdd1SGireesh Nagabhushana int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
349*56b2bdd1SGireesh Nagabhushana 	int filter_index, int enable);
350*56b2bdd1SGireesh Nagabhushana void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
351*56b2bdd1SGireesh Nagabhushana 	int filter_index, int *enabled);
352*56b2bdd1SGireesh Nagabhushana int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
353*56b2bdd1SGireesh Nagabhushana 	int start, int n, const u16 *rspq, unsigned int nrspq);
354*56b2bdd1SGireesh Nagabhushana int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
355*56b2bdd1SGireesh Nagabhushana 	unsigned int flags);
356*56b2bdd1SGireesh Nagabhushana int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid,
357*56b2bdd1SGireesh Nagabhushana 	unsigned int flags, unsigned int defq);
358*56b2bdd1SGireesh Nagabhushana int t4_read_rss(struct adapter *adapter, u16 *entries);
359*56b2bdd1SGireesh Nagabhushana void t4_read_rss_key(struct adapter *adapter, u32 *key);
360*56b2bdd1SGireesh Nagabhushana void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx);
361*56b2bdd1SGireesh Nagabhushana void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index,
362*56b2bdd1SGireesh Nagabhushana 	u32 *valp);
363*56b2bdd1SGireesh Nagabhushana void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index,
364*56b2bdd1SGireesh Nagabhushana 	u32 val);
365*56b2bdd1SGireesh Nagabhushana void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
366*56b2bdd1SGireesh Nagabhushana 	u32 *vfl, u32 *vfh);
367*56b2bdd1SGireesh Nagabhushana void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index,
368*56b2bdd1SGireesh Nagabhushana 	u32 vfl, u32 vfh);
369*56b2bdd1SGireesh Nagabhushana u32 t4_read_rss_pf_map(struct adapter *adapter);
370*56b2bdd1SGireesh Nagabhushana void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap);
371*56b2bdd1SGireesh Nagabhushana u32 t4_read_rss_pf_mask(struct adapter *adapter);
372*56b2bdd1SGireesh Nagabhushana void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask);
373*56b2bdd1SGireesh Nagabhushana int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask);
374*56b2bdd1SGireesh Nagabhushana void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
375*56b2bdd1SGireesh Nagabhushana void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
376*56b2bdd1SGireesh Nagabhushana void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres);
377*56b2bdd1SGireesh Nagabhushana int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data,
378*56b2bdd1SGireesh Nagabhushana 	size_t n);
379*56b2bdd1SGireesh Nagabhushana int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data,
380*56b2bdd1SGireesh Nagabhushana 	size_t n);
381*56b2bdd1SGireesh Nagabhushana int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n,
382*56b2bdd1SGireesh Nagabhushana 	unsigned int *valp);
383*56b2bdd1SGireesh Nagabhushana int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n,
384*56b2bdd1SGireesh Nagabhushana 	const unsigned int *valp);
385*56b2bdd1SGireesh Nagabhushana int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n,
386*56b2bdd1SGireesh Nagabhushana 	unsigned int *valp);
387*56b2bdd1SGireesh Nagabhushana int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr);
388*56b2bdd1SGireesh Nagabhushana void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
389*56b2bdd1SGireesh Nagabhushana 	unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr);
390*56b2bdd1SGireesh Nagabhushana void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);
391*56b2bdd1SGireesh Nagabhushana int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
392*56b2bdd1SGireesh Nagabhushana int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
393*56b2bdd1SGireesh Nagabhushana 	u64 *parity);
394*56b2bdd1SGireesh Nagabhushana int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size,
395*56b2bdd1SGireesh Nagabhushana 	__be32 *data);
396*56b2bdd1SGireesh Nagabhushana int t4_mem_win_read(struct adapter *adap, u32 addr, __be32 *data);
397*56b2bdd1SGireesh Nagabhushana 
398*56b2bdd1SGireesh Nagabhushana void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
399*56b2bdd1SGireesh Nagabhushana void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
400*56b2bdd1SGireesh Nagabhushana void t4_clr_port_stats(struct adapter *adap, int idx);
401*56b2bdd1SGireesh Nagabhushana 
402*56b2bdd1SGireesh Nagabhushana void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
403*56b2bdd1SGireesh Nagabhushana void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]);
404*56b2bdd1SGireesh Nagabhushana void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]);
405*56b2bdd1SGireesh Nagabhushana void t4_get_tx_sched(struct adapter *adap, unsigned int sched,
406*56b2bdd1SGireesh Nagabhushana 	unsigned int *kbps, unsigned int *ipg);
407*56b2bdd1SGireesh Nagabhushana void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
408*56b2bdd1SGireesh Nagabhushana 	unsigned int mask, unsigned int val);
409*56b2bdd1SGireesh Nagabhushana void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr);
410*56b2bdd1SGireesh Nagabhushana void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st);
411*56b2bdd1SGireesh Nagabhushana void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st);
412*56b2bdd1SGireesh Nagabhushana void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st);
413*56b2bdd1SGireesh Nagabhushana void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st);
414*56b2bdd1SGireesh Nagabhushana void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st);
415*56b2bdd1SGireesh Nagabhushana void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
416*56b2bdd1SGireesh Nagabhushana 	struct tp_tcp_stats *v6);
417*56b2bdd1SGireesh Nagabhushana void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx,
418*56b2bdd1SGireesh Nagabhushana 	struct tp_fcoe_stats *st);
419*56b2bdd1SGireesh Nagabhushana void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
420*56b2bdd1SGireesh Nagabhushana 	const unsigned short *alpha, const unsigned short *beta);
421*56b2bdd1SGireesh Nagabhushana 
422*56b2bdd1SGireesh Nagabhushana void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);
423*56b2bdd1SGireesh Nagabhushana 
424*56b2bdd1SGireesh Nagabhushana int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps);
425*56b2bdd1SGireesh Nagabhushana int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg);
426*56b2bdd1SGireesh Nagabhushana int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals,
427*56b2bdd1SGireesh Nagabhushana 	unsigned int start, unsigned int n);
428*56b2bdd1SGireesh Nagabhushana void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate);
429*56b2bdd1SGireesh Nagabhushana int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map);
430*56b2bdd1SGireesh Nagabhushana void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid);
431*56b2bdd1SGireesh Nagabhushana 
432*56b2bdd1SGireesh Nagabhushana void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
433*56b2bdd1SGireesh Nagabhushana 	const u8 *addr);
434*56b2bdd1SGireesh Nagabhushana int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
435*56b2bdd1SGireesh Nagabhushana 	u64 mask0, u64 mask1, unsigned int crc, bool enable);
436*56b2bdd1SGireesh Nagabhushana 
437*56b2bdd1SGireesh Nagabhushana int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
438*56b2bdd1SGireesh Nagabhushana 	enum dev_master master, enum dev_state *state);
439*56b2bdd1SGireesh Nagabhushana int t4_fw_initialize(struct adapter *adap, unsigned int mbox);
440*56b2bdd1SGireesh Nagabhushana int t4_fw_bye(struct adapter *adap, unsigned int mbox);
441*56b2bdd1SGireesh Nagabhushana int t4_early_init(struct adapter *adap, unsigned int mbox);
442*56b2bdd1SGireesh Nagabhushana int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
443*56b2bdd1SGireesh Nagabhushana int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
444*56b2bdd1SGireesh Nagabhushana 	unsigned int vf, unsigned int nparams, const u32 *params, u32 *val);
445*56b2bdd1SGireesh Nagabhushana int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
446*56b2bdd1SGireesh Nagabhushana 	unsigned int vf, unsigned int nparams, const u32 *params,
447*56b2bdd1SGireesh Nagabhushana 	const u32 *val);
448*56b2bdd1SGireesh Nagabhushana int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
449*56b2bdd1SGireesh Nagabhushana 	unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
450*56b2bdd1SGireesh Nagabhushana 	unsigned int rxqi, unsigned int rxq, unsigned int tc, unsigned int vi,
451*56b2bdd1SGireesh Nagabhushana 	unsigned int cmask, unsigned int pmask, unsigned int exactf,
452*56b2bdd1SGireesh Nagabhushana 	unsigned int rcaps, unsigned int wxcaps);
453*56b2bdd1SGireesh Nagabhushana int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
454*56b2bdd1SGireesh Nagabhushana 	unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
455*56b2bdd1SGireesh Nagabhushana 	unsigned int *rss_size);
456*56b2bdd1SGireesh Nagabhushana int t4_free_vi(struct adapter *adap, unsigned int mbox,
457*56b2bdd1SGireesh Nagabhushana 	unsigned int pf, unsigned int vf, unsigned int viid);
458*56b2bdd1SGireesh Nagabhushana int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
459*56b2bdd1SGireesh Nagabhushana 	int mtu, int promisc, int all_multi, int bcast, int vlanex,
460*56b2bdd1SGireesh Nagabhushana 	bool sleep_ok);
461*56b2bdd1SGireesh Nagabhushana int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
462*56b2bdd1SGireesh Nagabhushana 	unsigned int viid, bool free, unsigned int naddr, const u8 **addr,
463*56b2bdd1SGireesh Nagabhushana 	u16 *idx, u64 *hash, bool sleep_ok);
464*56b2bdd1SGireesh Nagabhushana int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
465*56b2bdd1SGireesh Nagabhushana 	int idx, const u8 *addr, bool persist, bool add_smt);
466*56b2bdd1SGireesh Nagabhushana int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
467*56b2bdd1SGireesh Nagabhushana 	bool ucast, u64 vec, bool sleep_ok);
468*56b2bdd1SGireesh Nagabhushana int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
469*56b2bdd1SGireesh Nagabhushana 	bool rx_en, bool tx_en);
470*56b2bdd1SGireesh Nagabhushana int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
471*56b2bdd1SGireesh Nagabhushana 	unsigned int nblinks);
472*56b2bdd1SGireesh Nagabhushana int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
473*56b2bdd1SGireesh Nagabhushana 	unsigned int mmd, unsigned int reg, unsigned int *valp);
474*56b2bdd1SGireesh Nagabhushana int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
475*56b2bdd1SGireesh Nagabhushana 	unsigned int mmd, unsigned int reg, unsigned int val);
476*56b2bdd1SGireesh Nagabhushana int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start,
477*56b2bdd1SGireesh Nagabhushana 	unsigned int pf, unsigned int vf, unsigned int iqid, unsigned int fl0id,
478*56b2bdd1SGireesh Nagabhushana 	unsigned int fl1id);
479*56b2bdd1SGireesh Nagabhushana int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
480*56b2bdd1SGireesh Nagabhushana 	unsigned int vf, unsigned int iqtype, unsigned int iqid,
481*56b2bdd1SGireesh Nagabhushana 	unsigned int fl0id, unsigned int fl1id);
482*56b2bdd1SGireesh Nagabhushana int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
483*56b2bdd1SGireesh Nagabhushana 	unsigned int vf, unsigned int eqid);
484*56b2bdd1SGireesh Nagabhushana int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
485*56b2bdd1SGireesh Nagabhushana 	unsigned int vf, unsigned int eqid);
486*56b2bdd1SGireesh Nagabhushana int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
487*56b2bdd1SGireesh Nagabhushana 	unsigned int vf, unsigned int eqid);
488*56b2bdd1SGireesh Nagabhushana int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
489*56b2bdd1SGireesh Nagabhushana 	enum ctxt_type ctype, u32 *data);
490*56b2bdd1SGireesh Nagabhushana int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid,
491*56b2bdd1SGireesh Nagabhushana 	enum ctxt_type ctype, u32 *data);
492*56b2bdd1SGireesh Nagabhushana int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
493*56b2bdd1SGireesh Nagabhushana 
494*56b2bdd1SGireesh Nagabhushana /* common.c */
495*56b2bdd1SGireesh Nagabhushana int is_offload(const struct adapter *adap);
496*56b2bdd1SGireesh Nagabhushana unsigned int core_ticks_per_usec(const struct adapter *adap);
497*56b2bdd1SGireesh Nagabhushana int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, int size,
498*56b2bdd1SGireesh Nagabhushana 	void *rpl);
499*56b2bdd1SGireesh Nagabhushana int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, int size,
500*56b2bdd1SGireesh Nagabhushana 	void *rpl);
501*56b2bdd1SGireesh Nagabhushana unsigned int us_to_core_ticks(const struct adapter *adap, unsigned int us);
502*56b2bdd1SGireesh Nagabhushana unsigned int core_ticks_to_us(const struct adapter *adapter,
503*56b2bdd1SGireesh Nagabhushana 	unsigned int ticks);
504*56b2bdd1SGireesh Nagabhushana unsigned int dack_ticks_to_usec(const struct adapter *adap, unsigned int ticks);
505*56b2bdd1SGireesh Nagabhushana int is_bypass(const adapter_t *adap);
506*56b2bdd1SGireesh Nagabhushana int is_bypass_device(int device);
507*56b2bdd1SGireesh Nagabhushana int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask, int polarity,
508*56b2bdd1SGireesh Nagabhushana 	int attempts, int delay);
509*56b2bdd1SGireesh Nagabhushana int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask,
510*56b2bdd1SGireesh Nagabhushana 	int polarity, int attempts, int delay, u32 *valp);
511*56b2bdd1SGireesh Nagabhushana 
512*56b2bdd1SGireesh Nagabhushana #endif /* __CXGBE_COMMON_H */
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