1*80c94ecdSKeith M Wesolowski /* 2*80c94ecdSKeith M Wesolowski * This file and its contents are supplied under the terms of the 3*80c94ecdSKeith M Wesolowski * Common Development and Distribution License ("CDDL"), version 1.0. 4*80c94ecdSKeith M Wesolowski * You may only use this file in accordance with the terms of version 5*80c94ecdSKeith M Wesolowski * 1.0 of the CDDL. 6*80c94ecdSKeith M Wesolowski * 7*80c94ecdSKeith M Wesolowski * A full copy of the text of the CDDL should have accompanied this 8*80c94ecdSKeith M Wesolowski * source. A copy of the CDDL is also available via the Internet at 9*80c94ecdSKeith M Wesolowski * http://www.illumos.org/license/CDDL. 10*80c94ecdSKeith M Wesolowski */ 11*80c94ecdSKeith M Wesolowski 12*80c94ecdSKeith M Wesolowski /* 13*80c94ecdSKeith M Wesolowski * Copyright (C) 2013 Hewlett-Packard Development Company, L.P. 14*80c94ecdSKeith M Wesolowski */ 15*80c94ecdSKeith M Wesolowski 16*80c94ecdSKeith M Wesolowski #ifndef _CPQARY3_IOCTL_H 17*80c94ecdSKeith M Wesolowski #define _CPQARY3_IOCTL_H 18*80c94ecdSKeith M Wesolowski 19*80c94ecdSKeith M Wesolowski #ifdef __cplusplus 20*80c94ecdSKeith M Wesolowski extern "C" { 21*80c94ecdSKeith M Wesolowski #endif 22*80c94ecdSKeith M Wesolowski 23*80c94ecdSKeith M Wesolowski /* 24*80c94ecdSKeith M Wesolowski * USED in Ioctls 25*80c94ecdSKeith M Wesolowski */ 26*80c94ecdSKeith M Wesolowski 27*80c94ecdSKeith M Wesolowski #define CPQARY3_SCSI_IN 0 28*80c94ecdSKeith M Wesolowski #define CPQARY3_SCSI_OUT 1 29*80c94ecdSKeith M Wesolowski #define CPQARY3_NODATA_XFER 2 30*80c94ecdSKeith M Wesolowski #define SUCCESS 0 31*80c94ecdSKeith M Wesolowski #define FAILURE -1 32*80c94ecdSKeith M Wesolowski 33*80c94ecdSKeith M Wesolowski /* for SAS support */ 34*80c94ecdSKeith M Wesolowski /* BMIC Commands */ 35*80c94ecdSKeith M Wesolowski #define HPSAS_ID_LOG_DRIVE 0x10 36*80c94ecdSKeith M Wesolowski #define HPSAS_ID_CONTROLLER 0x11 37*80c94ecdSKeith M Wesolowski #define HPSAS_SENSE_LOG_DRIVE 0x12 38*80c94ecdSKeith M Wesolowski #define HPSAS_ID_PHYSICAL_DRIVE 0x15 39*80c94ecdSKeith M Wesolowski #define HPSAS_READ 0x20 40*80c94ecdSKeith M Wesolowski #define HPSAS_WRITE 0x30 41*80c94ecdSKeith M Wesolowski #define HPSAS_WRITE_THROUGH 0x31 42*80c94ecdSKeith M Wesolowski #define HPSAS_SENSE_CONFIG 0x50 43*80c94ecdSKeith M Wesolowski #define HPSAS_SET_CONFIG 0x51 44*80c94ecdSKeith M Wesolowski #define HPSAS_BYPASS_VOL_STATE 0x52 45*80c94ecdSKeith M Wesolowski #define HPSAS_CHANGE_CONFIG 0x54 46*80c94ecdSKeith M Wesolowski #define HPSAS_SENSE_ORIG_CONFIG 0x55 47*80c94ecdSKeith M Wesolowski #define HPSAS_LABEL_LOG_DRIVE 0x57 48*80c94ecdSKeith M Wesolowski #define HPSAS_SENSE_BUS_PARAMS 0x65 49*80c94ecdSKeith M Wesolowski #define HPSAS_TAPE_INQUIRY 0x92 50*80c94ecdSKeith M Wesolowski #define HPSAS_RESUME_BKGND_ACTIVITY 0x99 51*80c94ecdSKeith M Wesolowski #define HPSAS_SENSE_MP_STAT 0xA0 52*80c94ecdSKeith M Wesolowski #define HPSAS_SET_MP_THRESHOLD 0xA1 53*80c94ecdSKeith M Wesolowski #define HPSAS_MP_PARAM_CONTROL 0xA4 54*80c94ecdSKeith M Wesolowski #define HPSAS_SENSE_DRV_ERR_LOG 0xA6 55*80c94ecdSKeith M Wesolowski #define HPSAS_FLUSH_CACHE 0xc2 56*80c94ecdSKeith M Wesolowski #define HPSAS_REPORT_LOGICAL_LUN 0xC2 57*80c94ecdSKeith M Wesolowski #define HPSAS_REPORT_PHYSICAL_LUN 0xC3 58*80c94ecdSKeith M Wesolowski #define HPSAS_SET_MP_VALUE 0xF3 59*80c94ecdSKeith M Wesolowski #define HPSAS_BMIC_CMD_LEN 16 60*80c94ecdSKeith M Wesolowski 61*80c94ecdSKeith M Wesolowski 62*80c94ecdSKeith M Wesolowski #pragma pack(1) 63*80c94ecdSKeith M Wesolowski 64*80c94ecdSKeith M Wesolowski typedef struct cpqary3_ioctl_request { 65*80c94ecdSKeith M Wesolowski uint32_t len; /* Data Buffer length */ 66*80c94ecdSKeith M Wesolowski uint32_t reserved; /* For future enhancements */ 67*80c94ecdSKeith M Wesolowski uint64_t argp; /* Data or data Buffer of the request */ 68*80c94ecdSKeith M Wesolowski } cpqary3_ioctl_request_t; 69*80c94ecdSKeith M Wesolowski 70*80c94ecdSKeith M Wesolowski typedef struct cpqary3_drvrev { 71*80c94ecdSKeith M Wesolowski uint8_t minor; /* Version info */ 72*80c94ecdSKeith M Wesolowski uint8_t major; 73*80c94ecdSKeith M Wesolowski uint8_t mm; /* Revision Date */ 74*80c94ecdSKeith M Wesolowski uint8_t dd; 75*80c94ecdSKeith M Wesolowski uint16_t yyyy; 76*80c94ecdSKeith M Wesolowski } cpqary3_drvrev_t; 77*80c94ecdSKeith M Wesolowski 78*80c94ecdSKeith M Wesolowski typedef struct cpqary3_driver_info { 79*80c94ecdSKeith M Wesolowski int8_t name[16]; /* Null Term. ASCII driver name */ 80*80c94ecdSKeith M Wesolowski cpqary3_drvrev_t version; /* Driver version and revision */ 81*80c94ecdSKeith M Wesolowski uint32_t num_ctlr; /* Num of ctlrs currently handled */ 82*80c94ecdSKeith M Wesolowski uint32_t max_num_ctlr; /* Max num ctlrs supported */ 83*80c94ecdSKeith M Wesolowski int8_t reserved[98]; /* Structure size = 128 bytes */ 84*80c94ecdSKeith M Wesolowski } cpqary3_driver_info_t; 85*80c94ecdSKeith M Wesolowski 86*80c94ecdSKeith M Wesolowski typedef struct cpqary3_ctlr_info { 87*80c94ecdSKeith M Wesolowski uint16_t state; /* currently set to active */ 88*80c94ecdSKeith M Wesolowski uint32_t board_id; /* controllers board_id */ 89*80c94ecdSKeith M Wesolowski uint32_t subsystem_id; /* controllers subsystem_id */ 90*80c94ecdSKeith M Wesolowski uint8_t bus; /* controllers PCI Bus number */ 91*80c94ecdSKeith M Wesolowski uint8_t dev : 5; /* 5 bit device number */ 92*80c94ecdSKeith M Wesolowski uint8_t fun : 3; /* 3 bit function number */ 93*80c94ecdSKeith M Wesolowski uint16_t slot_num; /* physical slot number */ 94*80c94ecdSKeith M Wesolowski uint8_t num_of_tgts; /* No of Logical Drives */ 95*80c94ecdSKeith M Wesolowski uint32_t controller_instance; /* Ap id number */ 96*80c94ecdSKeith M Wesolowski int8_t reserved[109]; /* Structure size = 128 bytes */ 97*80c94ecdSKeith M Wesolowski } cpqary3_ctlr_info_t; 98*80c94ecdSKeith M Wesolowski 99*80c94ecdSKeith M Wesolowski typedef struct cpqary3_bmic_pass { 100*80c94ecdSKeith M Wesolowski uint8_t lun_addr[8]; /* 8 byte LUN address */ 101*80c94ecdSKeith M Wesolowski uint8_t cmd; /* BMIC command opcode */ 102*80c94ecdSKeith M Wesolowski uint8_t cmd_len; /* BMIC command length */ 103*80c94ecdSKeith M Wesolowski uint16_t unit_number; /* Unit number */ 104*80c94ecdSKeith M Wesolowski uint32_t blk_number; /* BMIC Detail */ 105*80c94ecdSKeith M Wesolowski uint16_t bmic_index; /* bmic_index */ 106*80c94ecdSKeith M Wesolowski uint16_t timeout; /* timeout for command */ 107*80c94ecdSKeith M Wesolowski uint8_t io_direction; /* IN(0) or OUT(1) */ 108*80c94ecdSKeith M Wesolowski uint8_t err_status; /* command completion status */ 109*80c94ecdSKeith M Wesolowski ErrorInfo_t err_info; /* error info */ 110*80c94ecdSKeith M Wesolowski uint16_t buf_len; /* buffer/transfer length */ 111*80c94ecdSKeith M Wesolowski uint64_t buf; /* buffer */ 112*80c94ecdSKeith M Wesolowski } cpqary3_bmic_pass_t; 113*80c94ecdSKeith M Wesolowski 114*80c94ecdSKeith M Wesolowski typedef struct cpqary3_scsi_pass { 115*80c94ecdSKeith M Wesolowski uint8_t lun_addr[8]; /* 8 byte LUN address */ 116*80c94ecdSKeith M Wesolowski uint8_t cdb[16]; /* 16 byte CDB */ 117*80c94ecdSKeith M Wesolowski uint8_t cdb_len; /* SCSI CDB length */ 118*80c94ecdSKeith M Wesolowski uint16_t timeout; /* timeout for command */ 119*80c94ecdSKeith M Wesolowski uint8_t io_direction; /* IN(0) or OUT(1) */ 120*80c94ecdSKeith M Wesolowski uint8_t err_status; /* command completion status */ 121*80c94ecdSKeith M Wesolowski ErrorInfo_t err_info; /* error info */ 122*80c94ecdSKeith M Wesolowski uint16_t buf_len; /* buffer/transfer length */ 123*80c94ecdSKeith M Wesolowski uint64_t buf; /* buffer */ 124*80c94ecdSKeith M Wesolowski } cpqary3_scsi_pass_t; 125*80c94ecdSKeith M Wesolowski 126*80c94ecdSKeith M Wesolowski #pragma pack() 127*80c94ecdSKeith M Wesolowski 128*80c94ecdSKeith M Wesolowski #ifdef __cplusplus 129*80c94ecdSKeith M Wesolowski } 130*80c94ecdSKeith M Wesolowski #endif 131*80c94ecdSKeith M Wesolowski 132*80c94ecdSKeith M Wesolowski #endif /* _CPQARY3_IOCTL_H */ 133