xref: /titanic_52/usr/src/uts/common/io/bge/bge_main2.c (revision ba4e3c84e6b9390bbf7df80b5f1d11dec34cc525)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include "sys/bge_impl2.h"
30 #include <sys/sdt.h>
31 
32 /*
33  * This is the string displayed by modinfo, etc.
34  * Make sure you keep the version ID up to date!
35  */
36 static char bge_ident[] = "Broadcom Gb Ethernet v0.52";
37 
38 /*
39  * Property names
40  */
41 static char debug_propname[] = "bge-debug-flags";
42 static char clsize_propname[] = "cache-line-size";
43 static char latency_propname[] = "latency-timer";
44 static char localmac_boolname[] = "local-mac-address?";
45 static char localmac_propname[] = "local-mac-address";
46 static char macaddr_propname[] = "mac-address";
47 static char subdev_propname[] = "subsystem-id";
48 static char subven_propname[] = "subsystem-vendor-id";
49 static char rxrings_propname[] = "bge-rx-rings";
50 static char txrings_propname[] = "bge-tx-rings";
51 static char fm_cap[] = "fm-capable";
52 static char default_mtu[] = "default_mtu";
53 
54 static int bge_add_intrs(bge_t *, int);
55 static void bge_rem_intrs(bge_t *);
56 
57 /*
58  * Describes the chip's DMA engine
59  */
60 static ddi_dma_attr_t dma_attr = {
61 	DMA_ATTR_V0,			/* dma_attr version	*/
62 	0x0000000000000000ull,		/* dma_attr_addr_lo	*/
63 	0xFFFFFFFFFFFFFFFFull,		/* dma_attr_addr_hi	*/
64 	0x00000000FFFFFFFFull,		/* dma_attr_count_max	*/
65 	0x0000000000000001ull,		/* dma_attr_align	*/
66 	0x00000FFF,			/* dma_attr_burstsizes	*/
67 	0x00000001,			/* dma_attr_minxfer	*/
68 	0x000000000000FFFFull,		/* dma_attr_maxxfer	*/
69 	0xFFFFFFFFFFFFFFFFull,		/* dma_attr_seg		*/
70 	1,				/* dma_attr_sgllen 	*/
71 	0x00000001,			/* dma_attr_granular 	*/
72 	DDI_DMA_FLAGERR			/* dma_attr_flags */
73 };
74 
75 /*
76  * PIO access attributes for registers
77  */
78 static ddi_device_acc_attr_t bge_reg_accattr = {
79 	DDI_DEVICE_ATTR_V0,
80 	DDI_NEVERSWAP_ACC,
81 	DDI_STRICTORDER_ACC,
82 	DDI_FLAGERR_ACC
83 };
84 
85 /*
86  * DMA access attributes for descriptors: NOT to be byte swapped.
87  */
88 static ddi_device_acc_attr_t bge_desc_accattr = {
89 	DDI_DEVICE_ATTR_V0,
90 	DDI_NEVERSWAP_ACC,
91 	DDI_STRICTORDER_ACC,
92 	DDI_FLAGERR_ACC
93 };
94 
95 /*
96  * DMA access attributes for data: NOT to be byte swapped.
97  */
98 static ddi_device_acc_attr_t bge_data_accattr = {
99 	DDI_DEVICE_ATTR_V0,
100 	DDI_NEVERSWAP_ACC,
101 	DDI_STRICTORDER_ACC
102 };
103 
104 static ether_addr_t bge_broadcast_addr = {
105 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff
106 };
107 
108 /*
109  * Versions of the O/S up to Solaris 8 didn't support network booting
110  * from any network interface except the first (NET0).  Patching this
111  * flag to a non-zero value will tell the driver to work around this
112  * limitation by creating an extra (internal) pathname node.  To do
113  * this, just add a line like the following to the CLIENT'S etc/system
114  * file ON THE ROOT FILESYSTEM SERVER before booting the client:
115  *
116  *	set bge:bge_net1_boot_support = 1;
117  */
118 static uint32_t bge_net1_boot_support = 1;
119 
120 static int		bge_m_start(void *);
121 static void		bge_m_stop(void *);
122 static int		bge_m_promisc(void *, boolean_t);
123 static int		bge_m_multicst(void *, boolean_t, const uint8_t *);
124 static int		bge_m_unicst(void *, const uint8_t *);
125 static void		bge_m_resources(void *);
126 static void		bge_m_ioctl(void *, queue_t *, mblk_t *);
127 static boolean_t	bge_m_getcapab(void *, mac_capab_t, void *);
128 static int		bge_unicst_set(void *, const uint8_t *,
129     mac_addr_slot_t);
130 static int		bge_m_unicst_add(void *, mac_multi_addr_t *);
131 static int		bge_m_unicst_remove(void *, mac_addr_slot_t);
132 static int		bge_m_unicst_modify(void *, mac_multi_addr_t *);
133 static int		bge_m_unicst_get(void *, mac_multi_addr_t *);
134 
135 #define	BGE_M_CALLBACK_FLAGS	(MC_RESOURCES | MC_IOCTL | MC_GETCAPAB)
136 
137 static mac_callbacks_t bge_m_callbacks = {
138 	BGE_M_CALLBACK_FLAGS,
139 	bge_m_stat,
140 	bge_m_start,
141 	bge_m_stop,
142 	bge_m_promisc,
143 	bge_m_multicst,
144 	bge_m_unicst,
145 	bge_m_tx,
146 	bge_m_resources,
147 	bge_m_ioctl,
148 	bge_m_getcapab
149 };
150 
151 /*
152  * ========== Transmit and receive ring reinitialisation ==========
153  */
154 
155 /*
156  * These <reinit> routines each reset the specified ring to an initial
157  * state, assuming that the corresponding <init> routine has already
158  * been called exactly once.
159  */
160 
161 static void
162 bge_reinit_send_ring(send_ring_t *srp)
163 {
164 	/*
165 	 * Reinitialise control variables ...
166 	 */
167 	ASSERT(srp->tx_flow == 0);
168 	srp->tx_next = 0;
169 	srp->tx_free = srp->desc.nslots;
170 
171 	ASSERT(mutex_owned(srp->tc_lock));
172 	srp->tc_next = 0;
173 
174 	/*
175 	 * Zero and sync all the h/w Send Buffer Descriptors
176 	 */
177 	DMA_ZERO(srp->desc);
178 	DMA_SYNC(srp->desc, DDI_DMA_SYNC_FORDEV);
179 }
180 
181 static void
182 bge_reinit_recv_ring(recv_ring_t *rrp)
183 {
184 	/*
185 	 * Reinitialise control variables ...
186 	 */
187 	rrp->rx_next = 0;
188 }
189 
190 static void
191 bge_reinit_buff_ring(buff_ring_t *brp, uint64_t ring)
192 {
193 	bge_rbd_t *hw_rbd_p;
194 	sw_rbd_t *srbdp;
195 	uint32_t bufsize;
196 	uint32_t nslots;
197 	uint32_t slot;
198 
199 	static uint16_t ring_type_flag[BGE_BUFF_RINGS_MAX] = {
200 		RBD_FLAG_STD_RING,
201 		RBD_FLAG_JUMBO_RING,
202 		RBD_FLAG_MINI_RING
203 	};
204 
205 	/*
206 	 * Zero, initialise and sync all the h/w Receive Buffer Descriptors
207 	 * Note: all the remaining fields (<type>, <flags>, <ip_cksum>,
208 	 * <tcp_udp_cksum>, <error_flag>, <vlan_tag>, and <reserved>)
209 	 * should be zeroed, and so don't need to be set up specifically
210 	 * once the whole area has been cleared.
211 	 */
212 	DMA_ZERO(brp->desc);
213 
214 	hw_rbd_p = DMA_VPTR(brp->desc);
215 	nslots = brp->desc.nslots;
216 	ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT);
217 	bufsize = brp->buf[0].size;
218 	srbdp = brp->sw_rbds;
219 	for (slot = 0; slot < nslots; ++hw_rbd_p, ++srbdp, ++slot) {
220 		hw_rbd_p->host_buf_addr = srbdp->pbuf.cookie.dmac_laddress;
221 		hw_rbd_p->index = slot;
222 		hw_rbd_p->len = bufsize;
223 		hw_rbd_p->opaque = srbdp->pbuf.token;
224 		hw_rbd_p->flags |= ring_type_flag[ring];
225 	}
226 
227 	DMA_SYNC(brp->desc, DDI_DMA_SYNC_FORDEV);
228 
229 	/*
230 	 * Finally, reinitialise the ring control variables ...
231 	 */
232 	brp->rf_next = (nslots != 0) ? (nslots-1) : 0;
233 }
234 
235 /*
236  * Reinitialize all rings
237  */
238 static void
239 bge_reinit_rings(bge_t *bgep)
240 {
241 	uint64_t ring;
242 
243 	ASSERT(mutex_owned(bgep->genlock));
244 
245 	/*
246 	 * Send Rings ...
247 	 */
248 	for (ring = 0; ring < bgep->chipid.tx_rings; ++ring)
249 		bge_reinit_send_ring(&bgep->send[ring]);
250 
251 	/*
252 	 * Receive Return Rings ...
253 	 */
254 	for (ring = 0; ring < bgep->chipid.rx_rings; ++ring)
255 		bge_reinit_recv_ring(&bgep->recv[ring]);
256 
257 	/*
258 	 * Receive Producer Rings ...
259 	 */
260 	for (ring = 0; ring < BGE_BUFF_RINGS_USED; ++ring)
261 		bge_reinit_buff_ring(&bgep->buff[ring], ring);
262 }
263 
264 /*
265  * ========== Internal state management entry points ==========
266  */
267 
268 #undef	BGE_DBG
269 #define	BGE_DBG		BGE_DBG_NEMO	/* debug flag for this code	*/
270 
271 /*
272  * These routines provide all the functionality required by the
273  * corresponding GLD entry points, but don't update the GLD state
274  * so they can be called internally without disturbing our record
275  * of what GLD thinks we should be doing ...
276  */
277 
278 /*
279  *	bge_reset() -- reset h/w & rings to initial state
280  */
281 static int
282 #ifdef BGE_IPMI_ASF
283 bge_reset(bge_t *bgep, uint_t asf_mode)
284 #else
285 bge_reset(bge_t *bgep)
286 #endif
287 {
288 	uint64_t	ring;
289 	int retval;
290 
291 	BGE_TRACE(("bge_reset($%p)", (void *)bgep));
292 
293 	ASSERT(mutex_owned(bgep->genlock));
294 
295 	/*
296 	 * Grab all the other mutexes in the world (this should
297 	 * ensure no other threads are manipulating driver state)
298 	 */
299 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
300 		mutex_enter(bgep->recv[ring].rx_lock);
301 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
302 		mutex_enter(bgep->buff[ring].rf_lock);
303 	rw_enter(bgep->errlock, RW_WRITER);
304 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
305 		mutex_enter(bgep->send[ring].tc_lock);
306 
307 #ifdef BGE_IPMI_ASF
308 	retval = bge_chip_reset(bgep, B_TRUE, asf_mode);
309 #else
310 	retval = bge_chip_reset(bgep, B_TRUE);
311 #endif
312 	bge_reinit_rings(bgep);
313 
314 	/*
315 	 * Free the world ...
316 	 */
317 	for (ring = BGE_SEND_RINGS_MAX; ring-- > 0; )
318 		mutex_exit(bgep->send[ring].tc_lock);
319 	rw_exit(bgep->errlock);
320 	for (ring = BGE_BUFF_RINGS_MAX; ring-- > 0; )
321 		mutex_exit(bgep->buff[ring].rf_lock);
322 	for (ring = BGE_RECV_RINGS_MAX; ring-- > 0; )
323 		mutex_exit(bgep->recv[ring].rx_lock);
324 
325 	BGE_DEBUG(("bge_reset($%p) done", (void *)bgep));
326 	return (retval);
327 }
328 
329 /*
330  *	bge_stop() -- stop processing, don't reset h/w or rings
331  */
332 static void
333 bge_stop(bge_t *bgep)
334 {
335 	BGE_TRACE(("bge_stop($%p)", (void *)bgep));
336 
337 	ASSERT(mutex_owned(bgep->genlock));
338 
339 #ifdef BGE_IPMI_ASF
340 	if (bgep->asf_enabled) {
341 		bgep->asf_pseudostop = B_TRUE;
342 	} else {
343 #endif
344 		bge_chip_stop(bgep, B_FALSE);
345 #ifdef BGE_IPMI_ASF
346 	}
347 #endif
348 
349 	BGE_DEBUG(("bge_stop($%p) done", (void *)bgep));
350 }
351 
352 /*
353  *	bge_start() -- start transmitting/receiving
354  */
355 static int
356 bge_start(bge_t *bgep, boolean_t reset_phys)
357 {
358 	int retval;
359 
360 	BGE_TRACE(("bge_start($%p, %d)", (void *)bgep, reset_phys));
361 
362 	ASSERT(mutex_owned(bgep->genlock));
363 
364 	/*
365 	 * Start chip processing, including enabling interrupts
366 	 */
367 	retval = bge_chip_start(bgep, reset_phys);
368 
369 	BGE_DEBUG(("bge_start($%p, %d) done", (void *)bgep, reset_phys));
370 	return (retval);
371 }
372 
373 /*
374  * bge_restart - restart transmitting/receiving after error or suspend
375  */
376 int
377 bge_restart(bge_t *bgep, boolean_t reset_phys)
378 {
379 	int retval = DDI_SUCCESS;
380 	ASSERT(mutex_owned(bgep->genlock));
381 
382 #ifdef BGE_IPMI_ASF
383 	if (bgep->asf_enabled) {
384 		if (bge_reset(bgep, ASF_MODE_POST_INIT) != DDI_SUCCESS)
385 			retval = DDI_FAILURE;
386 	} else
387 		if (bge_reset(bgep, ASF_MODE_NONE) != DDI_SUCCESS)
388 			retval = DDI_FAILURE;
389 #else
390 	if (bge_reset(bgep) != DDI_SUCCESS)
391 		retval = DDI_FAILURE;
392 #endif
393 	if (bgep->bge_mac_state == BGE_MAC_STARTED) {
394 		if (bge_start(bgep, reset_phys) != DDI_SUCCESS)
395 			retval = DDI_FAILURE;
396 		bgep->watchdog = 0;
397 		ddi_trigger_softintr(bgep->resched_id);
398 	}
399 
400 	BGE_DEBUG(("bge_restart($%p, %d) done", (void *)bgep, reset_phys));
401 	return (retval);
402 }
403 
404 
405 /*
406  * ========== Nemo-required management entry points ==========
407  */
408 
409 #undef	BGE_DBG
410 #define	BGE_DBG		BGE_DBG_NEMO	/* debug flag for this code	*/
411 
412 /*
413  *	bge_m_stop() -- stop transmitting/receiving
414  */
415 static void
416 bge_m_stop(void *arg)
417 {
418 	bge_t *bgep = arg;		/* private device info	*/
419 
420 	BGE_TRACE(("bge_m_stop($%p)", arg));
421 
422 	/*
423 	 * Just stop processing, then record new GLD state
424 	 */
425 	mutex_enter(bgep->genlock);
426 	if (!(bgep->progress & PROGRESS_INTR)) {
427 		/* can happen during autorecovery */
428 		mutex_exit(bgep->genlock);
429 		return;
430 	}
431 
432 	bgep->link_up_msg = bgep->link_down_msg = " (stopped)";
433 	bge_stop(bgep);
434 	bgep->bge_mac_state = BGE_MAC_STOPPED;
435 	BGE_DEBUG(("bge_m_stop($%p) done", arg));
436 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
437 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_UNAFFECTED);
438 	mutex_exit(bgep->genlock);
439 }
440 
441 /*
442  *	bge_m_start() -- start transmitting/receiving
443  */
444 static int
445 bge_m_start(void *arg)
446 {
447 	bge_t *bgep = arg;		/* private device info	*/
448 
449 	BGE_TRACE(("bge_m_start($%p)", arg));
450 
451 	/*
452 	 * Start processing and record new GLD state
453 	 */
454 	mutex_enter(bgep->genlock);
455 	if (!(bgep->progress & PROGRESS_INTR)) {
456 		/* can happen during autorecovery */
457 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
458 		mutex_exit(bgep->genlock);
459 		return (EIO);
460 	}
461 #ifdef BGE_IPMI_ASF
462 	if (bgep->asf_enabled) {
463 		if ((bgep->asf_status == ASF_STAT_RUN) &&
464 			(bgep->asf_pseudostop)) {
465 
466 			bgep->link_up_msg = bgep->link_down_msg
467 				= " (initialized)";
468 			bgep->bge_mac_state = BGE_MAC_STARTED;
469 			mutex_exit(bgep->genlock);
470 			return (0);
471 		}
472 	}
473 	if (bge_reset(bgep, ASF_MODE_INIT) != DDI_SUCCESS) {
474 #else
475 	if (bge_reset(bgep) != DDI_SUCCESS) {
476 #endif
477 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
478 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
479 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
480 		mutex_exit(bgep->genlock);
481 		return (EIO);
482 	}
483 	bgep->link_up_msg = bgep->link_down_msg = " (initialized)";
484 	if (bge_start(bgep, B_TRUE) != DDI_SUCCESS) {
485 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
486 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
487 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
488 		mutex_exit(bgep->genlock);
489 		return (EIO);
490 	}
491 	bgep->bge_mac_state = BGE_MAC_STARTED;
492 	BGE_DEBUG(("bge_m_start($%p) done", arg));
493 
494 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
495 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
496 		mutex_exit(bgep->genlock);
497 		return (EIO);
498 	}
499 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
500 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
501 		mutex_exit(bgep->genlock);
502 		return (EIO);
503 	}
504 #ifdef BGE_IPMI_ASF
505 	if (bgep->asf_enabled) {
506 		if (bgep->asf_status != ASF_STAT_RUN) {
507 			/* start ASF heart beat */
508 			bgep->asf_timeout_id = timeout(bge_asf_heartbeat,
509 				(void *)bgep,
510 				drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL));
511 			bgep->asf_status = ASF_STAT_RUN;
512 		}
513 	}
514 #endif
515 	mutex_exit(bgep->genlock);
516 
517 	return (0);
518 }
519 
520 /*
521  *	bge_m_unicst() -- set the physical network address
522  */
523 static int
524 bge_m_unicst(void *arg, const uint8_t *macaddr)
525 {
526 	/*
527 	 * Request to set address in
528 	 * address slot 0, i.e., default address
529 	 */
530 	return (bge_unicst_set(arg, macaddr, 0));
531 }
532 
533 /*
534  *	bge_unicst_set() -- set the physical network address
535  */
536 static int
537 bge_unicst_set(void *arg, const uint8_t *macaddr, mac_addr_slot_t slot)
538 {
539 	bge_t *bgep = arg;		/* private device info	*/
540 
541 	BGE_TRACE(("bge_m_unicst_set($%p, %s)", arg,
542 		ether_sprintf((void *)macaddr)));
543 	/*
544 	 * Remember the new current address in the driver state
545 	 * Sync the chip's idea of the address too ...
546 	 */
547 	mutex_enter(bgep->genlock);
548 	if (!(bgep->progress & PROGRESS_INTR)) {
549 		/* can happen during autorecovery */
550 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
551 		mutex_exit(bgep->genlock);
552 		return (EIO);
553 	}
554 	ethaddr_copy(macaddr, bgep->curr_addr[slot].addr);
555 #ifdef BGE_IPMI_ASF
556 	if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) {
557 #else
558 	if (bge_chip_sync(bgep) == DDI_FAILURE) {
559 #endif
560 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
561 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
562 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
563 		mutex_exit(bgep->genlock);
564 		return (EIO);
565 	}
566 #ifdef BGE_IPMI_ASF
567 	if (bgep->asf_enabled) {
568 		/*
569 		 * The above bge_chip_sync() function wrote the ethernet MAC
570 		 * addresses registers which destroyed the IPMI/ASF sideband.
571 		 * Here, we have to reset chip to make IPMI/ASF sideband work.
572 		 */
573 		if (bgep->asf_status == ASF_STAT_RUN) {
574 			/*
575 			 * We must stop ASF heart beat before bge_chip_stop(),
576 			 * otherwise some computers (ex. IBM HS20 blade server)
577 			 * may crash.
578 			 */
579 			bge_asf_update_status(bgep);
580 			bge_asf_stop_timer(bgep);
581 			bgep->asf_status = ASF_STAT_STOP;
582 
583 			bge_asf_pre_reset_operations(bgep, BGE_INIT_RESET);
584 		}
585 		bge_chip_stop(bgep, B_FALSE);
586 
587 		if (bge_restart(bgep, B_FALSE) == DDI_FAILURE) {
588 			(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
589 			(void) bge_check_acc_handle(bgep, bgep->io_handle);
590 			ddi_fm_service_impact(bgep->devinfo,
591 			    DDI_SERVICE_DEGRADED);
592 			mutex_exit(bgep->genlock);
593 			return (EIO);
594 		}
595 
596 		/*
597 		 * Start our ASF heartbeat counter as soon as possible.
598 		 */
599 		if (bgep->asf_status != ASF_STAT_RUN) {
600 			/* start ASF heart beat */
601 			bgep->asf_timeout_id = timeout(bge_asf_heartbeat,
602 				(void *)bgep,
603 				drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL));
604 			bgep->asf_status = ASF_STAT_RUN;
605 		}
606 	}
607 #endif
608 	BGE_DEBUG(("bge_m_unicst_set($%p) done", arg));
609 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
610 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
611 		mutex_exit(bgep->genlock);
612 		return (EIO);
613 	}
614 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
615 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
616 		mutex_exit(bgep->genlock);
617 		return (EIO);
618 	}
619 	mutex_exit(bgep->genlock);
620 
621 	return (0);
622 }
623 
624 /*
625  * The following four routines are used as callbacks for multiple MAC
626  * address support:
627  *    -  bge_m_unicst_add(void *, mac_multi_addr_t *);
628  *    -  bge_m_unicst_remove(void *, mac_addr_slot_t);
629  *    -  bge_m_unicst_modify(void *, mac_multi_addr_t *);
630  *    -  bge_m_unicst_get(void *, mac_multi_addr_t *);
631  */
632 
633 /*
634  * bge_m_unicst_add() - will find an unused address slot, set the
635  * address value to the one specified, reserve that slot and enable
636  * the NIC to start filtering on the new MAC address.
637  * address slot. Returns 0 on success.
638  */
639 static int
640 bge_m_unicst_add(void *arg, mac_multi_addr_t *maddr)
641 {
642 	bge_t *bgep = arg;		/* private device info	*/
643 	mac_addr_slot_t slot;
644 	int i, err;
645 
646 	if (mac_unicst_verify(bgep->mh,
647 	    maddr->mma_addr, maddr->mma_addrlen) == B_FALSE)
648 		return (EINVAL);
649 
650 	mutex_enter(bgep->genlock);
651 	if (bgep->unicst_addr_avail == 0) {
652 		/* no slots available */
653 		mutex_exit(bgep->genlock);
654 		return (ENOSPC);
655 	}
656 
657 	/*
658 	 * Primary/default address is in slot 0. The next three
659 	 * addresses are the multiple MAC addresses. So multiple
660 	 * MAC address 0 is in slot 1, 1 in slot 2, and so on.
661 	 * When we return a slot number to the user, it is
662 	 * actually slot number plus one to bge.
663 	 */
664 	for (i = 0; i < bgep->unicst_addr_total; i++) {
665 		if (bgep->curr_addr[i + 1].set == B_FALSE) {
666 			bgep->curr_addr[i + 1].set = B_TRUE;
667 			slot = i;
668 			break;
669 		}
670 	}
671 
672 	bgep->unicst_addr_avail--;
673 	mutex_exit(bgep->genlock);
674 	maddr->mma_slot = slot;
675 
676 	if ((err = bge_unicst_set(bgep, maddr->mma_addr, slot)) != 0) {
677 		mutex_enter(bgep->genlock);
678 		bgep->curr_addr[slot + 1].set = B_FALSE;
679 		bgep->unicst_addr_avail++;
680 		mutex_exit(bgep->genlock);
681 	}
682 	return (err);
683 }
684 
685 /*
686  * bge_m_unicst_remove() - removes a MAC address that was added by a
687  * call to bge_m_unicst_add(). The slot number that was returned in
688  * add() is passed in the call to remove the address.
689  * Returns 0 on success.
690  */
691 static int
692 bge_m_unicst_remove(void *arg, mac_addr_slot_t slot)
693 {
694 	bge_t *bgep = arg;		/* private device info	*/
695 
696 	ASSERT(slot < bgep->unicst_addr_total);
697 	mutex_enter(bgep->genlock);
698 	if (bgep->curr_addr[slot + 1].set == B_TRUE) {
699 		bgep->curr_addr[slot + 1].set = B_FALSE;
700 		bgep->unicst_addr_avail++;
701 		mutex_exit(bgep->genlock);
702 		/*
703 		 * Copy the default address to the passed slot
704 		 */
705 		return (bge_unicst_set(bgep,
706 		    bgep->curr_addr[0].addr, slot + 1));
707 	}
708 	mutex_exit(bgep->genlock);
709 	return (EINVAL);
710 }
711 
712 /*
713  * bge_m_unicst_modify() - modifies the value of an address that
714  * has been added by bge_m_unicst_add(). The new address, address
715  * length and the slot number that was returned in the call to add
716  * should be passed to bge_m_unicst_modify(). mma_flags should be
717  * set to 0. Returns 0 on success.
718  */
719 static int
720 bge_m_unicst_modify(void *arg, mac_multi_addr_t *maddr)
721 {
722 	bge_t *bgep = arg;		/* private device info	*/
723 	mac_addr_slot_t slot;
724 
725 	if (mac_unicst_verify(bgep->mh,
726 	    maddr->mma_addr, maddr->mma_addrlen) == B_FALSE)
727 		return (EINVAL);
728 
729 	slot = maddr->mma_slot;
730 
731 	mutex_enter(bgep->genlock);
732 	if (slot < bgep->unicst_addr_total &&
733 	    bgep->curr_addr[slot].set == B_TRUE) {
734 		mutex_exit(bgep->genlock);
735 		return (bge_unicst_set(bgep, maddr->mma_addr, slot));
736 	}
737 	mutex_exit(bgep->genlock);
738 
739 	return (EINVAL);
740 }
741 
742 /*
743  * bge_m_unicst_get() - will get the MAC address and all other
744  * information related to the address slot passed in mac_multi_addr_t.
745  * mma_flags should be set to 0 in the call.
746  * On return, mma_flags can take the following values:
747  * 1) MMAC_SLOT_UNUSED
748  * 2) MMAC_SLOT_USED | MMAC_VENDOR_ADDR
749  * 3) MMAC_SLOT_UNUSED | MMAC_VENDOR_ADDR
750  * 4) MMAC_SLOT_USED
751  */
752 static int
753 bge_m_unicst_get(void *arg, mac_multi_addr_t *maddr)
754 {
755 	bge_t *bgep = arg;		/* private device info	*/
756 	mac_addr_slot_t slot;
757 
758 	slot = maddr->mma_slot;
759 
760 	if (slot < 0 || slot >= bgep->unicst_addr_total)
761 		return (EINVAL);
762 
763 	mutex_enter(bgep->genlock);
764 	if (bgep->curr_addr[slot + 1].set == B_TRUE) {
765 		ethaddr_copy(bgep->curr_addr[slot + 1].addr,
766 		    maddr->mma_addr);
767 		maddr->mma_flags = MMAC_SLOT_USED;
768 	} else {
769 		maddr->mma_flags = MMAC_SLOT_UNUSED;
770 	}
771 	mutex_exit(bgep->genlock);
772 
773 	return (0);
774 }
775 
776 /*
777  * Compute the index of the required bit in the multicast hash map.
778  * This must mirror the way the hardware actually does it!
779  * See Broadcom document 570X-PG102-R page 125.
780  */
781 static uint32_t
782 bge_hash_index(const uint8_t *mca)
783 {
784 	uint32_t hash;
785 
786 	CRC32(hash, mca, ETHERADDRL, -1U, crc32_table);
787 
788 	return (hash);
789 }
790 
791 /*
792  *	bge_m_multicst_add() -- enable/disable a multicast address
793  */
794 static int
795 bge_m_multicst(void *arg, boolean_t add, const uint8_t *mca)
796 {
797 	bge_t *bgep = arg;		/* private device info	*/
798 	uint32_t hash;
799 	uint32_t index;
800 	uint32_t word;
801 	uint32_t bit;
802 	uint8_t *refp;
803 
804 	BGE_TRACE(("bge_m_multicst($%p, %s, %s)", arg,
805 		(add) ? "add" : "remove", ether_sprintf((void *)mca)));
806 
807 	/*
808 	 * Precalculate all required masks, pointers etc ...
809 	 */
810 	hash = bge_hash_index(mca);
811 	index = hash % BGE_HASH_TABLE_SIZE;
812 	word = index/32u;
813 	bit = 1 << (index % 32u);
814 	refp = &bgep->mcast_refs[index];
815 
816 	BGE_DEBUG(("bge_m_multicst: hash 0x%x index %d (%d:0x%x) = %d",
817 		hash, index, word, bit, *refp));
818 
819 	/*
820 	 * We must set the appropriate bit in the hash map (and the
821 	 * corresponding h/w register) when the refcount goes from 0
822 	 * to >0, and clear it when the last ref goes away (refcount
823 	 * goes from >0 back to 0).  If we change the hash map, we
824 	 * must also update the chip's hardware map registers.
825 	 */
826 	mutex_enter(bgep->genlock);
827 	if (!(bgep->progress & PROGRESS_INTR)) {
828 		/* can happen during autorecovery */
829 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
830 		mutex_exit(bgep->genlock);
831 		return (EIO);
832 	}
833 	if (add) {
834 		if ((*refp)++ == 0) {
835 			bgep->mcast_hash[word] |= bit;
836 #ifdef BGE_IPMI_ASF
837 			if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
838 #else
839 			if (bge_chip_sync(bgep) == DDI_FAILURE) {
840 #endif
841 				(void) bge_check_acc_handle(bgep,
842 				    bgep->cfg_handle);
843 				(void) bge_check_acc_handle(bgep,
844 				    bgep->io_handle);
845 				ddi_fm_service_impact(bgep->devinfo,
846 				    DDI_SERVICE_DEGRADED);
847 				mutex_exit(bgep->genlock);
848 				return (EIO);
849 			}
850 		}
851 	} else {
852 		if (--(*refp) == 0) {
853 			bgep->mcast_hash[word] &= ~bit;
854 #ifdef BGE_IPMI_ASF
855 			if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
856 #else
857 			if (bge_chip_sync(bgep) == DDI_FAILURE) {
858 #endif
859 				(void) bge_check_acc_handle(bgep,
860 				    bgep->cfg_handle);
861 				(void) bge_check_acc_handle(bgep,
862 				    bgep->io_handle);
863 				ddi_fm_service_impact(bgep->devinfo,
864 				    DDI_SERVICE_DEGRADED);
865 				mutex_exit(bgep->genlock);
866 				return (EIO);
867 			}
868 		}
869 	}
870 	BGE_DEBUG(("bge_m_multicst($%p) done", arg));
871 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
872 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
873 		mutex_exit(bgep->genlock);
874 		return (EIO);
875 	}
876 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
877 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
878 		mutex_exit(bgep->genlock);
879 		return (EIO);
880 	}
881 	mutex_exit(bgep->genlock);
882 
883 	return (0);
884 }
885 
886 /*
887  * bge_m_promisc() -- set or reset promiscuous mode on the board
888  *
889  *	Program the hardware to enable/disable promiscuous and/or
890  *	receive-all-multicast modes.
891  */
892 static int
893 bge_m_promisc(void *arg, boolean_t on)
894 {
895 	bge_t *bgep = arg;
896 
897 	BGE_TRACE(("bge_m_promisc_set($%p, %d)", arg, on));
898 
899 	/*
900 	 * Store MAC layer specified mode and pass to chip layer to update h/w
901 	 */
902 	mutex_enter(bgep->genlock);
903 	if (!(bgep->progress & PROGRESS_INTR)) {
904 		/* can happen during autorecovery */
905 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
906 		mutex_exit(bgep->genlock);
907 		return (EIO);
908 	}
909 	bgep->promisc = on;
910 #ifdef BGE_IPMI_ASF
911 	if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
912 #else
913 	if (bge_chip_sync(bgep) == DDI_FAILURE) {
914 #endif
915 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
916 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
917 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
918 		mutex_exit(bgep->genlock);
919 		return (EIO);
920 	}
921 	BGE_DEBUG(("bge_m_promisc_set($%p) done", arg));
922 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
923 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
924 		mutex_exit(bgep->genlock);
925 		return (EIO);
926 	}
927 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
928 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
929 		mutex_exit(bgep->genlock);
930 		return (EIO);
931 	}
932 	mutex_exit(bgep->genlock);
933 	return (0);
934 }
935 
936 /*ARGSUSED*/
937 static boolean_t
938 bge_m_getcapab(void *arg, mac_capab_t cap, void *cap_data)
939 {
940 	bge_t *bgep = arg;
941 
942 	switch (cap) {
943 	case MAC_CAPAB_HCKSUM: {
944 		uint32_t *txflags = cap_data;
945 
946 		*txflags = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM;
947 		break;
948 	}
949 
950 	case MAC_CAPAB_POLL:
951 		/*
952 		 * There's nothing for us to fill in, simply returning
953 		 * B_TRUE stating that we support polling is sufficient.
954 		 */
955 		break;
956 
957 	case MAC_CAPAB_MULTIADDRESS: {
958 		multiaddress_capab_t	*mmacp = cap_data;
959 
960 		mutex_enter(bgep->genlock);
961 		mmacp->maddr_naddr = bgep->unicst_addr_total;
962 		mmacp->maddr_naddrfree = bgep->unicst_addr_avail;
963 		/* No multiple factory addresses, set mma_flag to 0 */
964 		mmacp->maddr_flag = 0;
965 		mmacp->maddr_handle = bgep;
966 		mmacp->maddr_add = bge_m_unicst_add;
967 		mmacp->maddr_remove = bge_m_unicst_remove;
968 		mmacp->maddr_modify = bge_m_unicst_modify;
969 		mmacp->maddr_get = bge_m_unicst_get;
970 		mmacp->maddr_reserve = NULL;
971 		mutex_exit(bgep->genlock);
972 		break;
973 	}
974 
975 	default:
976 		return (B_FALSE);
977 	}
978 	return (B_TRUE);
979 }
980 
981 /*
982  * Loopback ioctl code
983  */
984 
985 static lb_property_t loopmodes[] = {
986 	{ normal,	"normal",	BGE_LOOP_NONE		},
987 	{ external,	"1000Mbps",	BGE_LOOP_EXTERNAL_1000	},
988 	{ external,	"100Mbps",	BGE_LOOP_EXTERNAL_100	},
989 	{ external,	"10Mbps",	BGE_LOOP_EXTERNAL_10	},
990 	{ internal,	"PHY",		BGE_LOOP_INTERNAL_PHY	},
991 	{ internal,	"MAC",		BGE_LOOP_INTERNAL_MAC	}
992 };
993 
994 static enum ioc_reply
995 bge_set_loop_mode(bge_t *bgep, uint32_t mode)
996 {
997 	const char *msg;
998 
999 	/*
1000 	 * If the mode isn't being changed, there's nothing to do ...
1001 	 */
1002 	if (mode == bgep->param_loop_mode)
1003 		return (IOC_ACK);
1004 
1005 	/*
1006 	 * Validate the requested mode and prepare a suitable message
1007 	 * to explain the link down/up cycle that the change will
1008 	 * probably induce ...
1009 	 */
1010 	switch (mode) {
1011 	default:
1012 		return (IOC_INVAL);
1013 
1014 	case BGE_LOOP_NONE:
1015 		msg = " (loopback disabled)";
1016 		break;
1017 
1018 	case BGE_LOOP_EXTERNAL_1000:
1019 	case BGE_LOOP_EXTERNAL_100:
1020 	case BGE_LOOP_EXTERNAL_10:
1021 		msg = " (external loopback selected)";
1022 		break;
1023 
1024 	case BGE_LOOP_INTERNAL_PHY:
1025 		msg = " (PHY internal loopback selected)";
1026 		break;
1027 
1028 	case BGE_LOOP_INTERNAL_MAC:
1029 		msg = " (MAC internal loopback selected)";
1030 		break;
1031 	}
1032 
1033 	/*
1034 	 * All OK; tell the caller to reprogram
1035 	 * the PHY and/or MAC for the new mode ...
1036 	 */
1037 	bgep->link_down_msg = bgep->link_up_msg = msg;
1038 	bgep->param_loop_mode = mode;
1039 	return (IOC_RESTART_ACK);
1040 }
1041 
1042 static enum ioc_reply
1043 bge_loop_ioctl(bge_t *bgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp)
1044 {
1045 	lb_info_sz_t *lbsp;
1046 	lb_property_t *lbpp;
1047 	uint32_t *lbmp;
1048 	int cmd;
1049 
1050 	_NOTE(ARGUNUSED(wq))
1051 
1052 	/*
1053 	 * Validate format of ioctl
1054 	 */
1055 	if (mp->b_cont == NULL)
1056 		return (IOC_INVAL);
1057 
1058 	cmd = iocp->ioc_cmd;
1059 	switch (cmd) {
1060 	default:
1061 		/* NOTREACHED */
1062 		bge_error(bgep, "bge_loop_ioctl: invalid cmd 0x%x", cmd);
1063 		return (IOC_INVAL);
1064 
1065 	case LB_GET_INFO_SIZE:
1066 		if (iocp->ioc_count != sizeof (lb_info_sz_t))
1067 			return (IOC_INVAL);
1068 		lbsp = (lb_info_sz_t *)mp->b_cont->b_rptr;
1069 		*lbsp = sizeof (loopmodes);
1070 		return (IOC_REPLY);
1071 
1072 	case LB_GET_INFO:
1073 		if (iocp->ioc_count != sizeof (loopmodes))
1074 			return (IOC_INVAL);
1075 		lbpp = (lb_property_t *)mp->b_cont->b_rptr;
1076 		bcopy(loopmodes, lbpp, sizeof (loopmodes));
1077 		return (IOC_REPLY);
1078 
1079 	case LB_GET_MODE:
1080 		if (iocp->ioc_count != sizeof (uint32_t))
1081 			return (IOC_INVAL);
1082 		lbmp = (uint32_t *)mp->b_cont->b_rptr;
1083 		*lbmp = bgep->param_loop_mode;
1084 		return (IOC_REPLY);
1085 
1086 	case LB_SET_MODE:
1087 		if (iocp->ioc_count != sizeof (uint32_t))
1088 			return (IOC_INVAL);
1089 		lbmp = (uint32_t *)mp->b_cont->b_rptr;
1090 		return (bge_set_loop_mode(bgep, *lbmp));
1091 	}
1092 }
1093 
1094 /*
1095  * Specific bge IOCTLs, the gld module handles the generic ones.
1096  */
1097 static void
1098 bge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp)
1099 {
1100 	bge_t *bgep = arg;
1101 	struct iocblk *iocp;
1102 	enum ioc_reply status;
1103 	boolean_t need_privilege;
1104 	int err;
1105 	int cmd;
1106 
1107 	/*
1108 	 * Validate the command before bothering with the mutex ...
1109 	 */
1110 	iocp = (struct iocblk *)mp->b_rptr;
1111 	iocp->ioc_error = 0;
1112 	need_privilege = B_TRUE;
1113 	cmd = iocp->ioc_cmd;
1114 	switch (cmd) {
1115 	default:
1116 		miocnak(wq, mp, 0, EINVAL);
1117 		return;
1118 
1119 	case BGE_MII_READ:
1120 	case BGE_MII_WRITE:
1121 	case BGE_SEE_READ:
1122 	case BGE_SEE_WRITE:
1123 	case BGE_DIAG:
1124 	case BGE_PEEK:
1125 	case BGE_POKE:
1126 	case BGE_PHY_RESET:
1127 	case BGE_SOFT_RESET:
1128 	case BGE_HARD_RESET:
1129 		break;
1130 
1131 	case LB_GET_INFO_SIZE:
1132 	case LB_GET_INFO:
1133 	case LB_GET_MODE:
1134 		need_privilege = B_FALSE;
1135 		/* FALLTHRU */
1136 	case LB_SET_MODE:
1137 		break;
1138 
1139 	case ND_GET:
1140 		need_privilege = B_FALSE;
1141 		/* FALLTHRU */
1142 	case ND_SET:
1143 		break;
1144 	}
1145 
1146 	if (need_privilege) {
1147 		/*
1148 		 * Check for specific net_config privilege on Solaris 10+.
1149 		 * Otherwise just check for root access ...
1150 		 */
1151 		if (secpolicy_net_config != NULL)
1152 			err = secpolicy_net_config(iocp->ioc_cr, B_FALSE);
1153 		else
1154 			err = drv_priv(iocp->ioc_cr);
1155 		if (err != 0) {
1156 			miocnak(wq, mp, 0, err);
1157 			return;
1158 		}
1159 	}
1160 
1161 	mutex_enter(bgep->genlock);
1162 	if (!(bgep->progress & PROGRESS_INTR)) {
1163 		/* can happen during autorecovery */
1164 		mutex_exit(bgep->genlock);
1165 		miocnak(wq, mp, 0, EIO);
1166 		return;
1167 	}
1168 
1169 	switch (cmd) {
1170 	default:
1171 		_NOTE(NOTREACHED)
1172 		status = IOC_INVAL;
1173 		break;
1174 
1175 	case BGE_MII_READ:
1176 	case BGE_MII_WRITE:
1177 	case BGE_SEE_READ:
1178 	case BGE_SEE_WRITE:
1179 	case BGE_DIAG:
1180 	case BGE_PEEK:
1181 	case BGE_POKE:
1182 	case BGE_PHY_RESET:
1183 	case BGE_SOFT_RESET:
1184 	case BGE_HARD_RESET:
1185 		status = bge_chip_ioctl(bgep, wq, mp, iocp);
1186 		break;
1187 
1188 	case LB_GET_INFO_SIZE:
1189 	case LB_GET_INFO:
1190 	case LB_GET_MODE:
1191 	case LB_SET_MODE:
1192 		status = bge_loop_ioctl(bgep, wq, mp, iocp);
1193 		break;
1194 
1195 	case ND_GET:
1196 	case ND_SET:
1197 		status = bge_nd_ioctl(bgep, wq, mp, iocp);
1198 		break;
1199 	}
1200 
1201 	/*
1202 	 * Do we need to reprogram the PHY and/or the MAC?
1203 	 * Do it now, while we still have the mutex.
1204 	 *
1205 	 * Note: update the PHY first, 'cos it controls the
1206 	 * speed/duplex parameters that the MAC code uses.
1207 	 */
1208 	switch (status) {
1209 	case IOC_RESTART_REPLY:
1210 	case IOC_RESTART_ACK:
1211 		if (bge_phys_update(bgep) != DDI_SUCCESS) {
1212 			ddi_fm_service_impact(bgep->devinfo,
1213 			    DDI_SERVICE_DEGRADED);
1214 			status = IOC_INVAL;
1215 		}
1216 #ifdef BGE_IPMI_ASF
1217 		if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) {
1218 #else
1219 		if (bge_chip_sync(bgep) == DDI_FAILURE) {
1220 #endif
1221 			ddi_fm_service_impact(bgep->devinfo,
1222 			    DDI_SERVICE_DEGRADED);
1223 			status = IOC_INVAL;
1224 		}
1225 		if (bgep->intr_type == DDI_INTR_TYPE_MSI)
1226 			bge_chip_msi_trig(bgep);
1227 		break;
1228 	}
1229 
1230 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
1231 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
1232 		status = IOC_INVAL;
1233 	}
1234 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
1235 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
1236 		status = IOC_INVAL;
1237 	}
1238 	mutex_exit(bgep->genlock);
1239 
1240 	/*
1241 	 * Finally, decide how to reply
1242 	 */
1243 	switch (status) {
1244 	default:
1245 	case IOC_INVAL:
1246 		/*
1247 		 * Error, reply with a NAK and EINVAL or the specified error
1248 		 */
1249 		miocnak(wq, mp, 0, iocp->ioc_error == 0 ?
1250 			EINVAL : iocp->ioc_error);
1251 		break;
1252 
1253 	case IOC_DONE:
1254 		/*
1255 		 * OK, reply already sent
1256 		 */
1257 		break;
1258 
1259 	case IOC_RESTART_ACK:
1260 	case IOC_ACK:
1261 		/*
1262 		 * OK, reply with an ACK
1263 		 */
1264 		miocack(wq, mp, 0, 0);
1265 		break;
1266 
1267 	case IOC_RESTART_REPLY:
1268 	case IOC_REPLY:
1269 		/*
1270 		 * OK, send prepared reply as ACK or NAK
1271 		 */
1272 		mp->b_datap->db_type = iocp->ioc_error == 0 ?
1273 			M_IOCACK : M_IOCNAK;
1274 		qreply(wq, mp);
1275 		break;
1276 	}
1277 }
1278 
1279 static void
1280 bge_m_resources(void *arg)
1281 {
1282 	bge_t *bgep = arg;
1283 	recv_ring_t *rrp;
1284 	mac_rx_fifo_t mrf;
1285 	int ring;
1286 
1287 	mutex_enter(bgep->genlock);
1288 
1289 	/*
1290 	 * Register Rx rings as resources and save mac
1291 	 * resource id for future reference
1292 	 */
1293 	mrf.mrf_type = MAC_RX_FIFO;
1294 	mrf.mrf_blank = bge_chip_blank;
1295 	mrf.mrf_arg = (void *)bgep;
1296 	mrf.mrf_normal_blank_time = bge_rx_ticks_norm;
1297 	mrf.mrf_normal_pkt_count = bge_rx_count_norm;
1298 
1299 	for (ring = 0; ring < bgep->chipid.rx_rings; ring++) {
1300 		rrp = &bgep->recv[ring];
1301 		rrp->handle = mac_resource_add(bgep->mh,
1302 		    (mac_resource_t *)&mrf);
1303 	}
1304 
1305 	mutex_exit(bgep->genlock);
1306 }
1307 
1308 /*
1309  * ========== Per-instance setup/teardown code ==========
1310  */
1311 
1312 #undef	BGE_DBG
1313 #define	BGE_DBG		BGE_DBG_INIT	/* debug flag for this code	*/
1314 
1315 /*
1316  * Utility routine to carve a slice off a chunk of allocated memory,
1317  * updating the chunk descriptor accordingly.  The size of the slice
1318  * is given by the product of the <qty> and <size> parameters.
1319  */
1320 static void
1321 bge_slice_chunk(dma_area_t *slice, dma_area_t *chunk,
1322 	uint32_t qty, uint32_t size)
1323 {
1324 	static uint32_t sequence = 0xbcd5704a;
1325 	size_t totsize;
1326 
1327 	totsize = qty*size;
1328 	ASSERT(size >= 0);
1329 	ASSERT(totsize <= chunk->alength);
1330 
1331 	*slice = *chunk;
1332 	slice->nslots = qty;
1333 	slice->size = size;
1334 	slice->alength = totsize;
1335 	slice->token = ++sequence;
1336 
1337 	chunk->mem_va = (caddr_t)chunk->mem_va + totsize;
1338 	chunk->alength -= totsize;
1339 	chunk->offset += totsize;
1340 	chunk->cookie.dmac_laddress += totsize;
1341 	chunk->cookie.dmac_size -= totsize;
1342 }
1343 
1344 /*
1345  * Initialise the specified Receive Producer (Buffer) Ring, using
1346  * the information in the <dma_area> descriptors that it contains
1347  * to set up all the other fields. This routine should be called
1348  * only once for each ring.
1349  */
1350 static void
1351 bge_init_buff_ring(bge_t *bgep, uint64_t ring)
1352 {
1353 	buff_ring_t *brp;
1354 	bge_status_t *bsp;
1355 	sw_rbd_t *srbdp;
1356 	dma_area_t pbuf;
1357 	uint32_t bufsize;
1358 	uint32_t nslots;
1359 	uint32_t slot;
1360 	uint32_t split;
1361 
1362 	static bge_regno_t nic_ring_addrs[BGE_BUFF_RINGS_MAX] = {
1363 		NIC_MEM_SHADOW_BUFF_STD,
1364 		NIC_MEM_SHADOW_BUFF_JUMBO,
1365 		NIC_MEM_SHADOW_BUFF_MINI
1366 	};
1367 	static bge_regno_t mailbox_regs[BGE_BUFF_RINGS_MAX] = {
1368 		RECV_STD_PROD_INDEX_REG,
1369 		RECV_JUMBO_PROD_INDEX_REG,
1370 		RECV_MINI_PROD_INDEX_REG
1371 	};
1372 	static bge_regno_t buff_cons_xref[BGE_BUFF_RINGS_MAX] = {
1373 		STATUS_STD_BUFF_CONS_INDEX,
1374 		STATUS_JUMBO_BUFF_CONS_INDEX,
1375 		STATUS_MINI_BUFF_CONS_INDEX
1376 	};
1377 
1378 	BGE_TRACE(("bge_init_buff_ring($%p, %d)",
1379 		(void *)bgep, ring));
1380 
1381 	brp = &bgep->buff[ring];
1382 	nslots = brp->desc.nslots;
1383 	ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT);
1384 	bufsize = brp->buf[0].size;
1385 
1386 	/*
1387 	 * Set up the copy of the h/w RCB
1388 	 *
1389 	 * Note: unlike Send & Receive Return Rings, (where the max_len
1390 	 * field holds the number of slots), in a Receive Buffer Ring
1391 	 * this field indicates the size of each buffer in the ring.
1392 	 */
1393 	brp->hw_rcb.host_ring_addr = brp->desc.cookie.dmac_laddress;
1394 	brp->hw_rcb.max_len = bufsize;
1395 	brp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
1396 	brp->hw_rcb.nic_ring_addr = nic_ring_addrs[ring];
1397 
1398 	/*
1399 	 * Other one-off initialisation of per-ring data
1400 	 */
1401 	brp->bgep = bgep;
1402 	bsp = DMA_VPTR(bgep->status_block);
1403 	brp->cons_index_p = &bsp->buff_cons_index[buff_cons_xref[ring]];
1404 	brp->chip_mbx_reg = mailbox_regs[ring];
1405 	mutex_init(brp->rf_lock, NULL, MUTEX_DRIVER,
1406 	    DDI_INTR_PRI(bgep->intr_pri));
1407 
1408 	/*
1409 	 * Allocate the array of s/w Receive Buffer Descriptors
1410 	 */
1411 	srbdp = kmem_zalloc(nslots*sizeof (*srbdp), KM_SLEEP);
1412 	brp->sw_rbds = srbdp;
1413 
1414 	/*
1415 	 * Now initialise each array element once and for all
1416 	 */
1417 	for (split = 0; split < BGE_SPLIT; ++split) {
1418 		pbuf = brp->buf[split];
1419 		for (slot = 0; slot < nslots/BGE_SPLIT; ++srbdp, ++slot)
1420 			bge_slice_chunk(&srbdp->pbuf, &pbuf, 1, bufsize);
1421 		ASSERT(pbuf.alength == 0);
1422 	}
1423 }
1424 
1425 /*
1426  * Clean up initialisation done above before the memory is freed
1427  */
1428 static void
1429 bge_fini_buff_ring(bge_t *bgep, uint64_t ring)
1430 {
1431 	buff_ring_t *brp;
1432 	sw_rbd_t *srbdp;
1433 
1434 	BGE_TRACE(("bge_fini_buff_ring($%p, %d)",
1435 		(void *)bgep, ring));
1436 
1437 	brp = &bgep->buff[ring];
1438 	srbdp = brp->sw_rbds;
1439 	kmem_free(srbdp, brp->desc.nslots*sizeof (*srbdp));
1440 
1441 	mutex_destroy(brp->rf_lock);
1442 }
1443 
1444 /*
1445  * Initialise the specified Receive (Return) Ring, using the
1446  * information in the <dma_area> descriptors that it contains
1447  * to set up all the other fields. This routine should be called
1448  * only once for each ring.
1449  */
1450 static void
1451 bge_init_recv_ring(bge_t *bgep, uint64_t ring)
1452 {
1453 	recv_ring_t *rrp;
1454 	bge_status_t *bsp;
1455 	uint32_t nslots;
1456 
1457 	BGE_TRACE(("bge_init_recv_ring($%p, %d)",
1458 		(void *)bgep, ring));
1459 
1460 	/*
1461 	 * The chip architecture requires that receive return rings have
1462 	 * 512 or 1024 or 2048 elements per ring.  See 570X-PG108-R page 103.
1463 	 */
1464 	rrp = &bgep->recv[ring];
1465 	nslots = rrp->desc.nslots;
1466 	ASSERT(nslots == 0 || nslots == 512 ||
1467 		nslots == 1024 || nslots == 2048);
1468 
1469 	/*
1470 	 * Set up the copy of the h/w RCB
1471 	 */
1472 	rrp->hw_rcb.host_ring_addr = rrp->desc.cookie.dmac_laddress;
1473 	rrp->hw_rcb.max_len = nslots;
1474 	rrp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
1475 	rrp->hw_rcb.nic_ring_addr = 0;
1476 
1477 	/*
1478 	 * Other one-off initialisation of per-ring data
1479 	 */
1480 	rrp->bgep = bgep;
1481 	bsp = DMA_VPTR(bgep->status_block);
1482 	rrp->prod_index_p = RECV_INDEX_P(bsp, ring);
1483 	rrp->chip_mbx_reg = RECV_RING_CONS_INDEX_REG(ring);
1484 	mutex_init(rrp->rx_lock, NULL, MUTEX_DRIVER,
1485 	    DDI_INTR_PRI(bgep->intr_pri));
1486 }
1487 
1488 
1489 /*
1490  * Clean up initialisation done above before the memory is freed
1491  */
1492 static void
1493 bge_fini_recv_ring(bge_t *bgep, uint64_t ring)
1494 {
1495 	recv_ring_t *rrp;
1496 
1497 	BGE_TRACE(("bge_fini_recv_ring($%p, %d)",
1498 		(void *)bgep, ring));
1499 
1500 	rrp = &bgep->recv[ring];
1501 	if (rrp->rx_softint)
1502 		ddi_remove_softintr(rrp->rx_softint);
1503 	mutex_destroy(rrp->rx_lock);
1504 }
1505 
1506 /*
1507  * Initialise the specified Send Ring, using the information in the
1508  * <dma_area> descriptors that it contains to set up all the other
1509  * fields. This routine should be called only once for each ring.
1510  */
1511 static void
1512 bge_init_send_ring(bge_t *bgep, uint64_t ring)
1513 {
1514 	send_ring_t *srp;
1515 	bge_status_t *bsp;
1516 	sw_sbd_t *ssbdp;
1517 	dma_area_t desc;
1518 	dma_area_t pbuf;
1519 	uint32_t nslots;
1520 	uint32_t slot;
1521 	uint32_t split;
1522 
1523 	BGE_TRACE(("bge_init_send_ring($%p, %d)",
1524 		(void *)bgep, ring));
1525 
1526 	/*
1527 	 * The chip architecture requires that host-based send rings
1528 	 * have 512 elements per ring.  See 570X-PG102-R page 56.
1529 	 */
1530 	srp = &bgep->send[ring];
1531 	nslots = srp->desc.nslots;
1532 	ASSERT(nslots == 0 || nslots == 512);
1533 
1534 	/*
1535 	 * Set up the copy of the h/w RCB
1536 	 */
1537 	srp->hw_rcb.host_ring_addr = srp->desc.cookie.dmac_laddress;
1538 	srp->hw_rcb.max_len = nslots;
1539 	srp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
1540 	srp->hw_rcb.nic_ring_addr = NIC_MEM_SHADOW_SEND_RING(ring, nslots);
1541 
1542 	/*
1543 	 * Other one-off initialisation of per-ring data
1544 	 */
1545 	srp->bgep = bgep;
1546 	bsp = DMA_VPTR(bgep->status_block);
1547 	srp->cons_index_p = SEND_INDEX_P(bsp, ring);
1548 	srp->chip_mbx_reg = SEND_RING_HOST_INDEX_REG(ring);
1549 	mutex_init(srp->tx_lock, NULL, MUTEX_DRIVER,
1550 	    DDI_INTR_PRI(bgep->intr_pri));
1551 	mutex_init(srp->tc_lock, NULL, MUTEX_DRIVER,
1552 	    DDI_INTR_PRI(bgep->intr_pri));
1553 
1554 	/*
1555 	 * Allocate the array of s/w Send Buffer Descriptors
1556 	 */
1557 	ssbdp = kmem_zalloc(nslots*sizeof (*ssbdp), KM_SLEEP);
1558 	srp->sw_sbds = ssbdp;
1559 
1560 	/*
1561 	 * Now initialise each array element once and for all
1562 	 */
1563 	desc = srp->desc;
1564 	for (split = 0; split < BGE_SPLIT; ++split) {
1565 		pbuf = srp->buf[split];
1566 		for (slot = 0; slot < nslots/BGE_SPLIT; ++ssbdp, ++slot) {
1567 			bge_slice_chunk(&ssbdp->desc, &desc, 1,
1568 				sizeof (bge_sbd_t));
1569 			bge_slice_chunk(&ssbdp->pbuf, &pbuf, 1,
1570 				bgep->chipid.snd_buff_size);
1571 		}
1572 		ASSERT(pbuf.alength == 0);
1573 	}
1574 	ASSERT(desc.alength == 0);
1575 }
1576 
1577 /*
1578  * Clean up initialisation done above before the memory is freed
1579  */
1580 static void
1581 bge_fini_send_ring(bge_t *bgep, uint64_t ring)
1582 {
1583 	send_ring_t *srp;
1584 	sw_sbd_t *ssbdp;
1585 
1586 	BGE_TRACE(("bge_fini_send_ring($%p, %d)",
1587 		(void *)bgep, ring));
1588 
1589 	srp = &bgep->send[ring];
1590 	ssbdp = srp->sw_sbds;
1591 	kmem_free(ssbdp, srp->desc.nslots*sizeof (*ssbdp));
1592 
1593 	mutex_destroy(srp->tx_lock);
1594 	mutex_destroy(srp->tc_lock);
1595 }
1596 
1597 /*
1598  * Initialise all transmit, receive, and buffer rings.
1599  */
1600 void
1601 bge_init_rings(bge_t *bgep)
1602 {
1603 	uint64_t ring;
1604 
1605 	BGE_TRACE(("bge_init_rings($%p)", (void *)bgep));
1606 
1607 	/*
1608 	 * Perform one-off initialisation of each ring ...
1609 	 */
1610 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
1611 		bge_init_send_ring(bgep, ring);
1612 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
1613 		bge_init_recv_ring(bgep, ring);
1614 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
1615 		bge_init_buff_ring(bgep, ring);
1616 }
1617 
1618 /*
1619  * Undo the work of bge_init_rings() above before the memory is freed
1620  */
1621 void
1622 bge_fini_rings(bge_t *bgep)
1623 {
1624 	uint64_t ring;
1625 
1626 	BGE_TRACE(("bge_fini_rings($%p)", (void *)bgep));
1627 
1628 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
1629 		bge_fini_buff_ring(bgep, ring);
1630 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
1631 		bge_fini_recv_ring(bgep, ring);
1632 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
1633 		bge_fini_send_ring(bgep, ring);
1634 }
1635 
1636 /*
1637  * Allocate an area of memory and a DMA handle for accessing it
1638  */
1639 static int
1640 bge_alloc_dma_mem(bge_t *bgep, size_t memsize, ddi_device_acc_attr_t *attr_p,
1641 	uint_t dma_flags, dma_area_t *dma_p)
1642 {
1643 	caddr_t va;
1644 	int err;
1645 
1646 	BGE_TRACE(("bge_alloc_dma_mem($%p, %ld, $%p, 0x%x, $%p)",
1647 		(void *)bgep, memsize, attr_p, dma_flags, dma_p));
1648 
1649 	/*
1650 	 * Allocate handle
1651 	 */
1652 	err = ddi_dma_alloc_handle(bgep->devinfo, &dma_attr,
1653 		DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl);
1654 	if (err != DDI_SUCCESS)
1655 		return (DDI_FAILURE);
1656 
1657 	/*
1658 	 * Allocate memory
1659 	 */
1660 	err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p,
1661 		dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING),
1662 		DDI_DMA_SLEEP, NULL, &va, &dma_p->alength, &dma_p->acc_hdl);
1663 	if (err != DDI_SUCCESS)
1664 		return (DDI_FAILURE);
1665 
1666 	/*
1667 	 * Bind the two together
1668 	 */
1669 	dma_p->mem_va = va;
1670 	err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL,
1671 		va, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL,
1672 		&dma_p->cookie, &dma_p->ncookies);
1673 
1674 	BGE_DEBUG(("bge_alloc_dma_mem(): bind %d bytes; err %d, %d cookies",
1675 		dma_p->alength, err, dma_p->ncookies));
1676 
1677 	if (err != DDI_DMA_MAPPED || dma_p->ncookies != 1)
1678 		return (DDI_FAILURE);
1679 
1680 	dma_p->nslots = ~0U;
1681 	dma_p->size = ~0U;
1682 	dma_p->token = ~0U;
1683 	dma_p->offset = 0;
1684 	return (DDI_SUCCESS);
1685 }
1686 
1687 /*
1688  * Free one allocated area of DMAable memory
1689  */
1690 static void
1691 bge_free_dma_mem(dma_area_t *dma_p)
1692 {
1693 	if (dma_p->dma_hdl != NULL) {
1694 		if (dma_p->ncookies) {
1695 			(void) ddi_dma_unbind_handle(dma_p->dma_hdl);
1696 			dma_p->ncookies = 0;
1697 		}
1698 		ddi_dma_free_handle(&dma_p->dma_hdl);
1699 		dma_p->dma_hdl = NULL;
1700 	}
1701 
1702 	if (dma_p->acc_hdl != NULL) {
1703 		ddi_dma_mem_free(&dma_p->acc_hdl);
1704 		dma_p->acc_hdl = NULL;
1705 	}
1706 }
1707 
1708 /*
1709  * This function allocates all the transmit and receive buffers
1710  * and descriptors, in four chunks (or one, if MONOLITHIC).
1711  */
1712 int
1713 bge_alloc_bufs(bge_t *bgep)
1714 {
1715 	dma_area_t area;
1716 	size_t rxbuffsize;
1717 	size_t txbuffsize;
1718 	size_t rxbuffdescsize;
1719 	size_t rxdescsize;
1720 	size_t txdescsize;
1721 	uint64_t ring;
1722 	uint64_t rx_rings = bgep->chipid.rx_rings;
1723 	uint64_t tx_rings = bgep->chipid.tx_rings;
1724 	int split;
1725 	int err;
1726 
1727 	BGE_TRACE(("bge_alloc_bufs($%p)",
1728 		(void *)bgep));
1729 
1730 	rxbuffsize = BGE_STD_SLOTS_USED*bgep->chipid.std_buf_size;
1731 	rxbuffsize += bgep->chipid.jumbo_slots*bgep->chipid.recv_jumbo_size;
1732 	rxbuffsize += BGE_MINI_SLOTS_USED*BGE_MINI_BUFF_SIZE;
1733 
1734 	txbuffsize = BGE_SEND_SLOTS_USED*bgep->chipid.snd_buff_size;
1735 	txbuffsize *= tx_rings;
1736 
1737 	rxdescsize = rx_rings*bgep->chipid.recv_slots;
1738 	rxdescsize *= sizeof (bge_rbd_t);
1739 
1740 	rxbuffdescsize = BGE_STD_SLOTS_USED;
1741 	rxbuffdescsize += bgep->chipid.jumbo_slots;
1742 	rxbuffdescsize += BGE_MINI_SLOTS_USED;
1743 	rxbuffdescsize *= sizeof (bge_rbd_t);
1744 
1745 	txdescsize = tx_rings*BGE_SEND_SLOTS_USED;
1746 	txdescsize *= sizeof (bge_sbd_t);
1747 	txdescsize += sizeof (bge_statistics_t);
1748 	txdescsize += sizeof (bge_status_t);
1749 	txdescsize += BGE_STATUS_PADDING;
1750 
1751 #if	BGE_MONOLITHIC
1752 
1753 	err = bge_alloc_dma_mem(bgep,
1754 		rxbuffsize+txbuffsize+rxbuffdescsize+rxdescsize+txdescsize,
1755 		&bge_data_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &area);
1756 	if (err != DDI_SUCCESS)
1757 		return (DDI_FAILURE);
1758 
1759 	BGE_DEBUG(("allocated range $%p-$%p (0x%lx-0x%lx)",
1760 		DMA_VPTR(area),
1761 		(caddr_t)DMA_VPTR(area)+area.alength,
1762 		area.cookie.dmac_laddress,
1763 		area.cookie.dmac_laddress+area.alength));
1764 
1765 	bge_slice_chunk(&bgep->rx_buff[0], &area, 1, rxbuffsize);
1766 	bge_slice_chunk(&bgep->tx_buff[0], &area, 1, txbuffsize);
1767 	bge_slice_chunk(&bgep->rx_desc[0], &area, 1, rxdescsize);
1768 	bge_slice_chunk(&bgep->tx_desc, &area, 1, txdescsize);
1769 
1770 #else
1771 	/*
1772 	 * Allocate memory & handles for RX buffers
1773 	 */
1774 	ASSERT((rxbuffsize % BGE_SPLIT) == 0);
1775 	for (split = 0; split < BGE_SPLIT; ++split) {
1776 		err = bge_alloc_dma_mem(bgep, rxbuffsize/BGE_SPLIT,
1777 			&bge_data_accattr, DDI_DMA_READ | BGE_DMA_MODE,
1778 			&bgep->rx_buff[split]);
1779 		if (err != DDI_SUCCESS)
1780 			return (DDI_FAILURE);
1781 	}
1782 
1783 	/*
1784 	 * Allocate memory & handles for TX buffers
1785 	 */
1786 	ASSERT((txbuffsize % BGE_SPLIT) == 0);
1787 	for (split = 0; split < BGE_SPLIT; ++split) {
1788 		err = bge_alloc_dma_mem(bgep, txbuffsize/BGE_SPLIT,
1789 			&bge_data_accattr, DDI_DMA_WRITE | BGE_DMA_MODE,
1790 			&bgep->tx_buff[split]);
1791 		if (err != DDI_SUCCESS)
1792 			return (DDI_FAILURE);
1793 	}
1794 
1795 	/*
1796 	 * Allocate memory & handles for receive return rings
1797 	 */
1798 	ASSERT((rxdescsize % rx_rings) == 0);
1799 	for (split = 0; split < rx_rings; ++split) {
1800 		err = bge_alloc_dma_mem(bgep, rxdescsize/rx_rings,
1801 			&bge_desc_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
1802 			&bgep->rx_desc[split]);
1803 		if (err != DDI_SUCCESS)
1804 			return (DDI_FAILURE);
1805 	}
1806 
1807 	/*
1808 	 * Allocate memory & handles for buffer (producer) descriptor rings
1809 	 */
1810 	err = bge_alloc_dma_mem(bgep, rxbuffdescsize, &bge_desc_accattr,
1811 		DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]);
1812 	if (err != DDI_SUCCESS)
1813 		return (DDI_FAILURE);
1814 
1815 	/*
1816 	 * Allocate memory & handles for TX descriptor rings,
1817 	 * status block, and statistics area
1818 	 */
1819 	err = bge_alloc_dma_mem(bgep, txdescsize, &bge_desc_accattr,
1820 		DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->tx_desc);
1821 	if (err != DDI_SUCCESS)
1822 		return (DDI_FAILURE);
1823 
1824 #endif	/* BGE_MONOLITHIC */
1825 
1826 	/*
1827 	 * Now carve up each of the allocated areas ...
1828 	 */
1829 	for (split = 0; split < BGE_SPLIT; ++split) {
1830 		area = bgep->rx_buff[split];
1831 		bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].buf[split],
1832 			&area, BGE_STD_SLOTS_USED/BGE_SPLIT,
1833 			bgep->chipid.std_buf_size);
1834 		bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].buf[split],
1835 			&area, bgep->chipid.jumbo_slots/BGE_SPLIT,
1836 			bgep->chipid.recv_jumbo_size);
1837 		bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].buf[split],
1838 			&area, BGE_MINI_SLOTS_USED/BGE_SPLIT,
1839 			BGE_MINI_BUFF_SIZE);
1840 		ASSERT(area.alength >= 0);
1841 	}
1842 
1843 	for (split = 0; split < BGE_SPLIT; ++split) {
1844 		area = bgep->tx_buff[split];
1845 		for (ring = 0; ring < tx_rings; ++ring)
1846 			bge_slice_chunk(&bgep->send[ring].buf[split],
1847 				&area, BGE_SEND_SLOTS_USED/BGE_SPLIT,
1848 				bgep->chipid.snd_buff_size);
1849 		for (; ring < BGE_SEND_RINGS_MAX; ++ring)
1850 			bge_slice_chunk(&bgep->send[ring].buf[split],
1851 				&area, 0/BGE_SPLIT,
1852 				bgep->chipid.snd_buff_size);
1853 		ASSERT(area.alength >= 0);
1854 	}
1855 
1856 	for (ring = 0; ring < rx_rings; ++ring)
1857 		bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring],
1858 			bgep->chipid.recv_slots, sizeof (bge_rbd_t));
1859 
1860 	area = bgep->rx_desc[rx_rings];
1861 	for (; ring < BGE_RECV_RINGS_MAX; ++ring)
1862 		bge_slice_chunk(&bgep->recv[ring].desc, &area,
1863 			0, sizeof (bge_rbd_t));
1864 	bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].desc, &area,
1865 		BGE_STD_SLOTS_USED, sizeof (bge_rbd_t));
1866 	bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].desc, &area,
1867 		bgep->chipid.jumbo_slots, sizeof (bge_rbd_t));
1868 	bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].desc, &area,
1869 		BGE_MINI_SLOTS_USED, sizeof (bge_rbd_t));
1870 	ASSERT(area.alength == 0);
1871 
1872 	area = bgep->tx_desc;
1873 	for (ring = 0; ring < tx_rings; ++ring)
1874 		bge_slice_chunk(&bgep->send[ring].desc, &area,
1875 			BGE_SEND_SLOTS_USED, sizeof (bge_sbd_t));
1876 	for (; ring < BGE_SEND_RINGS_MAX; ++ring)
1877 		bge_slice_chunk(&bgep->send[ring].desc, &area,
1878 			0, sizeof (bge_sbd_t));
1879 	bge_slice_chunk(&bgep->statistics, &area, 1, sizeof (bge_statistics_t));
1880 	bge_slice_chunk(&bgep->status_block, &area, 1, sizeof (bge_status_t));
1881 	ASSERT(area.alength == BGE_STATUS_PADDING);
1882 	DMA_ZERO(bgep->status_block);
1883 
1884 	return (DDI_SUCCESS);
1885 }
1886 
1887 /*
1888  * This routine frees the transmit and receive buffers and descriptors.
1889  * Make sure the chip is stopped before calling it!
1890  */
1891 void
1892 bge_free_bufs(bge_t *bgep)
1893 {
1894 	int split;
1895 
1896 	BGE_TRACE(("bge_free_bufs($%p)",
1897 		(void *)bgep));
1898 
1899 #if	BGE_MONOLITHIC
1900 	bge_free_dma_mem(&bgep->rx_buff[0]);
1901 #else
1902 	bge_free_dma_mem(&bgep->tx_desc);
1903 	for (split = 0; split < BGE_RECV_RINGS_SPLIT; ++split)
1904 		bge_free_dma_mem(&bgep->rx_desc[split]);
1905 	for (split = 0; split < BGE_SPLIT; ++split)
1906 		bge_free_dma_mem(&bgep->tx_buff[split]);
1907 	for (split = 0; split < BGE_SPLIT; ++split)
1908 		bge_free_dma_mem(&bgep->rx_buff[split]);
1909 #endif	/* BGE_MONOLITHIC */
1910 }
1911 
1912 /*
1913  * Determine (initial) MAC address ("BIA") to use for this interface
1914  */
1915 
1916 static void
1917 bge_find_mac_address(bge_t *bgep, chip_id_t *cidp)
1918 {
1919 	struct ether_addr sysaddr;
1920 	char propbuf[8];		/* "true" or "false", plus NUL	*/
1921 	uchar_t *bytes;
1922 	int *ints;
1923 	uint_t nelts;
1924 	int err;
1925 
1926 	BGE_TRACE(("bge_find_mac_address($%p)",
1927 		(void *)bgep));
1928 
1929 	BGE_DEBUG(("bge_find_mac_address: hw_mac_addr %012llx, => %s (%sset)",
1930 		cidp->hw_mac_addr,
1931 		ether_sprintf((void *)cidp->vendor_addr.addr),
1932 		cidp->vendor_addr.set ? "" : "not "));
1933 
1934 	/*
1935 	 * The "vendor's factory-set address" may already have
1936 	 * been extracted from the chip, but if the property
1937 	 * "local-mac-address" is set we use that instead.  It
1938 	 * will normally be set by OBP, but it could also be
1939 	 * specified in a .conf file(!)
1940 	 *
1941 	 * There doesn't seem to be a way to define byte-array
1942 	 * properties in a .conf, so we check whether it looks
1943 	 * like an array of 6 ints instead.
1944 	 *
1945 	 * Then, we check whether it looks like an array of 6
1946 	 * bytes (which it should, if OBP set it).  If we can't
1947 	 * make sense of it either way, we'll ignore it.
1948 	 */
1949 	err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, bgep->devinfo,
1950 		DDI_PROP_DONTPASS, localmac_propname, &ints, &nelts);
1951 	if (err == DDI_PROP_SUCCESS) {
1952 		if (nelts == ETHERADDRL) {
1953 			while (nelts--)
1954 				cidp->vendor_addr.addr[nelts] = ints[nelts];
1955 			cidp->vendor_addr.set = B_TRUE;
1956 		}
1957 		ddi_prop_free(ints);
1958 	}
1959 
1960 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo,
1961 		DDI_PROP_DONTPASS, localmac_propname, &bytes, &nelts);
1962 	if (err == DDI_PROP_SUCCESS) {
1963 		if (nelts == ETHERADDRL) {
1964 			while (nelts--)
1965 				cidp->vendor_addr.addr[nelts] = bytes[nelts];
1966 			cidp->vendor_addr.set = B_TRUE;
1967 		}
1968 		ddi_prop_free(bytes);
1969 	}
1970 
1971 	BGE_DEBUG(("bge_find_mac_address: +local %s (%sset)",
1972 		ether_sprintf((void *)cidp->vendor_addr.addr),
1973 		cidp->vendor_addr.set ? "" : "not "));
1974 
1975 	/*
1976 	 * Look up the OBP property "local-mac-address?".  Note that even
1977 	 * though its value is a string (which should be "true" or "false"),
1978 	 * it can't be decoded by ddi_prop_lookup_string(9F).  So, we zero
1979 	 * the buffer first and then fetch the property as an untyped array;
1980 	 * this may or may not include a final NUL, but since there will
1981 	 * always be one left at the end of the buffer we can now treat it
1982 	 * as a string anyway.
1983 	 */
1984 	nelts = sizeof (propbuf);
1985 	bzero(propbuf, nelts--);
1986 	err = ddi_getlongprop_buf(DDI_DEV_T_ANY, bgep->devinfo,
1987 		DDI_PROP_CANSLEEP, localmac_boolname, propbuf, (int *)&nelts);
1988 
1989 	/*
1990 	 * Now, if the address still isn't set from the hardware (SEEPROM)
1991 	 * or the OBP or .conf property, OR if the user has foolishly set
1992 	 * 'local-mac-address? = false', use "the system address" instead
1993 	 * (but only if it's non-null i.e. has been set from the IDPROM).
1994 	 */
1995 	if (cidp->vendor_addr.set == B_FALSE || strcmp(propbuf, "false") == 0)
1996 		if (localetheraddr(NULL, &sysaddr) != 0) {
1997 			ethaddr_copy(&sysaddr, cidp->vendor_addr.addr);
1998 			cidp->vendor_addr.set = B_TRUE;
1999 		}
2000 
2001 	BGE_DEBUG(("bge_find_mac_address: +system %s (%sset)",
2002 		ether_sprintf((void *)cidp->vendor_addr.addr),
2003 		cidp->vendor_addr.set ? "" : "not "));
2004 
2005 	/*
2006 	 * Finally(!), if there's a valid "mac-address" property (created
2007 	 * if we netbooted from this interface), we must use this instead
2008 	 * of any of the above to ensure that the NFS/install server doesn't
2009 	 * get confused by the address changing as Solaris takes over!
2010 	 */
2011 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo,
2012 		DDI_PROP_DONTPASS, macaddr_propname, &bytes, &nelts);
2013 	if (err == DDI_PROP_SUCCESS) {
2014 		if (nelts == ETHERADDRL) {
2015 			while (nelts--)
2016 				cidp->vendor_addr.addr[nelts] = bytes[nelts];
2017 			cidp->vendor_addr.set = B_TRUE;
2018 		}
2019 		ddi_prop_free(bytes);
2020 	}
2021 
2022 	BGE_DEBUG(("bge_find_mac_address: =final %s (%sset)",
2023 		ether_sprintf((void *)cidp->vendor_addr.addr),
2024 		cidp->vendor_addr.set ? "" : "not "));
2025 }
2026 
2027 
2028 /*ARGSUSED*/
2029 int
2030 bge_check_acc_handle(bge_t *bgep, ddi_acc_handle_t handle)
2031 {
2032 	ddi_fm_error_t de;
2033 
2034 	ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
2035 	ddi_fm_acc_err_clear(handle, DDI_FME_VERSION);
2036 	return (de.fme_status);
2037 }
2038 
2039 /*ARGSUSED*/
2040 int
2041 bge_check_dma_handle(bge_t *bgep, ddi_dma_handle_t handle)
2042 {
2043 	ddi_fm_error_t de;
2044 
2045 	ASSERT(bgep->progress & PROGRESS_BUFS);
2046 	ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
2047 	return (de.fme_status);
2048 }
2049 
2050 /*
2051  * The IO fault service error handling callback function
2052  */
2053 /*ARGSUSED*/
2054 static int
2055 bge_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
2056 {
2057 	/*
2058 	 * as the driver can always deal with an error in any dma or
2059 	 * access handle, we can just return the fme_status value.
2060 	 */
2061 	pci_ereport_post(dip, err, NULL);
2062 	return (err->fme_status);
2063 }
2064 
2065 static void
2066 bge_fm_init(bge_t *bgep)
2067 {
2068 	ddi_iblock_cookie_t iblk;
2069 
2070 	/* Only register with IO Fault Services if we have some capability */
2071 	if (bgep->fm_capabilities) {
2072 		bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC;
2073 		bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC;
2074 		dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
2075 
2076 		/* Register capabilities with IO Fault Services */
2077 		ddi_fm_init(bgep->devinfo, &bgep->fm_capabilities, &iblk);
2078 
2079 		/*
2080 		 * Initialize pci ereport capabilities if ereport capable
2081 		 */
2082 		if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) ||
2083 		    DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
2084 			pci_ereport_setup(bgep->devinfo);
2085 
2086 		/*
2087 		 * Register error callback if error callback capable
2088 		 */
2089 		if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
2090 			ddi_fm_handler_register(bgep->devinfo,
2091 			bge_fm_error_cb, (void*) bgep);
2092 	} else {
2093 		/*
2094 		 * These fields have to be cleared of FMA if there are no
2095 		 * FMA capabilities at runtime.
2096 		 */
2097 		bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
2098 		bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
2099 		dma_attr.dma_attr_flags = 0;
2100 	}
2101 }
2102 
2103 static void
2104 bge_fm_fini(bge_t *bgep)
2105 {
2106 	/* Only unregister FMA capabilities if we registered some */
2107 	if (bgep->fm_capabilities) {
2108 
2109 		/*
2110 		 * Release any resources allocated by pci_ereport_setup()
2111 		 */
2112 		if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) ||
2113 		    DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
2114 			pci_ereport_teardown(bgep->devinfo);
2115 
2116 		/*
2117 		 * Un-register error callback if error callback capable
2118 		 */
2119 		if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
2120 			ddi_fm_handler_unregister(bgep->devinfo);
2121 
2122 		/* Unregister from IO Fault Services */
2123 		ddi_fm_fini(bgep->devinfo);
2124 	}
2125 }
2126 
2127 static void
2128 #ifdef BGE_IPMI_ASF
2129 bge_unattach(bge_t *bgep, uint_t asf_mode)
2130 #else
2131 bge_unattach(bge_t *bgep)
2132 #endif
2133 {
2134 	BGE_TRACE(("bge_unattach($%p)",
2135 		(void *)bgep));
2136 
2137 	/*
2138 	 * Flag that no more activity may be initiated
2139 	 */
2140 	bgep->progress &= ~PROGRESS_READY;
2141 
2142 	/*
2143 	 * Quiesce the PHY and MAC (leave it reset but still powered).
2144 	 * Clean up and free all BGE data structures
2145 	 */
2146 	if (bgep->cyclic_id) {
2147 		mutex_enter(&cpu_lock);
2148 		cyclic_remove(bgep->cyclic_id);
2149 		mutex_exit(&cpu_lock);
2150 	}
2151 	if (bgep->progress & PROGRESS_KSTATS)
2152 		bge_fini_kstats(bgep);
2153 	if (bgep->progress & PROGRESS_NDD)
2154 		bge_nd_cleanup(bgep);
2155 	if (bgep->progress & PROGRESS_PHY)
2156 		bge_phys_reset(bgep);
2157 	if (bgep->progress & PROGRESS_HWINT) {
2158 		mutex_enter(bgep->genlock);
2159 #ifdef BGE_IPMI_ASF
2160 		if (bge_chip_reset(bgep, B_FALSE, asf_mode) != DDI_SUCCESS)
2161 #else
2162 		if (bge_chip_reset(bgep, B_FALSE) != DDI_SUCCESS)
2163 #endif
2164 			ddi_fm_service_impact(bgep->devinfo,
2165 			    DDI_SERVICE_UNAFFECTED);
2166 #ifdef BGE_IPMI_ASF
2167 		if (bgep->asf_enabled) {
2168 			/*
2169 			 * This register has been overlaid. We restore its
2170 			 * initial value here.
2171 			 */
2172 			bge_nic_put32(bgep, BGE_NIC_DATA_SIG_ADDR,
2173 			    BGE_NIC_DATA_SIG);
2174 		}
2175 #endif
2176 		if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK)
2177 			ddi_fm_service_impact(bgep->devinfo,
2178 			    DDI_SERVICE_UNAFFECTED);
2179 		if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
2180 			ddi_fm_service_impact(bgep->devinfo,
2181 			    DDI_SERVICE_UNAFFECTED);
2182 		mutex_exit(bgep->genlock);
2183 	}
2184 	if (bgep->progress & PROGRESS_INTR) {
2185 		bge_intr_disable(bgep);
2186 		bge_fini_rings(bgep);
2187 	}
2188 	if (bgep->progress & PROGRESS_HWINT) {
2189 		bge_rem_intrs(bgep);
2190 		rw_destroy(bgep->errlock);
2191 		mutex_destroy(bgep->softintrlock);
2192 		mutex_destroy(bgep->genlock);
2193 	}
2194 	if (bgep->progress & PROGRESS_FACTOTUM)
2195 		ddi_remove_softintr(bgep->factotum_id);
2196 	if (bgep->progress & PROGRESS_RESCHED)
2197 		ddi_remove_softintr(bgep->resched_id);
2198 	if (bgep->progress & PROGRESS_BUFS)
2199 		bge_free_bufs(bgep);
2200 	if (bgep->progress & PROGRESS_REGS)
2201 		ddi_regs_map_free(&bgep->io_handle);
2202 	if (bgep->progress & PROGRESS_CFG)
2203 		pci_config_teardown(&bgep->cfg_handle);
2204 
2205 	bge_fm_fini(bgep);
2206 
2207 	ddi_remove_minor_node(bgep->devinfo, NULL);
2208 	kmem_free(bgep, sizeof (*bgep));
2209 }
2210 
2211 static int
2212 bge_resume(dev_info_t *devinfo)
2213 {
2214 	bge_t *bgep;				/* Our private data	*/
2215 	chip_id_t *cidp;
2216 	chip_id_t chipid;
2217 
2218 	bgep = ddi_get_driver_private(devinfo);
2219 	if (bgep == NULL)
2220 		return (DDI_FAILURE);
2221 
2222 	/*
2223 	 * Refuse to resume if the data structures aren't consistent
2224 	 */
2225 	if (bgep->devinfo != devinfo)
2226 		return (DDI_FAILURE);
2227 
2228 #ifdef BGE_IPMI_ASF
2229 	/*
2230 	 * Power management hasn't been supported in BGE now. If you
2231 	 * want to implement it, please add the ASF/IPMI related
2232 	 * code here.
2233 	 */
2234 
2235 #endif
2236 
2237 	/*
2238 	 * Read chip ID & set up config space command register(s)
2239 	 * Refuse to resume if the chip has changed its identity!
2240 	 */
2241 	cidp = &bgep->chipid;
2242 	mutex_enter(bgep->genlock);
2243 	bge_chip_cfg_init(bgep, &chipid, B_FALSE);
2244 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2245 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2246 		mutex_exit(bgep->genlock);
2247 		return (DDI_FAILURE);
2248 	}
2249 	mutex_exit(bgep->genlock);
2250 	if (chipid.vendor != cidp->vendor)
2251 		return (DDI_FAILURE);
2252 	if (chipid.device != cidp->device)
2253 		return (DDI_FAILURE);
2254 	if (chipid.revision != cidp->revision)
2255 		return (DDI_FAILURE);
2256 	if (chipid.asic_rev != cidp->asic_rev)
2257 		return (DDI_FAILURE);
2258 
2259 	/*
2260 	 * All OK, reinitialise h/w & kick off GLD scheduling
2261 	 */
2262 	mutex_enter(bgep->genlock);
2263 	if (bge_restart(bgep, B_TRUE) != DDI_SUCCESS) {
2264 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
2265 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
2266 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2267 		mutex_exit(bgep->genlock);
2268 		return (DDI_FAILURE);
2269 	}
2270 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2271 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2272 		mutex_exit(bgep->genlock);
2273 		return (DDI_FAILURE);
2274 	}
2275 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
2276 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2277 		mutex_exit(bgep->genlock);
2278 		return (DDI_FAILURE);
2279 	}
2280 	mutex_exit(bgep->genlock);
2281 	return (DDI_SUCCESS);
2282 }
2283 
2284 /*
2285  * attach(9E) -- Attach a device to the system
2286  *
2287  * Called once for each board successfully probed.
2288  */
2289 static int
2290 bge_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd)
2291 {
2292 	bge_t *bgep;				/* Our private data	*/
2293 	mac_register_t *macp;
2294 	chip_id_t *cidp;
2295 	cyc_handler_t cychand;
2296 	cyc_time_t cyctime;
2297 	caddr_t regs;
2298 	int instance;
2299 	int err;
2300 	int intr_types;
2301 #ifdef BGE_IPMI_ASF
2302 	uint32_t mhcrValue;
2303 #endif
2304 
2305 	instance = ddi_get_instance(devinfo);
2306 
2307 	BGE_GTRACE(("bge_attach($%p, %d) instance %d",
2308 		(void *)devinfo, cmd, instance));
2309 	BGE_BRKPT(NULL, "bge_attach");
2310 
2311 	switch (cmd) {
2312 	default:
2313 		return (DDI_FAILURE);
2314 
2315 	case DDI_RESUME:
2316 		return (bge_resume(devinfo));
2317 
2318 	case DDI_ATTACH:
2319 		break;
2320 	}
2321 
2322 	bgep = kmem_zalloc(sizeof (*bgep), KM_SLEEP);
2323 	ddi_set_driver_private(devinfo, bgep);
2324 	bgep->bge_guard = BGE_GUARD;
2325 	bgep->devinfo = devinfo;
2326 
2327 	/*
2328 	 * Initialize more fields in BGE private data
2329 	 */
2330 	bgep->debug = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2331 		DDI_PROP_DONTPASS, debug_propname, bge_debug);
2332 	(void) snprintf(bgep->ifname, sizeof (bgep->ifname), "%s%d",
2333 		BGE_DRIVER_NAME, instance);
2334 
2335 	/*
2336 	 * Initialize for fma support
2337 	 */
2338 	bgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2339 	    DDI_PROP_DONTPASS, fm_cap,
2340 	    DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE |
2341 	    DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE);
2342 	BGE_DEBUG(("bgep->fm_capabilities = %d", bgep->fm_capabilities));
2343 	bge_fm_init(bgep);
2344 
2345 	/*
2346 	 * Look up the IOMMU's page size for DVMA mappings (must be
2347 	 * a power of 2) and convert to a mask.  This can be used to
2348 	 * determine whether a message buffer crosses a page boundary.
2349 	 * Note: in 2s complement binary notation, if X is a power of
2350 	 * 2, then -X has the representation "11...1100...00".
2351 	 */
2352 	bgep->pagemask = dvma_pagesize(devinfo);
2353 	ASSERT(ddi_ffs(bgep->pagemask) == ddi_fls(bgep->pagemask));
2354 	bgep->pagemask = -bgep->pagemask;
2355 
2356 	/*
2357 	 * Map config space registers
2358 	 * Read chip ID & set up config space command register(s)
2359 	 *
2360 	 * Note: this leaves the chip accessible by Memory Space
2361 	 * accesses, but with interrupts and Bus Mastering off.
2362 	 * This should ensure that nothing untoward will happen
2363 	 * if it has been left active by the (net-)bootloader.
2364 	 * We'll re-enable Bus Mastering once we've reset the chip,
2365 	 * and allow interrupts only when everything else is set up.
2366 	 */
2367 	err = pci_config_setup(devinfo, &bgep->cfg_handle);
2368 #ifdef BGE_IPMI_ASF
2369 	mhcrValue = pci_config_get32(bgep->cfg_handle, PCI_CONF_BGE_MHCR);
2370 	if (mhcrValue & MHCR_ENABLE_ENDIAN_WORD_SWAP) {
2371 		bgep->asf_wordswapped = B_TRUE;
2372 	} else {
2373 		bgep->asf_wordswapped = B_FALSE;
2374 	}
2375 	bge_asf_get_config(bgep);
2376 #endif
2377 	if (err != DDI_SUCCESS) {
2378 		bge_problem(bgep, "pci_config_setup() failed");
2379 		goto attach_fail;
2380 	}
2381 	bgep->progress |= PROGRESS_CFG;
2382 	cidp = &bgep->chipid;
2383 	bzero(cidp, sizeof (*cidp));
2384 	bge_chip_cfg_init(bgep, cidp, B_FALSE);
2385 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2386 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2387 		goto attach_fail;
2388 	}
2389 
2390 #ifdef BGE_IPMI_ASF
2391 	if (DEVICE_5721_SERIES_CHIPSETS(bgep) ||
2392 	    DEVICE_5714_SERIES_CHIPSETS(bgep)) {
2393 		bgep->asf_newhandshake = B_TRUE;
2394 	} else {
2395 		bgep->asf_newhandshake = B_FALSE;
2396 	}
2397 #endif
2398 
2399 	/*
2400 	 * Update those parts of the chip ID derived from volatile
2401 	 * registers with the values seen by OBP (in case the chip
2402 	 * has been reset externally and therefore lost them).
2403 	 */
2404 	cidp->subven = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2405 		DDI_PROP_DONTPASS, subven_propname, cidp->subven);
2406 	cidp->subdev = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2407 		DDI_PROP_DONTPASS, subdev_propname, cidp->subdev);
2408 	cidp->clsize = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2409 		DDI_PROP_DONTPASS, clsize_propname, cidp->clsize);
2410 	cidp->latency = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2411 		DDI_PROP_DONTPASS, latency_propname, cidp->latency);
2412 	cidp->rx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2413 		DDI_PROP_DONTPASS, rxrings_propname, cidp->rx_rings);
2414 	cidp->tx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2415 		DDI_PROP_DONTPASS, txrings_propname, cidp->tx_rings);
2416 
2417 	if (bge_jumbo_enable == B_TRUE) {
2418 		cidp->default_mtu = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2419 			DDI_PROP_DONTPASS, default_mtu, BGE_DEFAULT_MTU);
2420 		if ((cidp->default_mtu < BGE_DEFAULT_MTU)||
2421 			(cidp->default_mtu > BGE_MAXIMUM_MTU)) {
2422 			cidp->default_mtu = BGE_DEFAULT_MTU;
2423 		}
2424 	}
2425 	/*
2426 	 * Map operating registers
2427 	 */
2428 	err = ddi_regs_map_setup(devinfo, BGE_PCI_OPREGS_RNUMBER,
2429 		&regs, 0, 0, &bge_reg_accattr, &bgep->io_handle);
2430 	if (err != DDI_SUCCESS) {
2431 		bge_problem(bgep, "ddi_regs_map_setup() failed");
2432 		goto attach_fail;
2433 	}
2434 	bgep->io_regs = regs;
2435 	bgep->progress |= PROGRESS_REGS;
2436 
2437 	/*
2438 	 * Characterise the device, so we know its requirements.
2439 	 * Then allocate the appropriate TX and RX descriptors & buffers.
2440 	 */
2441 	if (bge_chip_id_init(bgep) == EIO) {
2442 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2443 		goto attach_fail;
2444 	}
2445 	err = bge_alloc_bufs(bgep);
2446 	if (err != DDI_SUCCESS) {
2447 		bge_problem(bgep, "DMA buffer allocation failed");
2448 		goto attach_fail;
2449 	}
2450 	bgep->progress |= PROGRESS_BUFS;
2451 
2452 	/*
2453 	 * Add the softint handlers:
2454 	 *
2455 	 * Both of these handlers are used to avoid restrictions on the
2456 	 * context and/or mutexes required for some operations.  In
2457 	 * particular, the hardware interrupt handler and its subfunctions
2458 	 * can detect a number of conditions that we don't want to handle
2459 	 * in that context or with that set of mutexes held.  So, these
2460 	 * softints are triggered instead:
2461 	 *
2462 	 * the <resched> softint is triggered if we have previously
2463 	 * had to refuse to send a packet because of resource shortage
2464 	 * (we've run out of transmit buffers), but the send completion
2465 	 * interrupt handler has now detected that more buffers have
2466 	 * become available.
2467 	 *
2468 	 * the <factotum> is triggered if the h/w interrupt handler
2469 	 * sees the <link state changed> or <error> bits in the status
2470 	 * block.  It's also triggered periodically to poll the link
2471 	 * state, just in case we aren't getting link status change
2472 	 * interrupts ...
2473 	 */
2474 	err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->resched_id,
2475 		NULL, NULL, bge_reschedule, (caddr_t)bgep);
2476 	if (err != DDI_SUCCESS) {
2477 		bge_problem(bgep, "ddi_add_softintr() failed");
2478 		goto attach_fail;
2479 	}
2480 	bgep->progress |= PROGRESS_RESCHED;
2481 	err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->factotum_id,
2482 		NULL, NULL, bge_chip_factotum, (caddr_t)bgep);
2483 	if (err != DDI_SUCCESS) {
2484 		bge_problem(bgep, "ddi_add_softintr() failed");
2485 		goto attach_fail;
2486 	}
2487 	bgep->progress |= PROGRESS_FACTOTUM;
2488 
2489 	/* Get supported interrupt types */
2490 	if (ddi_intr_get_supported_types(devinfo, &intr_types) != DDI_SUCCESS) {
2491 		bge_error(bgep, "ddi_intr_get_supported_types failed\n");
2492 
2493 		goto attach_fail;
2494 	}
2495 
2496 	bge_log(bgep, "ddi_intr_get_supported_types() returned: %x",
2497 	    intr_types);
2498 
2499 	if ((intr_types & DDI_INTR_TYPE_MSI) && bgep->chipid.msi_enabled) {
2500 		if (bge_add_intrs(bgep, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) {
2501 			bge_error(bgep, "MSI registration failed, "
2502 			    "trying FIXED interrupt type\n");
2503 		} else {
2504 			bge_log(bgep, "Using MSI interrupt type\n");
2505 
2506 			bgep->intr_type = DDI_INTR_TYPE_MSI;
2507 			bgep->progress |= PROGRESS_HWINT;
2508 		}
2509 	}
2510 
2511 	if (!(bgep->progress & PROGRESS_HWINT) &&
2512 	    (intr_types & DDI_INTR_TYPE_FIXED)) {
2513 		if (bge_add_intrs(bgep, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) {
2514 			bge_error(bgep, "FIXED interrupt "
2515 			    "registration failed\n");
2516 			goto attach_fail;
2517 		}
2518 
2519 		bge_log(bgep, "Using FIXED interrupt type\n");
2520 
2521 		bgep->intr_type = DDI_INTR_TYPE_FIXED;
2522 		bgep->progress |= PROGRESS_HWINT;
2523 	}
2524 
2525 	if (!(bgep->progress & PROGRESS_HWINT)) {
2526 		bge_error(bgep, "No interrupts registered\n");
2527 		goto attach_fail;
2528 	}
2529 
2530 	/*
2531 	 * Note that interrupts are not enabled yet as
2532 	 * mutex locks are not initialized. Initialize mutex locks.
2533 	 */
2534 	mutex_init(bgep->genlock, NULL, MUTEX_DRIVER,
2535 	    DDI_INTR_PRI(bgep->intr_pri));
2536 	mutex_init(bgep->softintrlock, NULL, MUTEX_DRIVER,
2537 	    DDI_INTR_PRI(bgep->intr_pri));
2538 	rw_init(bgep->errlock, NULL, RW_DRIVER,
2539 	    DDI_INTR_PRI(bgep->intr_pri));
2540 
2541 	/*
2542 	 * Initialize rings.
2543 	 */
2544 	bge_init_rings(bgep);
2545 
2546 	/*
2547 	 * Now that mutex locks are initialized, enable interrupts.
2548 	 */
2549 	bge_intr_enable(bgep);
2550 	bgep->progress |= PROGRESS_INTR;
2551 
2552 	/*
2553 	 * Initialise link state variables
2554 	 * Stop, reset & reinitialise the chip.
2555 	 * Initialise the (internal) PHY.
2556 	 */
2557 	bgep->link_state = LINK_STATE_UNKNOWN;
2558 	bgep->link_up_msg = bgep->link_down_msg = " (initialized)";
2559 
2560 	mutex_enter(bgep->genlock);
2561 
2562 	/*
2563 	 * Reset chip & rings to initial state; also reset address
2564 	 * filtering, promiscuity, loopback mode.
2565 	 */
2566 #ifdef BGE_IPMI_ASF
2567 	if (bge_reset(bgep, ASF_MODE_SHUTDOWN) != DDI_SUCCESS) {
2568 #else
2569 	if (bge_reset(bgep) != DDI_SUCCESS) {
2570 #endif
2571 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
2572 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
2573 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2574 		mutex_exit(bgep->genlock);
2575 		goto attach_fail;
2576 	}
2577 
2578 	bzero(bgep->mcast_hash, sizeof (bgep->mcast_hash));
2579 	bzero(bgep->mcast_refs, sizeof (bgep->mcast_refs));
2580 	bgep->promisc = B_FALSE;
2581 	bgep->param_loop_mode = BGE_LOOP_NONE;
2582 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2583 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2584 		mutex_exit(bgep->genlock);
2585 		goto attach_fail;
2586 	}
2587 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
2588 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2589 		mutex_exit(bgep->genlock);
2590 		goto attach_fail;
2591 	}
2592 
2593 	mutex_exit(bgep->genlock);
2594 
2595 	if (bge_phys_init(bgep) == EIO) {
2596 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2597 		goto attach_fail;
2598 	}
2599 	bgep->progress |= PROGRESS_PHY;
2600 
2601 	/*
2602 	 * Register NDD-tweakable parameters
2603 	 */
2604 	if (bge_nd_init(bgep)) {
2605 		bge_problem(bgep, "bge_nd_init() failed");
2606 		goto attach_fail;
2607 	}
2608 	bgep->progress |= PROGRESS_NDD;
2609 
2610 	/*
2611 	 * Create & initialise named kstats
2612 	 */
2613 	bge_init_kstats(bgep, instance);
2614 	bgep->progress |= PROGRESS_KSTATS;
2615 
2616 	/*
2617 	 * Determine whether to override the chip's own MAC address
2618 	 */
2619 	bge_find_mac_address(bgep, cidp);
2620 	ethaddr_copy(cidp->vendor_addr.addr, bgep->curr_addr[0].addr);
2621 	bgep->curr_addr[0].set = B_TRUE;
2622 
2623 	bgep->unicst_addr_avail = MAC_ADDRESS_REGS_MAX - 1;
2624 	bgep->unicst_addr_total = MAC_ADDRESS_REGS_MAX - 1;
2625 
2626 	if ((macp = mac_alloc(MAC_VERSION)) == NULL)
2627 		goto attach_fail;
2628 	macp->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
2629 	macp->m_driver = bgep;
2630 	macp->m_dip = devinfo;
2631 	macp->m_src_addr = bgep->curr_addr[0].addr;
2632 	macp->m_callbacks = &bge_m_callbacks;
2633 	macp->m_min_sdu = 0;
2634 	macp->m_max_sdu = cidp->ethmax_size - sizeof (struct ether_header);
2635 	/*
2636 	 * Finally, we're ready to register ourselves with the MAC layer
2637 	 * interface; if this succeeds, we're all ready to start()
2638 	 */
2639 	err = mac_register(macp, &bgep->mh);
2640 	mac_free(macp);
2641 	if (err != 0)
2642 		goto attach_fail;
2643 
2644 	cychand.cyh_func = bge_chip_cyclic;
2645 	cychand.cyh_arg = bgep;
2646 	cychand.cyh_level = CY_LOCK_LEVEL;
2647 	cyctime.cyt_when = 0;
2648 	cyctime.cyt_interval = BGE_CYCLIC_PERIOD;
2649 	mutex_enter(&cpu_lock);
2650 	bgep->cyclic_id = cyclic_add(&cychand, &cyctime);
2651 	mutex_exit(&cpu_lock);
2652 
2653 	bgep->progress |= PROGRESS_READY;
2654 	ASSERT(bgep->bge_guard == BGE_GUARD);
2655 	return (DDI_SUCCESS);
2656 
2657 attach_fail:
2658 #ifdef BGE_IPMI_ASF
2659 	bge_unattach(bgep, ASF_MODE_NONE);
2660 #else
2661 	bge_unattach(bgep);
2662 #endif
2663 	return (DDI_FAILURE);
2664 }
2665 
2666 /*
2667  *	bge_suspend() -- suspend transmit/receive for powerdown
2668  */
2669 static int
2670 bge_suspend(bge_t *bgep)
2671 {
2672 	/*
2673 	 * Stop processing and idle (powerdown) the PHY ...
2674 	 */
2675 	mutex_enter(bgep->genlock);
2676 #ifdef BGE_IPMI_ASF
2677 	/*
2678 	 * Power management hasn't been supported in BGE now. If you
2679 	 * want to implement it, please add the ASF/IPMI related
2680 	 * code here.
2681 	 */
2682 #endif
2683 	bge_stop(bgep);
2684 	if (bge_phys_idle(bgep) != DDI_SUCCESS) {
2685 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
2686 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
2687 		mutex_exit(bgep->genlock);
2688 		return (DDI_FAILURE);
2689 	}
2690 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
2691 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
2692 		mutex_exit(bgep->genlock);
2693 		return (DDI_FAILURE);
2694 	}
2695 	mutex_exit(bgep->genlock);
2696 
2697 	return (DDI_SUCCESS);
2698 }
2699 
2700 /*
2701  * detach(9E) -- Detach a device from the system
2702  */
2703 static int
2704 bge_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd)
2705 {
2706 	bge_t *bgep;
2707 #ifdef BGE_IPMI_ASF
2708 	uint_t asf_mode;
2709 	asf_mode = ASF_MODE_NONE;
2710 #endif
2711 
2712 	BGE_GTRACE(("bge_detach($%p, %d)", (void *)devinfo, cmd));
2713 
2714 	bgep = ddi_get_driver_private(devinfo);
2715 
2716 	switch (cmd) {
2717 	default:
2718 		return (DDI_FAILURE);
2719 
2720 	case DDI_SUSPEND:
2721 		return (bge_suspend(bgep));
2722 
2723 	case DDI_DETACH:
2724 		break;
2725 	}
2726 
2727 #ifdef BGE_IPMI_ASF
2728 	mutex_enter(bgep->genlock);
2729 	if (bgep->asf_enabled && (bgep->asf_status == ASF_STAT_RUN)) {
2730 
2731 		bge_asf_update_status(bgep);
2732 		bge_asf_stop_timer(bgep);
2733 		bgep->asf_status = ASF_STAT_STOP;
2734 
2735 		bge_asf_pre_reset_operations(bgep, BGE_SHUTDOWN_RESET);
2736 
2737 		if (bgep->asf_pseudostop) {
2738 			bgep->link_up_msg = bgep->link_down_msg = " (stopped)";
2739 			bge_chip_stop(bgep, B_FALSE);
2740 			bgep->bge_mac_state = BGE_MAC_STOPPED;
2741 			bgep->asf_pseudostop = B_FALSE;
2742 		}
2743 
2744 		asf_mode = ASF_MODE_POST_SHUTDOWN;
2745 
2746 		if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK)
2747 			ddi_fm_service_impact(bgep->devinfo,
2748 			    DDI_SERVICE_UNAFFECTED);
2749 		if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
2750 			ddi_fm_service_impact(bgep->devinfo,
2751 			    DDI_SERVICE_UNAFFECTED);
2752 	}
2753 	mutex_exit(bgep->genlock);
2754 #endif
2755 
2756 	/*
2757 	 * Unregister from the GLD subsystem.  This can fail, in
2758 	 * particular if there are DLPI style-2 streams still open -
2759 	 * in which case we just return failure without shutting
2760 	 * down chip operations.
2761 	 */
2762 	if (mac_unregister(bgep->mh) != 0)
2763 		return (DDI_FAILURE);
2764 
2765 	/*
2766 	 * All activity stopped, so we can clean up & exit
2767 	 */
2768 #ifdef BGE_IPMI_ASF
2769 	bge_unattach(bgep, asf_mode);
2770 #else
2771 	bge_unattach(bgep);
2772 #endif
2773 	return (DDI_SUCCESS);
2774 }
2775 
2776 
2777 /*
2778  * ========== Module Loading Data & Entry Points ==========
2779  */
2780 
2781 #undef	BGE_DBG
2782 #define	BGE_DBG		BGE_DBG_INIT	/* debug flag for this code	*/
2783 
2784 DDI_DEFINE_STREAM_OPS(bge_dev_ops, nulldev, nulldev, bge_attach, bge_detach,
2785     nodev, NULL, D_MP, NULL);
2786 
2787 static struct modldrv bge_modldrv = {
2788 	&mod_driverops,		/* Type of module.  This one is a driver */
2789 	bge_ident,		/* short description */
2790 	&bge_dev_ops		/* driver specific ops */
2791 };
2792 
2793 static struct modlinkage modlinkage = {
2794 	MODREV_1, (void *)&bge_modldrv, NULL
2795 };
2796 
2797 
2798 int
2799 _info(struct modinfo *modinfop)
2800 {
2801 	return (mod_info(&modlinkage, modinfop));
2802 }
2803 
2804 int
2805 _init(void)
2806 {
2807 	int status;
2808 
2809 	mac_init_ops(&bge_dev_ops, "bge");
2810 	status = mod_install(&modlinkage);
2811 	if (status == DDI_SUCCESS)
2812 		mutex_init(bge_log_mutex, NULL, MUTEX_DRIVER, NULL);
2813 	else
2814 		mac_fini_ops(&bge_dev_ops);
2815 	return (status);
2816 }
2817 
2818 int
2819 _fini(void)
2820 {
2821 	int status;
2822 
2823 	status = mod_remove(&modlinkage);
2824 	if (status == DDI_SUCCESS) {
2825 		mac_fini_ops(&bge_dev_ops);
2826 		mutex_destroy(bge_log_mutex);
2827 	}
2828 	return (status);
2829 }
2830 
2831 
2832 /*
2833  * bge_add_intrs:
2834  *
2835  * Register FIXED or MSI interrupts.
2836  */
2837 static int
2838 bge_add_intrs(bge_t *bgep, int	intr_type)
2839 {
2840 	dev_info_t	*dip = bgep->devinfo;
2841 	int		avail, actual, intr_size, count = 0;
2842 	int		i, flag, ret;
2843 
2844 	bge_log(bgep, "bge_add_intrs: interrupt type 0x%x\n", intr_type);
2845 
2846 	/* Get number of interrupts */
2847 	ret = ddi_intr_get_nintrs(dip, intr_type, &count);
2848 	if ((ret != DDI_SUCCESS) || (count == 0)) {
2849 		bge_error(bgep, "ddi_intr_get_nintrs() failure, ret: %d, "
2850 		    "count: %d", ret, count);
2851 
2852 		return (DDI_FAILURE);
2853 	}
2854 
2855 	/* Get number of available interrupts */
2856 	ret = ddi_intr_get_navail(dip, intr_type, &avail);
2857 	if ((ret != DDI_SUCCESS) || (avail == 0)) {
2858 		bge_error(bgep, "ddi_intr_get_navail() failure, "
2859 		    "ret: %d, avail: %d\n", ret, avail);
2860 
2861 		return (DDI_FAILURE);
2862 	}
2863 
2864 	if (avail < count) {
2865 		bge_log(bgep, "nitrs() returned %d, navail returned %d\n",
2866 		    count, avail);
2867 	}
2868 
2869 	/*
2870 	 * BGE hardware generates only single MSI even though it claims
2871 	 * to support multiple MSIs. So, hard code MSI count value to 1.
2872 	 */
2873 	if (intr_type == DDI_INTR_TYPE_MSI) {
2874 		count = 1;
2875 		flag = DDI_INTR_ALLOC_STRICT;
2876 	} else {
2877 		flag = DDI_INTR_ALLOC_NORMAL;
2878 	}
2879 
2880 	/* Allocate an array of interrupt handles */
2881 	intr_size = count * sizeof (ddi_intr_handle_t);
2882 	bgep->htable = kmem_alloc(intr_size, KM_SLEEP);
2883 
2884 	/* Call ddi_intr_alloc() */
2885 	ret = ddi_intr_alloc(dip, bgep->htable, intr_type, 0,
2886 	    count, &actual, flag);
2887 
2888 	if ((ret != DDI_SUCCESS) || (actual == 0)) {
2889 		bge_error(bgep, "ddi_intr_alloc() failed %d\n", ret);
2890 
2891 		kmem_free(bgep->htable, intr_size);
2892 		return (DDI_FAILURE);
2893 	}
2894 
2895 	if (actual < count) {
2896 		bge_log(bgep, "Requested: %d, Received: %d\n", count, actual);
2897 	}
2898 
2899 	bgep->intr_cnt = actual;
2900 
2901 	/*
2902 	 * Get priority for first msi, assume remaining are all the same
2903 	 */
2904 	if ((ret = ddi_intr_get_pri(bgep->htable[0], &bgep->intr_pri)) !=
2905 	    DDI_SUCCESS) {
2906 		bge_error(bgep, "ddi_intr_get_pri() failed %d\n", ret);
2907 
2908 		/* Free already allocated intr */
2909 		for (i = 0; i < actual; i++) {
2910 			(void) ddi_intr_free(bgep->htable[i]);
2911 		}
2912 
2913 		kmem_free(bgep->htable, intr_size);
2914 		return (DDI_FAILURE);
2915 	}
2916 
2917 	/* Call ddi_intr_add_handler() */
2918 	for (i = 0; i < actual; i++) {
2919 		if ((ret = ddi_intr_add_handler(bgep->htable[i], bge_intr,
2920 		    (caddr_t)bgep, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) {
2921 			bge_error(bgep, "ddi_intr_add_handler() "
2922 			    "failed %d\n", ret);
2923 
2924 			/* Free already allocated intr */
2925 			for (i = 0; i < actual; i++) {
2926 				(void) ddi_intr_free(bgep->htable[i]);
2927 			}
2928 
2929 			kmem_free(bgep->htable, intr_size);
2930 			return (DDI_FAILURE);
2931 		}
2932 	}
2933 
2934 	if ((ret = ddi_intr_get_cap(bgep->htable[0], &bgep->intr_cap))
2935 		!= DDI_SUCCESS) {
2936 		bge_error(bgep, "ddi_intr_get_cap() failed %d\n", ret);
2937 
2938 		for (i = 0; i < actual; i++) {
2939 			(void) ddi_intr_remove_handler(bgep->htable[i]);
2940 			(void) ddi_intr_free(bgep->htable[i]);
2941 		}
2942 
2943 		kmem_free(bgep->htable, intr_size);
2944 		return (DDI_FAILURE);
2945 	}
2946 
2947 	return (DDI_SUCCESS);
2948 }
2949 
2950 /*
2951  * bge_rem_intrs:
2952  *
2953  * Unregister FIXED or MSI interrupts
2954  */
2955 static void
2956 bge_rem_intrs(bge_t *bgep)
2957 {
2958 	int	i;
2959 
2960 	bge_log(bgep, "bge_rem_intrs\n");
2961 
2962 	/* Call ddi_intr_remove_handler() */
2963 	for (i = 0; i < bgep->intr_cnt; i++) {
2964 		(void) ddi_intr_remove_handler(bgep->htable[i]);
2965 		(void) ddi_intr_free(bgep->htable[i]);
2966 	}
2967 
2968 	kmem_free(bgep->htable, bgep->intr_cnt * sizeof (ddi_intr_handle_t));
2969 }
2970 
2971 
2972 void
2973 bge_intr_enable(bge_t *bgep)
2974 {
2975 	int i;
2976 
2977 	if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) {
2978 		/* Call ddi_intr_block_enable() for MSI interrupts */
2979 		(void) ddi_intr_block_enable(bgep->htable, bgep->intr_cnt);
2980 	} else {
2981 		/* Call ddi_intr_enable for MSI or FIXED interrupts */
2982 		for (i = 0; i < bgep->intr_cnt; i++) {
2983 			(void) ddi_intr_enable(bgep->htable[i]);
2984 		}
2985 	}
2986 }
2987 
2988 
2989 void
2990 bge_intr_disable(bge_t *bgep)
2991 {
2992 	int i;
2993 
2994 	if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) {
2995 		/* Call ddi_intr_block_disable() */
2996 		(void) ddi_intr_block_disable(bgep->htable, bgep->intr_cnt);
2997 	} else {
2998 		for (i = 0; i < bgep->intr_cnt; i++) {
2999 			(void) ddi_intr_disable(bgep->htable[i]);
3000 		}
3001 	}
3002 }
3003