19113a79cSeschrock /* 29113a79cSeschrock * CDDL HEADER START 39113a79cSeschrock * 49113a79cSeschrock * The contents of this file are subject to the terms of the 59113a79cSeschrock * Common Development and Distribution License (the "License"). 69113a79cSeschrock * You may not use this file except in compliance with the License. 79113a79cSeschrock * 89113a79cSeschrock * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 99113a79cSeschrock * or http://www.opensolaris.org/os/licensing. 109113a79cSeschrock * See the License for the specific language governing permissions 119113a79cSeschrock * and limitations under the License. 129113a79cSeschrock * 139113a79cSeschrock * When distributing Covered Code, include this CDDL HEADER in each 149113a79cSeschrock * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 159113a79cSeschrock * If applicable, add the following below this CDDL HEADER, with the 169113a79cSeschrock * fields enclosed by brackets "[]" replaced with your own identifying 179113a79cSeschrock * information: Portions Copyright [yyyy] [name of copyright owner] 189113a79cSeschrock * 199113a79cSeschrock * CDDL HEADER END 209113a79cSeschrock */ 219113a79cSeschrock /* 22*2eeaed14Srobj * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 239113a79cSeschrock * Use is subject to license terms. 249113a79cSeschrock */ 259113a79cSeschrock 269113a79cSeschrock #ifndef _LIBIPMI_H 279113a79cSeschrock #define _LIBIPMI_H 289113a79cSeschrock 299113a79cSeschrock #pragma ident "%Z%%M% %I% %E% SMI" 309113a79cSeschrock 319113a79cSeschrock #include <sys/bmc_intf.h> 329113a79cSeschrock #include <sys/byteorder.h> 332c32020fSeschrock #include <sys/sysmacros.h> 349113a79cSeschrock 359113a79cSeschrock /* 369113a79cSeschrock * Private interfaces for communicating with attached services over IPMI. This 379113a79cSeschrock * library is designed for system software communicating with Sun-supported 389113a79cSeschrock * service processors over /dev/bmc. It is not a generic IPMI library. 399113a79cSeschrock * 409113a79cSeschrock * Documentation references refer to "Intelligent Platform Management Interface 419113a79cSeschrock * Specification Second Generation v2.0", document revision 1.0 with Februrary 429113a79cSeschrock * 15, 2006 Markup from "IPMI v2.0 Addenda, Errata, and Clarifications Revision 439113a79cSeschrock * 3". 449113a79cSeschrock */ 459113a79cSeschrock 469113a79cSeschrock #ifdef __cplusplus 479113a79cSeschrock extern "C" { 489113a79cSeschrock #endif 499113a79cSeschrock 509113a79cSeschrock typedef struct ipmi_handle ipmi_handle_t; 519113a79cSeschrock 529113a79cSeschrock #pragma pack(1) 539113a79cSeschrock 549113a79cSeschrock /* 559113a79cSeschrock * Basic netfn definitions. See section 5.1. 569113a79cSeschrock */ 579113a79cSeschrock #define IPMI_NETFN_APP BMC_NETFN_APP 589113a79cSeschrock #define IPMI_NETFN_STORAGE BMC_NETFN_STORAGE 599113a79cSeschrock #define IPMI_NETFN_SE BMC_NETFN_SE 609113a79cSeschrock #define IPMI_NETFN_OEM 0x2e 619113a79cSeschrock 629113a79cSeschrock /* 639113a79cSeschrock * Error definitions 649113a79cSeschrock */ 659113a79cSeschrock #define EIPMI_BASE 2000 669113a79cSeschrock 67*2eeaed14Srobj typedef enum { 689113a79cSeschrock EIPMI_NOMEM = EIPMI_BASE, /* memory allocation failure */ 699113a79cSeschrock EIPMI_BMC_OPEN_FAILED, /* failed to open /dev/bmc */ 70*2eeaed14Srobj EIPMI_BMC_PUTMSG, /* failed to send message to /dev/bmc */ 71*2eeaed14Srobj EIPMI_BMC_GETMSG, /* failed to read response from /dev/bmc */ 729113a79cSeschrock EIPMI_BMC_RESPONSE, /* response from /dev/bmc failed */ 739113a79cSeschrock EIPMI_INVALID_COMMAND, /* invalid command */ 749113a79cSeschrock EIPMI_COMMAND_TIMEOUT, /* command timeout */ 759113a79cSeschrock EIPMI_DATA_LENGTH_EXCEEDED, /* maximum data length exceeded */ 769113a79cSeschrock EIPMI_SEND_FAILED, /* failed to send BMC request */ 77*2eeaed14Srobj EIPMI_UNSPECIFIED, /* unspecified BMC error */ 789113a79cSeschrock EIPMI_UNKNOWN, /* unknown error */ 799113a79cSeschrock EIPMI_BAD_RESPONSE, /* received unexpected response */ 809113a79cSeschrock EIPMI_BAD_RESPONSE_LENGTH, /* unexpected response length */ 81*2eeaed14Srobj EIPMI_INVALID_RESERVATION, /* invalid or cancelled reservation */ 829113a79cSeschrock EIPMI_NOT_PRESENT, /* requested entity not present */ 83*2eeaed14Srobj EIPMI_INVALID_REQUEST, /* malformed request data */ 84*2eeaed14Srobj EIPMI_BUSY, /* service processor is busy */ 85*2eeaed14Srobj EIPMI_NOSPACE, /* service processor is out of space */ 86*2eeaed14Srobj EIPMI_UNAVAILABLE, /* service processor is unavailable */ 879113a79cSeschrock EIPMI_ACCESS /* insufficient privileges */ 88*2eeaed14Srobj } ipmi_errno_t; 899113a79cSeschrock 909113a79cSeschrock /* 919113a79cSeschrock * Basic library functions. 929113a79cSeschrock * 939113a79cSeschrock * The ipmi_handle is the primary interface to the library. The library itself 949113a79cSeschrock * is not MT-safe, but it is safe within a single handle. Multithreaded clients 959113a79cSeschrock * should either open multiple handles, or otherwise synchronize access to the 969113a79cSeschrock * same handle. 979113a79cSeschrock * 989113a79cSeschrock * There is a single command response buffer that is stored with the handle, to 999113a79cSeschrock * simplify memory management in the caller. The memory referenced by a command 1009113a79cSeschrock * response is only valid until the next command is issued. The caller is 1019113a79cSeschrock * responsible for making a copy of the response if it is needed. 1029113a79cSeschrock */ 1039113a79cSeschrock extern ipmi_handle_t *ipmi_open(int *, char **); 1049113a79cSeschrock extern void ipmi_close(ipmi_handle_t *); 1059113a79cSeschrock 1069113a79cSeschrock extern int ipmi_errno(ipmi_handle_t *); 1079113a79cSeschrock extern const char *ipmi_errmsg(ipmi_handle_t *); 1089113a79cSeschrock 1099113a79cSeschrock /* 1109113a79cSeschrock * Raw requests. See section 5. 1119113a79cSeschrock */ 1129113a79cSeschrock typedef struct ipmi_cmd { 1139113a79cSeschrock uint8_t ic_netfn:6; 1149113a79cSeschrock uint8_t ic_lun:2; 1159113a79cSeschrock uint8_t ic_cmd; 1169113a79cSeschrock uint16_t ic_dlen; 1179113a79cSeschrock void *ic_data; 1189113a79cSeschrock } ipmi_cmd_t; 1199113a79cSeschrock 1209113a79cSeschrock extern ipmi_cmd_t *ipmi_send(ipmi_handle_t *, ipmi_cmd_t *); 1219113a79cSeschrock 1229113a79cSeschrock /* 1239113a79cSeschrock * Retrieve basic information about the IPMI device. See section 20.1 "Get 1249113a79cSeschrock * Device ID Command". 1259113a79cSeschrock */ 1269113a79cSeschrock #define IPMI_CMD_GET_DEVICEID 0x01 1279113a79cSeschrock 1289113a79cSeschrock typedef struct ipmi_deviceid { 1299113a79cSeschrock uint8_t id_devid; 1302c32020fSeschrock DECL_BITFIELD3( 1312c32020fSeschrock id_dev_rev :4, 1322c32020fSeschrock __reserved :3, 1332c32020fSeschrock id_dev_sdrs :1); 1342c32020fSeschrock DECL_BITFIELD2( 1352c32020fSeschrock id_firm_major :7, 1362c32020fSeschrock id_dev_available :1); 1379113a79cSeschrock uint8_t id_firm_minor; 1389113a79cSeschrock uint8_t id_ipmi_rev; 1399113a79cSeschrock uint8_t id_dev_support; 1409113a79cSeschrock uint8_t id_manufacturer[3]; 1419113a79cSeschrock uint16_t id_product; 1429113a79cSeschrock } ipmi_deviceid_t; 1439113a79cSeschrock 1449113a79cSeschrock #define IPMI_OEM_SUN 0x2a 145*2eeaed14Srobj #define IPMI_PROD_SUN_ILOM 0x4701 1469113a79cSeschrock 1479113a79cSeschrock ipmi_deviceid_t *ipmi_get_deviceid(ipmi_handle_t *); 1489113a79cSeschrock 1499113a79cSeschrock #define ipmi_devid_manufacturer(dp) \ 1509113a79cSeschrock ((dp)->id_manufacturer[0] | \ 1519113a79cSeschrock ((dp)->id_manufacturer[1] << 8) | \ 1529113a79cSeschrock ((dp)->id_manufacturer[2] << 16)) 1539113a79cSeschrock 154*2eeaed14Srobj const char *ipmi_firmware_version(ipmi_handle_t *); 155*2eeaed14Srobj 156*2eeaed14Srobj /* 157*2eeaed14Srobj * SEL (System Event Log) commands. Currently the library only provides 158*2eeaed14Srobj * commands for reading the SEL. 159*2eeaed14Srobj */ 160*2eeaed14Srobj 161*2eeaed14Srobj /* 162*2eeaed14Srobj * 31.2 Get SEL Info Command 163*2eeaed14Srobj */ 164*2eeaed14Srobj #define IPMI_CMD_GET_SEL_INFO 0x40 165*2eeaed14Srobj 166*2eeaed14Srobj typedef struct ipmi_sel_info { 167*2eeaed14Srobj uint8_t isel_version; 168*2eeaed14Srobj uint16_t isel_entries; 169*2eeaed14Srobj uint16_t isel_free; 170*2eeaed14Srobj uint32_t isel_add_ts; 171*2eeaed14Srobj uint32_t isel_erase_ts; 172*2eeaed14Srobj DECL_BITFIELD6( 173*2eeaed14Srobj isel_supp_allocation :1, 174*2eeaed14Srobj isel_supp_reserve :1, 175*2eeaed14Srobj isel_supp_partial :1, 176*2eeaed14Srobj isel_supp_delete :1, 177*2eeaed14Srobj __reserved :3, 178*2eeaed14Srobj isel_overflow :1); 179*2eeaed14Srobj } ipmi_sel_info_t; 180*2eeaed14Srobj 181*2eeaed14Srobj extern ipmi_sel_info_t *ipmi_sel_get_info(ipmi_handle_t *); 182*2eeaed14Srobj extern boolean_t ipmi_sdr_changed(ipmi_handle_t *); 183*2eeaed14Srobj extern int ipmi_sdr_refresh(ipmi_handle_t *); 184*2eeaed14Srobj 185*2eeaed14Srobj /* 186*2eeaed14Srobj * 32.1 SEL Event Records 187*2eeaed14Srobj */ 188*2eeaed14Srobj typedef struct ipmi_sel_event { 189*2eeaed14Srobj uint16_t isel_ev_next; 190*2eeaed14Srobj uint16_t isel_ev_recid; 191*2eeaed14Srobj uint8_t isel_ev_rectype; 192*2eeaed14Srobj uint32_t isel_ev_ts; 193*2eeaed14Srobj DECL_BITFIELD2( 194*2eeaed14Srobj isel_ev_software :1, 195*2eeaed14Srobj isel_ev_addr_or_id :7); 196*2eeaed14Srobj DECL_BITFIELD3( 197*2eeaed14Srobj isel_ev_lun :2, 198*2eeaed14Srobj __reserved :2, 199*2eeaed14Srobj isel_ev_channel :4); 200*2eeaed14Srobj uint8_t isel_ev_rev; 201*2eeaed14Srobj uint8_t isel_ev_sensor_type; 202*2eeaed14Srobj uint8_t isel_ev_sensor_number; 203*2eeaed14Srobj DECL_BITFIELD2( 204*2eeaed14Srobj isel_ev_type :7, 205*2eeaed14Srobj isel_ev_dir :1); 206*2eeaed14Srobj uint8_t isel_ev_data[3]; 207*2eeaed14Srobj } ipmi_sel_event_t; 208*2eeaed14Srobj 209*2eeaed14Srobj #define IPMI_EV_REV15 0x04 210*2eeaed14Srobj #define IPMI_EV_REV1 0x03 211*2eeaed14Srobj 212*2eeaed14Srobj #define IPMI_SEL_SYSTEM 0x02 213*2eeaed14Srobj #define IPMI_SEL_OEMTS_LO 0xC0 214*2eeaed14Srobj #define IPMI_SEL_OEMTS_HI 0xDF 215*2eeaed14Srobj #define IPMI_SEL_OEM_LO 0xE0 216*2eeaed14Srobj #define IPMI_SEL_OEM_HI 0xFF 217*2eeaed14Srobj 218*2eeaed14Srobj #define IPMI_EV_ASSERT 0x0 219*2eeaed14Srobj #define IPMI_EV_DEASSERT 0x1 220*2eeaed14Srobj 221*2eeaed14Srobj /* 222*2eeaed14Srobj * 32.2 OEM SEL Record (with timestamp) 223*2eeaed14Srobj */ 224*2eeaed14Srobj typedef struct ipmi_sel_oem_ts { 225*2eeaed14Srobj uint16_t isel_oem_next; 226*2eeaed14Srobj uint16_t isel_oem_id; 227*2eeaed14Srobj uint8_t isel_oem_type; 228*2eeaed14Srobj uint32_t isel_oem_ts; 229*2eeaed14Srobj uint8_t isel_oem_devid[3]; 230*2eeaed14Srobj uint8_t isel_oem_data[6]; 231*2eeaed14Srobj } ipmi_sel_oem_ts_t; 232*2eeaed14Srobj 233*2eeaed14Srobj /* 234*2eeaed14Srobj * 32.3 OEM SEL Record (no timestamp) 235*2eeaed14Srobj */ 236*2eeaed14Srobj typedef struct ipmi_sel_oem { 237*2eeaed14Srobj uint16_t isel_oem_next; 238*2eeaed14Srobj uint16_t isel_oem_id; 239*2eeaed14Srobj uint8_t isel_oem_type; 240*2eeaed14Srobj uint8_t isel_oem_data[13]; 241*2eeaed14Srobj } ipmi_sel_oem_t; 242*2eeaed14Srobj 243*2eeaed14Srobj /* 244*2eeaed14Srobj * 29.7 Event Data Field Formats. Consumers can cast the data field of the 245*2eeaed14Srobj * event record to the appropriate type depending on the sensor class. 246*2eeaed14Srobj */ 247*2eeaed14Srobj 248*2eeaed14Srobj typedef struct ipmi_event_threshold { 249*2eeaed14Srobj DECL_BITFIELD3( 250*2eeaed14Srobj iev_offset :4, 251*2eeaed14Srobj iev_desc_byte3 :2, 252*2eeaed14Srobj iev_desc_byte2 :2); 253*2eeaed14Srobj uint8_t iev_reading; 254*2eeaed14Srobj uint8_t iev_threshold; 255*2eeaed14Srobj } ipmi_event_threshold_t; 256*2eeaed14Srobj 257*2eeaed14Srobj #define IPMI_EV_DESC_UNSPECIFIED 0x00 258*2eeaed14Srobj #define IPMI_EV_DESC_TRIGGER 0x01 259*2eeaed14Srobj #define IPMI_EV_DESC_OEM 0x02 260*2eeaed14Srobj #define IPMI_EV_DESC_SPECIFIC 0x03 261*2eeaed14Srobj 262*2eeaed14Srobj typedef struct ipmi_event_discrete { 263*2eeaed14Srobj DECL_BITFIELD3( 264*2eeaed14Srobj iev_offset :4, 265*2eeaed14Srobj iev_desc_byte3 :2, 266*2eeaed14Srobj iev_desc_byte2 :2); 267*2eeaed14Srobj DECL_BITFIELD2( 268*2eeaed14Srobj iev_offset_type :4, 269*2eeaed14Srobj iev_offset_severity :4); 270*2eeaed14Srobj uint8_t iev_oem_code; 271*2eeaed14Srobj } ipmi_event_discrete_t; 272*2eeaed14Srobj 273*2eeaed14Srobj #define IPMI_EV_DESC_PREVSTATE 0x01 274*2eeaed14Srobj #define IPMI_EV_DESC_SPECIFIC 0x03 275*2eeaed14Srobj 276*2eeaed14Srobj typedef struct ipmi_event_oem { 277*2eeaed14Srobj DECL_BITFIELD3( 278*2eeaed14Srobj iev_offset :4, 279*2eeaed14Srobj iev_desc_byte3 :2, 280*2eeaed14Srobj iev_desc_byte2 :2); 281*2eeaed14Srobj DECL_BITFIELD2( 282*2eeaed14Srobj iev_offset_type :4, 283*2eeaed14Srobj iev_offset_severity :4); 284*2eeaed14Srobj uint8_t iev_oem_code; 285*2eeaed14Srobj } ipmi_event_oem_t; 286*2eeaed14Srobj 287*2eeaed14Srobj /* 288*2eeaed14Srobj * Get SEL Entry Command. See section 31.5. We don't support partial reads, so 289*2eeaed14Srobj * this interface is quite a bit simpler than in the spec. We default to 290*2eeaed14Srobj * returning event records, though the consumer should check the type field and 291*2eeaed14Srobj * cast it to the appropriate type if it is no IPMI_SEL_SYSTEM. 292*2eeaed14Srobj */ 293*2eeaed14Srobj #define IPMI_CMD_GET_SEL_ENTRY 0x43 294*2eeaed14Srobj 295*2eeaed14Srobj extern ipmi_sel_event_t *ipmi_sel_get_entry(ipmi_handle_t *, uint16_t); 296*2eeaed14Srobj 297*2eeaed14Srobj #define IPMI_SEL_FIRST_ENTRY 0x0000 298*2eeaed14Srobj #define IPMI_SEL_LAST_ENTRY 0xFFFF 299*2eeaed14Srobj 300*2eeaed14Srobj /* 301*2eeaed14Srobj * SEL time management. See sections 31.10 and 31.11. 302*2eeaed14Srobj */ 303*2eeaed14Srobj #define IPMI_CMD_GET_SEL_TIME 0x48 304*2eeaed14Srobj #define IPMI_CMD_SET_SEL_TIME 0x49 305*2eeaed14Srobj #define IPMI_CMD_GET_SEL_UTC_OFFSET 0x5C 306*2eeaed14Srobj #define IPMI_CMD_SET_SEL_UTC_OFFSET 0x5D 307*2eeaed14Srobj 308*2eeaed14Srobj extern int ipmi_sel_get_time(ipmi_handle_t *, uint32_t *); 309*2eeaed14Srobj extern int ipmi_sel_set_time(ipmi_handle_t *, uint32_t); 310*2eeaed14Srobj extern int ipmi_sel_get_utc_offset(ipmi_handle_t *, int *); 311*2eeaed14Srobj extern int ipmi_sel_set_utc_offset(ipmi_handle_t *, int); 312*2eeaed14Srobj 3139113a79cSeschrock /* 3149113a79cSeschrock * SDR (Sensor Device Record) requests. A cache of the current SDR repository 315*2eeaed14Srobj * is kept as part of the IPMI handle and updated when necessary. This does the 316*2eeaed14Srobj * work of processing the SDR names and providing an easy way to lookup 317*2eeaed14Srobj * individual records and iterate over all records. 3189113a79cSeschrock */ 3199113a79cSeschrock 3209113a79cSeschrock /* 321*2eeaed14Srobj * Get SDR Repository Info Command. See section 33.9. 322*2eeaed14Srobj */ 323*2eeaed14Srobj #define IPMI_CMD_GET_SDR_INFO 0x20 324*2eeaed14Srobj 325*2eeaed14Srobj typedef struct ipmi_sdr_info { 326*2eeaed14Srobj uint8_t isi_version; 327*2eeaed14Srobj uint16_t isi_record_count; 328*2eeaed14Srobj uint16_t isi_free_space; 329*2eeaed14Srobj uint32_t isi_add_ts; 330*2eeaed14Srobj uint32_t isi_erase_ts; 331*2eeaed14Srobj DECL_BITFIELD7( 332*2eeaed14Srobj isi_supp_allocation :1, 333*2eeaed14Srobj isi_supp_reserve :1, 334*2eeaed14Srobj isi_supp_partial :1, 335*2eeaed14Srobj isi_supp_delete :1, 336*2eeaed14Srobj __reserved :1, 337*2eeaed14Srobj isi_modal :2, 338*2eeaed14Srobj isi_overflow :1); 339*2eeaed14Srobj } ipmi_sdr_info_t; 340*2eeaed14Srobj 341*2eeaed14Srobj extern ipmi_sdr_info_t *ipmi_sdr_get_info(ipmi_handle_t *); 342*2eeaed14Srobj 343*2eeaed14Srobj /* 3449113a79cSeschrock * Reserve repository command. See section 33.11. 3459113a79cSeschrock */ 3469113a79cSeschrock #define IPMI_CMD_RESERVE_SDR_REPOSITORY 0x22 3479113a79cSeschrock 3489113a79cSeschrock /* 3499113a79cSeschrock * Get SDR command. See section 33.12. This command accesses the raw SDR 3509113a79cSeschrock * repository. Clients can also use the lookup functions to retrieve a 3519113a79cSeschrock * particular SDR record by name. 3529113a79cSeschrock * 3539113a79cSeschrock * The list of possible types is indicated in the sub-chapters of section 43. 3549113a79cSeschrock */ 3559113a79cSeschrock typedef struct ipmi_sdr { 3569113a79cSeschrock uint16_t is_id; 3579113a79cSeschrock uint8_t is_version; 3589113a79cSeschrock uint8_t is_type; 3599113a79cSeschrock uint8_t is_length; 3609113a79cSeschrock uint8_t is_record[1]; 3619113a79cSeschrock } ipmi_sdr_t; 3629113a79cSeschrock #define IPMI_CMD_GET_SDR 0x23 3639113a79cSeschrock 3649113a79cSeschrock #define IPMI_SDR_FIRST 0x0000 3659113a79cSeschrock #define IPMI_SDR_LAST 0xFFFF 3669113a79cSeschrock 3679113a79cSeschrock extern ipmi_sdr_t *ipmi_sdr_get(ipmi_handle_t *, uint16_t, uint16_t *); 3689113a79cSeschrock 3699113a79cSeschrock /* 370*2eeaed14Srobj * Full Sensor Record. See 43.1 371*2eeaed14Srobj */ 372*2eeaed14Srobj #define IPMI_SDR_TYPE_FULL_SENSOR 0x01 373*2eeaed14Srobj 374*2eeaed14Srobj typedef struct ipmi_sdr_full_sensor { 375*2eeaed14Srobj /* RECORD KEY BYTES */ 376*2eeaed14Srobj uint8_t is_fs_owner; 377*2eeaed14Srobj DECL_BITFIELD3( 378*2eeaed14Srobj is_fs_sensor_lun :2, 379*2eeaed14Srobj __reserved1 :2, 380*2eeaed14Srobj is_fs_channel :4); 381*2eeaed14Srobj uint8_t is_fs_number; 382*2eeaed14Srobj /* RECORD BODY BYTES */ 383*2eeaed14Srobj uint8_t is_fs_entity_id; 384*2eeaed14Srobj DECL_BITFIELD2( 385*2eeaed14Srobj is_fs_entity_instance :7, 386*2eeaed14Srobj is_fs_entity_logical :1); 387*2eeaed14Srobj DECL_BITFIELD8( 388*2eeaed14Srobj is_fs_sensor_scanning_enabled :1, 389*2eeaed14Srobj is_fs_event_generation_enabled :1, 390*2eeaed14Srobj is_fs_init_sensor_type :1, 391*2eeaed14Srobj is_fs_init_hysteresis :1, 392*2eeaed14Srobj is_fs_init_thresholds :1, 393*2eeaed14Srobj is_fs_init_events :1, 394*2eeaed14Srobj is_fs_init_scanning :1, 395*2eeaed14Srobj is_fs_settable :1); 396*2eeaed14Srobj DECL_BITFIELD5( 397*2eeaed14Srobj is_fs_event_support :2, 398*2eeaed14Srobj is_fs_threshold_support :2, 399*2eeaed14Srobj is_fs_hysteresis_support :2, 400*2eeaed14Srobj is_fs_rearm_support :1, 401*2eeaed14Srobj is_fs_ignore :1); 402*2eeaed14Srobj uint8_t is_fs_type; 403*2eeaed14Srobj uint8_t is_fs_reading_type; 404*2eeaed14Srobj uint16_t is_fs_assert_mask; 405*2eeaed14Srobj uint16_t is_fs_deassert_mask; 406*2eeaed14Srobj uint16_t is_fs_reading_mask; 407*2eeaed14Srobj DECL_BITFIELD4( 408*2eeaed14Srobj is_fs_units_isprcnt :1, 409*2eeaed14Srobj is_fs_mod_unit :2, 410*2eeaed14Srobj is_fs_rate_unit :3, 411*2eeaed14Srobj is_fs_analog_fmt :2); 412*2eeaed14Srobj uint8_t is_fs_unit2; 413*2eeaed14Srobj uint8_t is_fs_unit3; 414*2eeaed14Srobj /* Linearization */ 415*2eeaed14Srobj DECL_BITFIELD2( 416*2eeaed14Srobj is_fs_sensor_linear_type :7, 417*2eeaed14Srobj __reserved2 :1); 418*2eeaed14Srobj /* M, Tolerance */ 419*2eeaed14Srobj uint16_t is_fs_mtol; 420*2eeaed14Srobj /* B, Accuracy, R exp, B exp */ 421*2eeaed14Srobj uint32_t is_fs_bacc; 422*2eeaed14Srobj DECL_BITFIELD4( 423*2eeaed14Srobj is_fs_nominal_reading_spec :1, 424*2eeaed14Srobj is_fs_normal_max_spec :1, 425*2eeaed14Srobj is_fs_normal_min_spec :1, 426*2eeaed14Srobj __reserved3 :5); 427*2eeaed14Srobj uint8_t is_fs_nominal_reading; 428*2eeaed14Srobj uint8_t is_fs_normal_maximum; 429*2eeaed14Srobj uint8_t is_fs_normal_minimum; 430*2eeaed14Srobj uint8_t is_fs_max; 431*2eeaed14Srobj uint8_t is_fs_min; 432*2eeaed14Srobj uint8_t is_fs_upper_nonrecov; 433*2eeaed14Srobj uint8_t is_fs_upper_critical; 434*2eeaed14Srobj uint8_t is_fs_upper_noncrit; 435*2eeaed14Srobj uint8_t is_fs_lower_nonrecov; 436*2eeaed14Srobj uint8_t is_fs_lower_critical; 437*2eeaed14Srobj uint8_t is_fs_lower_noncrit; 438*2eeaed14Srobj uint8_t is_fs_hysteresis_positive; 439*2eeaed14Srobj uint8_t is_fs_hysteresis_negative; 440*2eeaed14Srobj uint16_t __reserved4; 441*2eeaed14Srobj uint8_t is_fs_oem; 442*2eeaed14Srobj DECL_BITFIELD3( 443*2eeaed14Srobj is_fs_idlen :5, 444*2eeaed14Srobj __reserved5 :1, 445*2eeaed14Srobj is_fs_idtype :2); 446*2eeaed14Srobj char is_fs_idstring[1]; 447*2eeaed14Srobj } ipmi_sdr_full_sensor_t; 448*2eeaed14Srobj 449*2eeaed14Srobj #define IPMI_SDR_TYPE_COMPACT_SENSOR 0x02 450*2eeaed14Srobj 451*2eeaed14Srobj /* 452*2eeaed14Srobj * Compact Sensor Record. See section 43.2 453*2eeaed14Srobj */ 454*2eeaed14Srobj typedef struct ipmi_sdr_compact_sensor { 455*2eeaed14Srobj /* RECORD KEY BYTES */ 456*2eeaed14Srobj uint8_t is_cs_owner; 457*2eeaed14Srobj DECL_BITFIELD3( 458*2eeaed14Srobj is_cs_sensor_lun :2, 459*2eeaed14Srobj is_cs_fru_lun :2, 460*2eeaed14Srobj is_cs_channel :4); 461*2eeaed14Srobj uint8_t is_cs_number; 462*2eeaed14Srobj /* RECORD BODY BYTES */ 463*2eeaed14Srobj uint8_t is_cs_entity_id; 464*2eeaed14Srobj DECL_BITFIELD2( 465*2eeaed14Srobj is_cs_entity_instance :7, 466*2eeaed14Srobj is_cs_entity_logical :1); 467*2eeaed14Srobj DECL_BITFIELD8( 468*2eeaed14Srobj is_cs_sensor_scanning_enabled :1, 469*2eeaed14Srobj is_cs_event_generation_enabled :1, 470*2eeaed14Srobj is_cs_init_sensor_type :1, 471*2eeaed14Srobj is_cs_init_hysteresis :1, 472*2eeaed14Srobj __reserved1 :1, 473*2eeaed14Srobj is_cs_init_events :1, 474*2eeaed14Srobj is_cs_init_scanning :1, 475*2eeaed14Srobj is_cs_settable :1); 476*2eeaed14Srobj DECL_BITFIELD5( 477*2eeaed14Srobj is_cs_event_support :2, 478*2eeaed14Srobj is_cs_threshold_support :2, 479*2eeaed14Srobj is_cs_hysteresis_support :2, 480*2eeaed14Srobj is_cs_rearm_support :1, 481*2eeaed14Srobj is_cs_ignore :1); 482*2eeaed14Srobj uint8_t is_cs_type; 483*2eeaed14Srobj uint8_t is_cs_reading_type; 484*2eeaed14Srobj uint16_t is_cs_assert_mask; 485*2eeaed14Srobj uint16_t is_cs_deassert_mask; 486*2eeaed14Srobj uint16_t is_cs_reading_mask; 487*2eeaed14Srobj DECL_BITFIELD4( 488*2eeaed14Srobj is_cs_units_isprcnt :1, 489*2eeaed14Srobj is_cs_mod_unit :2, 490*2eeaed14Srobj is_cs_rate_unit :3, 491*2eeaed14Srobj __reserved2 :2); 492*2eeaed14Srobj uint8_t is_cs_unit2; 493*2eeaed14Srobj uint8_t is_cs_unit3; 494*2eeaed14Srobj DECL_BITFIELD3( 495*2eeaed14Srobj is_cs_share_count :4, 496*2eeaed14Srobj is_cs_modifier_type :2, 497*2eeaed14Srobj is_cs_direction :2); 498*2eeaed14Srobj DECL_BITFIELD2( 499*2eeaed14Srobj is_cs_modifier_offset :7, 500*2eeaed14Srobj is_cs_sharing :1); 501*2eeaed14Srobj uint8_t is_cs_hysteresis_positive; 502*2eeaed14Srobj uint8_t is_cs_hysteresis_negative; 503*2eeaed14Srobj uint16_t __reserved3; 504*2eeaed14Srobj uint8_t __reserved4; 505*2eeaed14Srobj uint8_t is_cs_oem; 506*2eeaed14Srobj DECL_BITFIELD3( 507*2eeaed14Srobj is_cs_idlen :5, 508*2eeaed14Srobj __reserved5 :1, 509*2eeaed14Srobj is_cs_idtype :2); 510*2eeaed14Srobj char is_cs_idstring[1]; 511*2eeaed14Srobj } ipmi_sdr_compact_sensor_t; 512*2eeaed14Srobj 513*2eeaed14Srobj /* 514*2eeaed14Srobj * Threshold sensor masks for is_cs_assert_mask and is_cs_deassert_mask. 515*2eeaed14Srobj */ 516*2eeaed14Srobj #define IPMI_SENSOR_RETURN_NONRECOV 0x4000 517*2eeaed14Srobj #define IPMI_SENSOR_RETURN_CRIT 0x2000 518*2eeaed14Srobj #define IPMI_SENSOR_RETURN_NONCRIT 0x1000 519*2eeaed14Srobj 520*2eeaed14Srobj #define IPMI_SENSOR_MASK_UPPER_NONRECOV_HI 0x0800 521*2eeaed14Srobj #define IPMI_SENSOR_MASK_UPPER_NONRECOV_LO 0x0400 522*2eeaed14Srobj #define IPMI_SENSOR_MASK_UPPER_CRIT_HI 0x0200 523*2eeaed14Srobj #define IPMI_SENSOR_MASK_UPPER_CRIT_LO 0x0100 524*2eeaed14Srobj #define IPMI_SENSOR_MASK_UPPER_NONCRIT_HI 0x0080 525*2eeaed14Srobj #define IPMI_SENSOR_MASK_UPPER_NONCRIT_LO 0x0040 526*2eeaed14Srobj #define IPMI_SENSOR_MASK_LOWER_NONRECOV_HI 0x0020 527*2eeaed14Srobj #define IPMI_SENSOR_MASK_LOWER_NONRECOV_LO 0x0010 528*2eeaed14Srobj #define IPMI_SENSOR_MASK_LOWER_CRIT_HI 0x0008 529*2eeaed14Srobj #define IPMI_SENSOR_MASK_LOWER_CRIT_LO 0x0004 530*2eeaed14Srobj #define IPMI_SENSOR_MASK_LOWER_NONCRIT_HI 0x0002 531*2eeaed14Srobj #define IPMI_SENSOR_MASK_LOWER_NONCRIT_LO 0x0001 532*2eeaed14Srobj 533*2eeaed14Srobj /* 534*2eeaed14Srobj * Threshold sensor masks for is_cs_reading_mask. 535*2eeaed14Srobj */ 536*2eeaed14Srobj #define IPMI_SENSOR_SETTABLE_UPPER_NONRECOV 0x2000 537*2eeaed14Srobj #define IPMI_SENSOR_SETTABLE_UPPER_CRIT 0x1000 538*2eeaed14Srobj #define IPMI_SENSOR_SETTABLE_UPPER_NONCRIT 0x0800 539*2eeaed14Srobj #define IPMI_SENSOR_SETTABLE_LOWER_NONRECOV 0x0400 540*2eeaed14Srobj #define IPMI_SENSOR_SETTABLE_LOWER_CRIT 0x0200 541*2eeaed14Srobj #define IPMI_SENSOR_SETTABLE_LOWER_NONCRIT 0x0100 542*2eeaed14Srobj #define IPMI_SENSOR_READABLE_UPPER_NONRECOV 0x0020 543*2eeaed14Srobj #define IPMI_SENSOR_READABLE_UPPER_CRIT 0x0010 544*2eeaed14Srobj #define IPMI_SENSOR_READABLE_UPPER_NONCRIT 0x0008 545*2eeaed14Srobj #define IPMI_SENSOR_READABLE_LOWER_NONRECOV 0x0004 546*2eeaed14Srobj #define IPMI_SENSOR_READABLE_LOWER_CRIT 0x0002 547*2eeaed14Srobj #define IPMI_SENSOR_READABLE_LOWER_NONCRIT 0x0001 548*2eeaed14Srobj 549*2eeaed14Srobj /* 550*2eeaed14Srobj * Values for is_cs_reading_type. See table 42-2. 551*2eeaed14Srobj */ 552*2eeaed14Srobj #define IPMI_RT_THRESHOLD 0x01 553*2eeaed14Srobj #define IPMI_RT_USAGE 0x02 554*2eeaed14Srobj #define IPMI_RT_STATE 0x03 555*2eeaed14Srobj #define IPMI_RT_PREDFAIL 0x04 556*2eeaed14Srobj #define IPMI_RT_LIMIT 0x05 557*2eeaed14Srobj #define IPMI_RT_PERFORMANCE 0x06 558*2eeaed14Srobj #define IPMI_RT_SEVERITY 0x07 559*2eeaed14Srobj #define IPMI_RT_PRESENT 0x08 560*2eeaed14Srobj #define IPMI_RT_ENABLED 0x09 561*2eeaed14Srobj #define IPMI_RT_AVAILABILITY 0x0A 562*2eeaed14Srobj #define IPMI_RT_REDUNDANCY 0x0B 563*2eeaed14Srobj #define IPMI_RT_ACPI 0x0C 564*2eeaed14Srobj #define IPMI_RT_SPECIFIC 0x6F 565*2eeaed14Srobj 566*2eeaed14Srobj /* 567*2eeaed14Srobj * Bitmasks based on above reading types. See table 42-2 568*2eeaed14Srobj */ 569*2eeaed14Srobj #define IPMI_SR_THRESHOLD_LOWER_NONCRIT_LOW 0x0001 570*2eeaed14Srobj #define IPMI_SR_THRESHOLD_LOWER_NONCRIT_HIGH 0x0002 571*2eeaed14Srobj #define IPMI_SR_THRESHOLD_LOWER_CRIT_LOW 0x0004 572*2eeaed14Srobj #define IPMI_SR_THRESHOLD_LOWER_CRIT_HIGH 0x0008 573*2eeaed14Srobj #define IPMI_SR_THRESHOLD_LOWER_NONRECOV_LOW 0x0010 574*2eeaed14Srobj #define IPMI_SR_THRESHOLD_LOWER_NONRECOV_HIGH 0x0020 575*2eeaed14Srobj #define IPMI_SR_THRESHOLD_UPPER_NONCRIT_LOW 0x0040 576*2eeaed14Srobj #define IPMI_SR_THRESHOLD_UPPER_NONCRIT_HIGH 0x0080 577*2eeaed14Srobj #define IPMI_SR_THRESHOLD_UPPER_CRIT_LOW 0x0100 578*2eeaed14Srobj #define IPMI_SR_THRESHOLD_UPPER_CRIT_HIGH 0x0200 579*2eeaed14Srobj #define IPMI_SR_THRESHOLD_UPPER_NONRECOV_LOW 0x0400 580*2eeaed14Srobj #define IPMI_SR_THRESHOLD_UPPER_NONRECOV_HIGH 0x0800 581*2eeaed14Srobj 582*2eeaed14Srobj #define IPMI_SR_USAGE_IDLE 0x0001 583*2eeaed14Srobj #define IPMI_SR_USAGE_ACTIVE 0x0002 584*2eeaed14Srobj #define IPMI_SR_USAGE_BUSY 0x0004 585*2eeaed14Srobj 586*2eeaed14Srobj #define IPMI_SR_STATE_DEASSERT 0x0001 587*2eeaed14Srobj #define IPMI_SR_STATE_ASSERT 0x0002 588*2eeaed14Srobj 589*2eeaed14Srobj #define IPMI_SR_PREDFAIL_DEASSERT 0x0001 590*2eeaed14Srobj #define IPMI_SR_PREDFAIL_ASSERT 0x0002 591*2eeaed14Srobj 592*2eeaed14Srobj #define IPMI_SR_LIMIT_NOTEXCEEDED 0x0001 593*2eeaed14Srobj #define IPMI_SR_LIMIT_EXCEEDED 0x0002 594*2eeaed14Srobj 595*2eeaed14Srobj #define IPMI_SR_PERFORMANCE_MET 0x0001 596*2eeaed14Srobj #define IPMI_SR_PERFORMANCE_LAGS 0x0002 597*2eeaed14Srobj 598*2eeaed14Srobj #define IPMI_SR_SEVERITY_TO_OK 0x0001 599*2eeaed14Srobj #define IPMI_SR_SEVERITY_OK_TO_NONCRIT 0x0002 600*2eeaed14Srobj #define IPMI_SR_SEVERITY_LESS_TO_CRIT 0x0004 601*2eeaed14Srobj #define IPMI_SR_SEVERITY_LESS_TO_NONRECOV 0x0008 602*2eeaed14Srobj #define IPMI_SR_SEVERITY_MORE_TO_NONCRIT 0x0010 603*2eeaed14Srobj #define IPMI_SR_SEVERITY_NONRECOV_TO_CRIT 0x0020 604*2eeaed14Srobj #define IPMI_SR_SEVERITY_TO_NONRECOV 0x0040 605*2eeaed14Srobj #define IPMI_SR_SEVERITY_MONITOR 0x0080 606*2eeaed14Srobj #define IPMI_SR_SEVERITY_INFO 0x0100 607*2eeaed14Srobj 608*2eeaed14Srobj #define IPMI_SR_PRESENT_DEASSERT 0x0001 609*2eeaed14Srobj #define IPMI_SR_PRESENT_ASSERT 0x0002 610*2eeaed14Srobj 611*2eeaed14Srobj #define IPMI_SR_ENABLED_DEASSERT 0x0001 612*2eeaed14Srobj #define IPMI_SR_ENABLED_ASSERT 0x0002 613*2eeaed14Srobj 614*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_RUNNING 0x0001 615*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_INTEST 0x0002 616*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_POWEROFF 0x0004 617*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_ONLINE 0x0008 618*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_OFFLINE 0x0010 619*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_OFFDUTY 0x0020 620*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_DEGRADED 0x0040 621*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_POWERSAVE 0x0080 622*2eeaed14Srobj #define IPMI_SR_AVAILABILITY_INSTALLERR 0x0100 623*2eeaed14Srobj 624*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_FULL 0x0001 625*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_LOST 0x0002 626*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_DEGRADED 0x0004 627*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_NONE_MINIMAL 0x0008 628*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_NONE_REGAINED 0x0010 629*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_NONE_INSUFFFICIENT 0x0020 630*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_DEG_FROM_FULL 0x0040 631*2eeaed14Srobj #define IPMI_SR_REDUNDANCY_DEG_FROM_NON 0x0080 632*2eeaed14Srobj 633*2eeaed14Srobj #define IPMI_SR_ACPI_DO 0x0001 634*2eeaed14Srobj #define IPMI_SR_ACPI_D1 0x0002 635*2eeaed14Srobj #define IPMI_SR_ACPI_D2 0x0004 636*2eeaed14Srobj #define IPMI_SR_ACPI_D3 0x0008 637*2eeaed14Srobj 638*2eeaed14Srobj /* 639*2eeaed14Srobj * Bitmasks for sensor-specific reading type (0x6F). See section 42.2. 640*2eeaed14Srobj */ 641*2eeaed14Srobj #define IPMI_ST_RESERVED 0x00 642*2eeaed14Srobj #define IPMI_ST_TEMP 0x01 643*2eeaed14Srobj #define IPMI_ST_VOLTAGE 0x02 644*2eeaed14Srobj #define IPMI_ST_CURRENT 0x03 645*2eeaed14Srobj #define IPMI_ST_FAN 0x04 646*2eeaed14Srobj #define IPMI_ST_PHYSICAL 0x05 647*2eeaed14Srobj 648*2eeaed14Srobj #define IPMI_EV_PHYSICAL_GENERAL 0x0001 649*2eeaed14Srobj #define IPMI_EV_PHYSICAL_BAY 0x0002 650*2eeaed14Srobj #define IPMI_EV_PHYSICAL_CARD 0x0004 651*2eeaed14Srobj #define IPMI_EV_PHYSICAL_PROCESSOR 0x0008 652*2eeaed14Srobj #define IPMI_EV_PHYSICAL_LAN 0x0010 653*2eeaed14Srobj #define IPMI_EV_PHYSICAL_DOCK 0x0020 654*2eeaed14Srobj #define IPMI_EV_PHYSICAL_FAN 0x0040 655*2eeaed14Srobj 656*2eeaed14Srobj #define IPMI_ST_PLATFORM 0x06 657*2eeaed14Srobj 658*2eeaed14Srobj #define IPMI_EV_PLATFORM_SECURE 0x0001 659*2eeaed14Srobj #define IPMI_EV_PLATFORM_USER_PASS 0x0002 660*2eeaed14Srobj #define IPMI_EV_PLATFORM_SETUP_PASS 0x0004 661*2eeaed14Srobj #define IPMI_EV_PLATFORM_NETWORK_PASS 0x0008 662*2eeaed14Srobj #define IPMI_EV_PLATFORM_OTHER_PASS 0x0010 663*2eeaed14Srobj #define IPMI_EV_PLATFORM_OUT_OF_BAND 0x0020 664*2eeaed14Srobj 665*2eeaed14Srobj #define IPMI_ST_PROCESSOR 0x07 666*2eeaed14Srobj 667*2eeaed14Srobj #define IPMI_EV_PROCESSOR_IERR 0x0001 668*2eeaed14Srobj #define IPMI_EV_PROCESSOR_THERMAL 0x0002 669*2eeaed14Srobj #define IPMI_EV_PROCESSOR_FRB1 0x0004 670*2eeaed14Srobj #define IPMI_EV_PROCESSOR_FRB2 0x0008 671*2eeaed14Srobj #define IPMI_EV_PROCESSOR_FRB3 0x0010 672*2eeaed14Srobj #define IPMI_EV_PROCESSOR_CONFIG 0x0020 673*2eeaed14Srobj #define IPMI_EV_PROCESSOR_SMBIOS 0x0040 674*2eeaed14Srobj #define IPMI_EV_PROCESSOR_PRESENT 0x0080 675*2eeaed14Srobj #define IPMI_EV_PROCESSOR_DISABLED 0x0100 676*2eeaed14Srobj #define IPMI_EV_PROCESSOR_TERMINATOR 0x0200 677*2eeaed14Srobj #define IPMI_EV_PROCESSOR_THROTTLED 0x0400 678*2eeaed14Srobj 679*2eeaed14Srobj #define IPMI_ST_POWER_SUPPLY 0x08 680*2eeaed14Srobj 681*2eeaed14Srobj #define IPMI_EV_POWER_SUPPLY_PRESENT 0x0001 682*2eeaed14Srobj #define IPMI_EV_POWER_SUPPLY_FAILURE 0x0002 683*2eeaed14Srobj #define IPMI_EV_POWER_SUPPLY_PREDFAIL 0x0004 684*2eeaed14Srobj #define IPMI_EV_POWER_SUPPLY_INPUT_LOST 0x0008 685*2eeaed14Srobj #define IPMI_EV_POWER_SUPPLY_INPUT_RANGE 0x0010 686*2eeaed14Srobj #define IPMI_EV_POWER_SUPPLY_INPUT_RANGE_PRES 0x0020 687*2eeaed14Srobj #define IPMI_EV_POWER_SUPPLY_CONFIG_ERR 0x0040 688*2eeaed14Srobj 689*2eeaed14Srobj #define IPMI_ST_POWER_UNIT 0x09 690*2eeaed14Srobj 691*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_OFF 0x0001 692*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_CYCLE 0x0002 693*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_240_DOWN 0x0004 694*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_INTERLOCK_DOWN 0x0008 695*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_AC_LOST 0x0010 696*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_SOFT_FAILURE 0x0020 697*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_FAIL 0x0040 698*2eeaed14Srobj #define IPMI_EV_POWER_UNIT_PREDFAIL 0x0080 699*2eeaed14Srobj 700*2eeaed14Srobj #define IPMI_ST_COOLING 0x0A 701*2eeaed14Srobj #define IPMI_ST_OTHER 0x0B 702*2eeaed14Srobj #define IPMI_ST_MEMORY 0x0C 703*2eeaed14Srobj 704*2eeaed14Srobj #define IPMI_EV_MEMORY_CE 0x0001 705*2eeaed14Srobj #define IPMI_EV_MEMORY_UE 0x0002 706*2eeaed14Srobj #define IPMI_EV_MEMORY_PARITY 0x0004 707*2eeaed14Srobj #define IPMI_EV_MEMORY_SCRUB_FAIL 0x0008 708*2eeaed14Srobj #define IPMI_EV_MEMORY_DISABLED 0x0010 709*2eeaed14Srobj #define IPMI_EV_MEMORY_CE_LOG_LIMIT 0x0020 710*2eeaed14Srobj #define IPMI_EV_MEMORY_PRESENT 0x0040 711*2eeaed14Srobj #define IPMI_EV_MEMORY_CONFIG_ERR 0x0080 712*2eeaed14Srobj #define IPMI_EV_MEMORY_SPARE 0x0100 713*2eeaed14Srobj #define IPMI_EV_MEMORY_THROTTLED 0x0200 714*2eeaed14Srobj #define IPMI_EV_MEMORY_OVERTEMP 0x0400 715*2eeaed14Srobj 716*2eeaed14Srobj #define IPMI_ST_BAY 0x0D 717*2eeaed14Srobj 718*2eeaed14Srobj #define IPMI_EV_BAY_PRESENT 0x0001 719*2eeaed14Srobj #define IPMI_EV_BAY_FAULT 0x0002 720*2eeaed14Srobj #define IPMI_EV_BAY_PREDFAIL 0x0004 721*2eeaed14Srobj #define IPMI_EV_BAY_SPARE 0x0008 722*2eeaed14Srobj #define IPMI_EV_BAY_CHECK 0x0010 723*2eeaed14Srobj #define IPMI_EV_BAY_CRITICAL 0x0020 724*2eeaed14Srobj #define IPMI_EV_BAY_FAILED 0x0040 725*2eeaed14Srobj #define IPMI_EV_BAY_REBUILDING 0x0080 726*2eeaed14Srobj #define IPMI_EV_BAY_ABORTED 0x0100 727*2eeaed14Srobj 728*2eeaed14Srobj #define IPMI_ST_POST_RESIZE 0x0E 729*2eeaed14Srobj #define IPMI_ST_FIRMWARE 0x0F 730*2eeaed14Srobj 731*2eeaed14Srobj #define IPMI_EV_FIRMWARE_ERROR 0x0001 732*2eeaed14Srobj #define IPMI_EV_FIRMWARE_HANG 0x0002 733*2eeaed14Srobj #define IPMI_EV_FIRMWARE_PROGRESS 0x0004 734*2eeaed14Srobj 735*2eeaed14Srobj #define IPMI_ST_EVENT_LOG 0x10 736*2eeaed14Srobj 737*2eeaed14Srobj #define IPMI_EV_EVENT_LOG_CE 0x0001 738*2eeaed14Srobj #define IPMI_EV_EVENT_LOG_TYPE 0x0002 739*2eeaed14Srobj #define IPMI_EV_EVENT_LOG_RESET 0x0004 740*2eeaed14Srobj #define IPMI_EV_EVENT_LOG_ALL 0x0008 741*2eeaed14Srobj #define IPMI_EV_EVENT_LOG_FULL 0x0010 742*2eeaed14Srobj #define IPMI_EV_EVENT_LOG_ALMOST_FULL 0x0020 743*2eeaed14Srobj 744*2eeaed14Srobj #define IPMI_ST_WATCHDOG1 0x11 745*2eeaed14Srobj 746*2eeaed14Srobj #define IPMI_EV_WATCHDOG_BIOS_RESET 0x0001 747*2eeaed14Srobj #define IPMI_EV_WATCHDOG_OS_RESET 0x0002 748*2eeaed14Srobj #define IPMI_EV_WATCHDOG_OS_SHUTDOWN 0x0004 749*2eeaed14Srobj #define IPMI_EV_WATCHDOG_OS_PWR_DOWN 0x0008 750*2eeaed14Srobj #define IPMI_EV_WATCHDOG_OS_PWR_CYCLE 0x0010 751*2eeaed14Srobj #define IPMI_EV_WATCHDOG_OS_NMI_DIAG 0x0020 752*2eeaed14Srobj #define IPMI_EV_WATCHDOG_EXPIRED 0x0040 753*2eeaed14Srobj #define IPMI_EV_WATCHDOG_PRE_TIMEOUT_INT 0x0080 754*2eeaed14Srobj 755*2eeaed14Srobj #define IPMI_ST_SYSTEM 0x12 756*2eeaed14Srobj 757*2eeaed14Srobj #define IPMI_EV_STSTEM_RECONF 0x0001 758*2eeaed14Srobj #define IPMI_EV_STSTEM_BOOT 0x0002 759*2eeaed14Srobj #define IPMI_EV_STSTEM_UNKNOWN_HW_FAILURE 0x0004 760*2eeaed14Srobj #define IPMI_EV_STSTEM_AUX_LOG_UPDATED 0x0008 761*2eeaed14Srobj #define IPMI_EV_STSTEM_PEF_ACTION 0x0010 762*2eeaed14Srobj #define IPMI_EV_SYSTEM_TIMETAMP_CLOCKSYNC 0x0020 763*2eeaed14Srobj 764*2eeaed14Srobj #define IPMI_ST_CRITICAL 0x13 765*2eeaed14Srobj 766*2eeaed14Srobj #define IPMI_EV_CRITICAL_EXT_NMI 0x0001 767*2eeaed14Srobj #define IPMI_EV_CRITICAL_BUS_TIMOEOUT 0x0002 768*2eeaed14Srobj #define IPMI_EV_CRITICAL_IO_NMI 0x0004 769*2eeaed14Srobj #define IPMI_EV_CRITICAL_SW_NMI 0x0008 770*2eeaed14Srobj #define IPMI_EV_CRITICAL_PCI_PERR 0x0010 771*2eeaed14Srobj #define IPMI_EV_CRITICAL_PCI_SERR 0x0020 772*2eeaed14Srobj #define IPMI_EV_CRITICAL_EISA_FAILSAFE 0x0040 773*2eeaed14Srobj #define IPMI_EV_CRITICAL_BUS_CE 0x0080 774*2eeaed14Srobj #define IPMI_EV_CRITICAL_BUS_UE 0x0100 775*2eeaed14Srobj #define IPMI_EV_CRITICAL_FATAL_NMI 0x0200 776*2eeaed14Srobj #define IPMI_EV_CRITICAL_BUS_FATAL_ERR 0x0400 777*2eeaed14Srobj #define IPMI_EV_CRITICAL_BUS_DEGRADED 0x0800 778*2eeaed14Srobj 779*2eeaed14Srobj #define IPMI_ST_BUTTON 0x14 780*2eeaed14Srobj 781*2eeaed14Srobj #define IPMI_EV_BUTTON_PWR 0x0001 782*2eeaed14Srobj #define IPMI_EV_BUTTON_SLEEP 0x0002 783*2eeaed14Srobj #define IPMI_EV_BUTTON_RESET 0x0004 784*2eeaed14Srobj #define IPMI_EV_BUTTON_FRU_LATCH 0x0008 785*2eeaed14Srobj #define IPMI_EV_BUTTON_FRU_SERVICE 0x0010 786*2eeaed14Srobj 787*2eeaed14Srobj #define IPMI_ST_MODULE 0x15 788*2eeaed14Srobj #define IPMI_ST_MICROCONTROLLER 0x16 789*2eeaed14Srobj #define IPMI_ST_CARD 0x17 790*2eeaed14Srobj #define IPMI_ST_CHASSIS 0x18 791*2eeaed14Srobj 792*2eeaed14Srobj #define IPMI_ST_CHIPSET 0x19 793*2eeaed14Srobj 794*2eeaed14Srobj #define IPMI_EV_CHIPSET_PWR_CTL_FAIL 0x0001 795*2eeaed14Srobj 796*2eeaed14Srobj #define IPMI_ST_FRU 0x1A 797*2eeaed14Srobj #define IPMI_ST_CABLE 0x1B 798*2eeaed14Srobj 799*2eeaed14Srobj #define IPMI_EV_CABLE_CONNECTED 0x0001 800*2eeaed14Srobj #define IPMI_EV_CABLE_CONFIG_ERR 0x0002 801*2eeaed14Srobj 802*2eeaed14Srobj #define IPMI_ST_TERMINATOR 0x1C 803*2eeaed14Srobj 804*2eeaed14Srobj #define IPMI_ST_BOOT 0x1D 805*2eeaed14Srobj 806*2eeaed14Srobj #define IPMI_EV_BOOT_BIOS_PWR_UP 0x0001 807*2eeaed14Srobj #define IPMI_EV_BOOT_BIOS_HARD_RESET 0x0002 808*2eeaed14Srobj #define IPMI_EV_BOOT_BIOS_WARM_RESET 0x0004 809*2eeaed14Srobj #define IPMI_EV_BOOT_PXE_BOOT 0x0008 810*2eeaed14Srobj #define IPMI_EV_BOOT_DIAG_BOOT 0x0010 811*2eeaed14Srobj #define IPMI_EV_BOOT_OS_HARD_RESET 0x0020 812*2eeaed14Srobj #define IPMI_EV_BOOT_OS_WARM_RESET 0x0040 813*2eeaed14Srobj #define IPMI_EV_BOOT_SYS_RESTART 0x0080 814*2eeaed14Srobj 815*2eeaed14Srobj #define IPMI_ST_BOOT_ERROR 0x1E 816*2eeaed14Srobj 817*2eeaed14Srobj #define IPMI_EV_BOOT_ERROR_NOMEDIA 0x0001 818*2eeaed14Srobj #define IPMI_EV_BOOT_ERROR_NON_BOOTABLE_DISK 0x0002 819*2eeaed14Srobj #define IPMI_EV_BOOT_ERROR_NO_PXE_SERVER 0x0004 820*2eeaed14Srobj #define IPMI_EV_BOOT_ERROR_INV_BOOT_SECT 0x0008 821*2eeaed14Srobj #define IPMI_EV_BOOT_ERROR_USR_SELECT_TIMEOUT 0x0010 822*2eeaed14Srobj 823*2eeaed14Srobj #define IPMI_ST_BOOT_OS 0x1F 824*2eeaed14Srobj 825*2eeaed14Srobj #define IPMI_EV_BOOT_OS_A_DRV_BOOT_COMPLETE 0x0001 826*2eeaed14Srobj #define IPMI_EV_BOOT_OS_C_DRV_BOOT_COMPLETE 0x0002 827*2eeaed14Srobj #define IPMI_EV_BOOT_OS_PXE_BOOT_COMPLETE 0x0004 828*2eeaed14Srobj #define IPMI_EV_BOOT_OS_DIAG_BOOT_COMPLETE 0x0008 829*2eeaed14Srobj #define IPMI_EV_BOOT_OS_CDROM_BOOT_COMPLETE 0x0010 830*2eeaed14Srobj #define IPMI_EV_BOOT_OS_ROM_BOOT_COMPLETE 0x0020 831*2eeaed14Srobj #define IPMI_EV_BOOT_OS_UNSPEC_BOOT_COMPLETE 0x0040 832*2eeaed14Srobj 833*2eeaed14Srobj #define IPMI_ST_OS_SHUTDOWN 0x20 834*2eeaed14Srobj 835*2eeaed14Srobj #define IPMI_EV_OS_SHUTDOWN_LOADING 0x0001 836*2eeaed14Srobj #define IPMI_EV_OS_SHUTDOWN_CRASH 0x0002 837*2eeaed14Srobj #define IPMI_EV_OS_STOP_GRACEFUL 0x0004 838*2eeaed14Srobj #define IPMI_EV_OS_SHUTDOWN_GRACEFUL 0x0008 839*2eeaed14Srobj #define IPMI_EV_OS_SHUTDOWN_PEF 0x0010 840*2eeaed14Srobj #define IPMI_EV_OS_SHUTDOWN_BMC 0x0020 841*2eeaed14Srobj 842*2eeaed14Srobj #define IPMI_ST_SLOT 0x21 843*2eeaed14Srobj 844*2eeaed14Srobj #define IPMI_EV_SLOT_FAULT_ASSERTED 0x0001 845*2eeaed14Srobj #define IPMI_EV_SLOT_IDENTIFY_ASSERTED 0x0002 846*2eeaed14Srobj #define IPMI_EV_SLOT_CONNECTED 0x0004 847*2eeaed14Srobj #define IPMI_EV_SLOT_INSTALL_READY 0x0008 848*2eeaed14Srobj #define IPMI_EV_SLOT_REMOVE_READY 0x0010 849*2eeaed14Srobj #define IPMI_EV_SLOT_PWR_OFF 0x0020 850*2eeaed14Srobj #define IPMI_EV_SLOT_REMOVED 0x0040 851*2eeaed14Srobj #define IPMI_EV_SLOT_INTERLOCK_ASSERTED 0x0080 852*2eeaed14Srobj #define IPMI_EV_SLOT_DISABLED 0x0100 853*2eeaed14Srobj #define IPMI_EV_SLOT_SPARE_DEVICE 0x0200 854*2eeaed14Srobj 855*2eeaed14Srobj #define IPMI_ST_ACPI 0x22 856*2eeaed14Srobj 857*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S0_G0 0x0001 858*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S1 0x0002 859*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S2 0x0004 860*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S3 0x0008 861*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S4 0x0010 862*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S5_G2_SOFT_OFF 0x0020 863*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S4_S5_SOFT_OFF 0x0040 864*2eeaed14Srobj #define IPMI_EV_ACPI_PSATTE_G3_MECH_OFF 0x0080 865*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S1_S2_S3_SLEEP 0x0100 866*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_G1_SLEEP 0x0200 867*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_S5_OVERRIDE 0x0400 868*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_LEGACY_ON 0x0800 869*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_LEGACY_OFF 0x1000 870*2eeaed14Srobj #define IPMI_EV_ACPI_PSTATE_UNKNOWN 0x2000 871*2eeaed14Srobj 872*2eeaed14Srobj #define IPMI_ST_WATCHDOG2 0x23 873*2eeaed14Srobj 874*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_EXPIRED 0x0001 875*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_HARD_RESET 0x0002 876*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_PWR_DOWN 0x0004 877*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_PWR_CYCLE 0x0008 878*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_RESERVED1 0x0010 879*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_RESERVED2 0x0020 880*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_RESERVED3 0x0040 881*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_RESERVED4 0x0080 882*2eeaed14Srobj #define IPMI_EV_WATCHDOG2_TIMEOUT_INT 0x0100 883*2eeaed14Srobj 884*2eeaed14Srobj #define IPMI_ST_ALERT 0x24 885*2eeaed14Srobj 886*2eeaed14Srobj #define IPMI_EV_ALERT_PLAT_PAGE 0x0001 887*2eeaed14Srobj #define IPMI_EV_ALERT_PLAT_LAN_ALERT 0x0002 888*2eeaed14Srobj #define IPMI_EV_ALERT_PLAT_EVT_TRAP 0x0004 889*2eeaed14Srobj #define IPMI_EV_ALERT_PLAT_SNMP_TRAP 0x0008 890*2eeaed14Srobj 891*2eeaed14Srobj #define IPMI_ST_PRESENCE 0x25 892*2eeaed14Srobj 893*2eeaed14Srobj #define IPMI_EV_PRESENCE_PRESENT 0x0001 894*2eeaed14Srobj #define IPMI_EV_PRESENCE_ABSENT 0x0002 895*2eeaed14Srobj #define IPMI_EV_PRESENCE_DISABLED 0x0004 896*2eeaed14Srobj 897*2eeaed14Srobj #define IPMI_ST_ASIC 0x26 898*2eeaed14Srobj 899*2eeaed14Srobj #define IPMI_ST_LAN 0x27 900*2eeaed14Srobj 901*2eeaed14Srobj #define IPMI_EV_LAN_HEARTBEAT_LOST 0x0001 902*2eeaed14Srobj #define IPMI_EV_LAN_HEARTBEAT 0x0002 903*2eeaed14Srobj 904*2eeaed14Srobj #define IPMI_ST_HEALTH 0x28 905*2eeaed14Srobj 906*2eeaed14Srobj #define IPMI_EV_HEALTH_SENSOR_ACC_DEGRADED 0x0001 907*2eeaed14Srobj #define IPMI_EV_HEALTH_CNTLR_ACC_DEGRADED 0x0002 908*2eeaed14Srobj #define IPMI_EV_HEALTH_CNTLR_OFFLINE 0x0004 909*2eeaed14Srobj #define IPMI_EV_HEALTH_CNTLR_UNAVAIL 0x0008 910*2eeaed14Srobj #define IPMI_EV_HEALTH_SENSOR_FAILURE 0x0010 911*2eeaed14Srobj #define IPMI_EV_HEALTH_FRU_FAILURE 0x0020 912*2eeaed14Srobj 913*2eeaed14Srobj #define IPMI_ST_BATTERY 0x29 914*2eeaed14Srobj 915*2eeaed14Srobj #define IPMI_EV_BATTERY_LOW 0x0001 916*2eeaed14Srobj #define IPMI_EV_BATTERY_FAILED 0x0002 917*2eeaed14Srobj #define IPMI_EV_BATTERY_PRESENCE 0x0004 918*2eeaed14Srobj 919*2eeaed14Srobj #define IPMI_ST_AUDIT 0x2A 920*2eeaed14Srobj 921*2eeaed14Srobj #define IPMI_EV_AUDIT_SESSION_ACTIVATED 0x0001 922*2eeaed14Srobj #define IPMI_EV_AUDIT_SESSION_DEACTIVATED 0x0002 923*2eeaed14Srobj 924*2eeaed14Srobj #define IPMI_ST_VERSION 0x2B 925*2eeaed14Srobj 926*2eeaed14Srobj #define IPMI_EV_VERSION_HW_CHANGE 0x0001 927*2eeaed14Srobj #define IPMI_EV_VERSION_SW_CHANGE 0x0002 928*2eeaed14Srobj #define IPMI_EV_VERSION_HW_INCOMPATIBLE 0x0004 929*2eeaed14Srobj #define IPMI_EV_VERSION_SW_INCOMPATIBLE 0x0008 930*2eeaed14Srobj #define IPMI_EV_VERSION_HW_INVAL 0x0010 931*2eeaed14Srobj #define IPMI_EV_VERSION_SW_INVAL 0x0020 932*2eeaed14Srobj #define IPMI_EV_VERSION_HW_CHANGE_SUCCESS 0x0040 933*2eeaed14Srobj #define IPMI_EV_VERSION_SW_CHANGE_SUCCESS 0x0080 934*2eeaed14Srobj 935*2eeaed14Srobj #define IPMI_ST_FRU_STATE 0x2C 936*2eeaed14Srobj 937*2eeaed14Srobj #define IPMI_EV_FRU_STATE_NOT_INSTALLED 0x0001 938*2eeaed14Srobj #define IPMI_EV_FRU_STATE_INACTIVE 0x0002 939*2eeaed14Srobj #define IPMI_EV_FRU_STATE_ACT_REQ 0x0004 940*2eeaed14Srobj #define IPMI_EV_FRU_STATE_ACT_INPROGRESS 0x0008 941*2eeaed14Srobj #define IPMI_EV_FRU_STATE_ACTIVE 0x0010 942*2eeaed14Srobj #define IPMI_EV_FRU_STATE_DEACT_REQ 0x0020 943*2eeaed14Srobj #define IPMI_EV_FRU_STATE_DEACT_INPROGRESS 0x0040 944*2eeaed14Srobj #define IPMI_EV_FRU_STATE_COMM_LOST 0x0080 945*2eeaed14Srobj 946*2eeaed14Srobj /* 947*2eeaed14Srobj * Constants for unit type codes. See Table 43-15. 948*2eeaed14Srobj */ 949*2eeaed14Srobj #define IPMI_UNITS_UNSPECIFIED 0x00 950*2eeaed14Srobj #define IPMI_UNITS_DEGREES_C 0x01 951*2eeaed14Srobj #define IPMI_UNITS_DEGREES_F 0x02 952*2eeaed14Srobj #define IPMI_UNITS_DEGREES_K 0x03 953*2eeaed14Srobj #define IPMI_UNITS_VOLTS 0x04 954*2eeaed14Srobj #define IPMI_UNITS_AMPS 0x05 955*2eeaed14Srobj #define IPMI_UNITS_WATTS 0x06 956*2eeaed14Srobj #define IPMI_UNITS_JOULES 0x07 957*2eeaed14Srobj #define IPMI_UNITS_COULOMBS 0x08 958*2eeaed14Srobj #define IPMI_UNITS_VA 0x09 959*2eeaed14Srobj #define IPMI_UNITS_NITS 0x0A 960*2eeaed14Srobj #define IPMI_UNITS_LUMEN 0x0B 961*2eeaed14Srobj #define IPMI_UNITS_LUX 0x0C 962*2eeaed14Srobj #define IPMI_UNITS_CANDELA 0x0D 963*2eeaed14Srobj #define IPMI_UNITS_KPA 0x0E 964*2eeaed14Srobj #define IPMI_UNITS_PSI 0x0F 965*2eeaed14Srobj 966*2eeaed14Srobj #define IPMI_UNITS_NEWTON 0x10 967*2eeaed14Srobj #define IPMI_UNITS_CFM 0x11 968*2eeaed14Srobj #define IPMI_UNITS_RPM 0x12 969*2eeaed14Srobj #define IPMI_UNITS_HZ 0x13 970*2eeaed14Srobj #define IPMI_UNITS_MICROSEC 0x14 971*2eeaed14Srobj #define IPMI_UNITS_MILLISEC 0x15 972*2eeaed14Srobj #define IPMI_UNITS_SECS 0x16 973*2eeaed14Srobj #define IPMI_UNITS_MIN 0x17 974*2eeaed14Srobj #define IPMI_UNITS_HOUR 0x18 975*2eeaed14Srobj #define IPMI_UNITS_DAY 0x19 976*2eeaed14Srobj #define IPMI_UNITS_WEEK 0x1A 977*2eeaed14Srobj #define IPMI_UNITS_MIL 0x1B 978*2eeaed14Srobj #define IPMI_UNITS_INCHES 0x1C 979*2eeaed14Srobj #define IPMI_UNITS_FEET 0x1D 980*2eeaed14Srobj #define IPMI_UNITS_CUB_INCH 0x1E 981*2eeaed14Srobj #define IPMI_UNITS_CUB_FEET 0x1F 982*2eeaed14Srobj 983*2eeaed14Srobj #define IPMI_UNITS_MM 0x20 984*2eeaed14Srobj #define IPMI_UNITS_CM 0x21 985*2eeaed14Srobj #define IPMI_UNITS_METERS 0x22 986*2eeaed14Srobj #define IPMI_UNITS_CUB_CM 0x23 987*2eeaed14Srobj #define IPMI_UNITS_CUB_METER 0x24 988*2eeaed14Srobj #define IPMI_UNITS_LITERS 0x25 989*2eeaed14Srobj #define IPMI_UNITS_FLUID_OUNCE 0x26 990*2eeaed14Srobj #define IPMI_UNITS_RADIANS 0x27 991*2eeaed14Srobj #define IPMI_UNITS_STERADIANS 0x28 992*2eeaed14Srobj #define IPMI_UNITS_REVOLUTIONS 0x29 993*2eeaed14Srobj #define IPMI_UNITS_CYCLES 0x2A 994*2eeaed14Srobj #define IPMI_UNITS_GRAVITIES 0x2B 995*2eeaed14Srobj #define IPMI_UNITS_OUNCE 0x2C 996*2eeaed14Srobj #define IPMI_UNITS_POUND 0x2D 997*2eeaed14Srobj #define IPMI_UNITS_FOOT_POUND 0x2E 998*2eeaed14Srobj #define IPMI_UNITS_OZ_INCH 0x2F 999*2eeaed14Srobj 1000*2eeaed14Srobj #define IPMI_UNITS_GAUSS 0x30 1001*2eeaed14Srobj #define IPMI_UNITS_GILBERTS 0x31 1002*2eeaed14Srobj #define IPMI_UNITS_HENRY 0x32 1003*2eeaed14Srobj #define IPMI_UNITS_MILHENRY 0x33 1004*2eeaed14Srobj #define IPMI_UNITS_FARAD 0x34 1005*2eeaed14Srobj #define IPMI_UNITS_MICROFARAD 0x35 1006*2eeaed14Srobj #define IPMI_UNITS_OHMS 0x36 1007*2eeaed14Srobj #define IPMI_UNITS_SIEMENS 0x37 1008*2eeaed14Srobj #define IPMI_UNITS_MOLE 0x38 1009*2eeaed14Srobj #define IPMI_UNITS_BECQUEREL 0x39 1010*2eeaed14Srobj #define IPMI_UNITS_PPM 0x3A 1011*2eeaed14Srobj /* 0x3B is reserved */ 1012*2eeaed14Srobj #define IPMI_UNITS_DECIBELS 0x3C 1013*2eeaed14Srobj #define IPMI_UNITS_DBA 0x3D 1014*2eeaed14Srobj #define IPMI_UNITS_DBC 0x3E 1015*2eeaed14Srobj #define IPMI_UNITS_GRAY 0x3F 1016*2eeaed14Srobj 1017*2eeaed14Srobj #define IPMI_UNITS_SIEVERT 0x40 1018*2eeaed14Srobj #define IPMI_UNITS_COLOR_TEMP_K 0x41 1019*2eeaed14Srobj #define IPMI_UNITS_BIT 0x42 1020*2eeaed14Srobj #define IPMI_UNITS_KILOBIT 0x43 1021*2eeaed14Srobj #define IPMI_UNITS_MEGABIT 0x44 1022*2eeaed14Srobj #define IPMI_UNITS_GIGABIT 0x45 1023*2eeaed14Srobj #define IPMI_UNITS_BYTE 0x46 1024*2eeaed14Srobj #define IPMI_UNITS_KILOBYTE 0x47 1025*2eeaed14Srobj #define IPMI_UNITS_MEGABYTE 0x48 1026*2eeaed14Srobj #define IPMI_UNITS_GIGABYTE 0x49 1027*2eeaed14Srobj #define IPMI_UNITS_WORD 0x4A 1028*2eeaed14Srobj #define IPMI_UNITS_DWORD 0x4B 1029*2eeaed14Srobj #define IPMI_UNITS_QWORD 0x4C 1030*2eeaed14Srobj #define IPMI_UNITS_MEMLINE 0x4D 1031*2eeaed14Srobj #define IPMI_UNITS_HIT 0x4E 1032*2eeaed14Srobj #define IPMI_UNITS_MISS 0x4F 1033*2eeaed14Srobj 1034*2eeaed14Srobj #define IPMI_UNITS_RETRY 0x50 1035*2eeaed14Srobj #define IPMI_UNITS_RESET 0x51 1036*2eeaed14Srobj #define IPMI_UNITS_OVERFLOW 0x52 1037*2eeaed14Srobj #define IPMI_UNITS_UNDERRUN 0x53 1038*2eeaed14Srobj #define IPMI_UNITS_COLLISION 0x54 1039*2eeaed14Srobj #define IPMI_UNITS_PACKETS 0x55 1040*2eeaed14Srobj #define IPMI_UNITS_MESSAGES 0x56 1041*2eeaed14Srobj #define IPMI_UNITS_CHARACTERS 0x57 1042*2eeaed14Srobj #define IPMI_UNITS_ERROR 0x58 1043*2eeaed14Srobj #define IPMI_UNITS_CE 0x59 1044*2eeaed14Srobj #define IPMI_UNITS_UE 0x5A 1045*2eeaed14Srobj #define IPMI_UNITS_FATAL_ERROR 0x5B 1046*2eeaed14Srobj #define IPMI_UNITS_GRAMS 0x5C 1047*2eeaed14Srobj 1048*2eeaed14Srobj /* 1049*2eeaed14Srobj * Event-Only Record. See section 43.3. 1050*2eeaed14Srobj */ 1051*2eeaed14Srobj 1052*2eeaed14Srobj #define IPMI_SDR_TYPE_EVENT_ONLY 0x03 1053*2eeaed14Srobj 1054*2eeaed14Srobj typedef struct ipmi_sdr_event_only { 1055*2eeaed14Srobj /* RECORD KEY BYTES */ 1056*2eeaed14Srobj uint8_t is_eo_owner; 1057*2eeaed14Srobj DECL_BITFIELD3( 1058*2eeaed14Srobj is_eo_sensor_lun :2, 1059*2eeaed14Srobj is_eo_fru_lun :2, 1060*2eeaed14Srobj is_eo_channel :4); 1061*2eeaed14Srobj uint8_t is_eo_number; 1062*2eeaed14Srobj /* RECORD BODY BYTES */ 1063*2eeaed14Srobj uint8_t is_eo_entity_id; 1064*2eeaed14Srobj DECL_BITFIELD2( 1065*2eeaed14Srobj is_eo_entity_instance :7, 1066*2eeaed14Srobj is_eo_entity_logical :1); 1067*2eeaed14Srobj uint8_t is_eo_sensor_type; 1068*2eeaed14Srobj uint8_t is_eo_reading_type; 1069*2eeaed14Srobj DECL_BITFIELD3( 1070*2eeaed14Srobj is_eo_share_count :4, 1071*2eeaed14Srobj is_eo_modifier_type :2, 1072*2eeaed14Srobj is_eo_direction :2); 1073*2eeaed14Srobj DECL_BITFIELD2( 1074*2eeaed14Srobj is_eo_modifier_offset :7, 1075*2eeaed14Srobj is_eo_sharing :1); 1076*2eeaed14Srobj uint8_t __reserved; 1077*2eeaed14Srobj uint8_t is_eo_oem; 1078*2eeaed14Srobj DECL_BITFIELD3( 1079*2eeaed14Srobj is_eo_idlen :5, 1080*2eeaed14Srobj __reserved1 :1, 1081*2eeaed14Srobj is_eo_idtype :2); 1082*2eeaed14Srobj char is_eo_idstring[1]; 1083*2eeaed14Srobj } ipmi_sdr_event_only_t; 1084*2eeaed14Srobj 1085*2eeaed14Srobj /* 1086*2eeaed14Srobj * Entity Association Record. See section 43.4. 1087*2eeaed14Srobj */ 1088*2eeaed14Srobj 1089*2eeaed14Srobj #define IPMI_SDR_TYPE_ENTITY_ASSOCIATION 0x08 1090*2eeaed14Srobj 1091*2eeaed14Srobj typedef struct ipmi_sdr_entity_association { 1092*2eeaed14Srobj /* RECORD KEY BYTES */ 1093*2eeaed14Srobj uint8_t is_ea_entity_id; 1094*2eeaed14Srobj uint8_t is_ea_entity_instance; 1095*2eeaed14Srobj DECL_BITFIELD4( 1096*2eeaed14Srobj __reserved :5, 1097*2eeaed14Srobj is_ea_presence :1, 1098*2eeaed14Srobj is_ea_record_link :1, 1099*2eeaed14Srobj is_ea_range :1); 1100*2eeaed14Srobj /* RECORD BODY BYTES */ 1101*2eeaed14Srobj struct { 1102*2eeaed14Srobj uint8_t is_ea_sub_id; 1103*2eeaed14Srobj uint8_t is_ea_sub_instance; 1104*2eeaed14Srobj } is_ea_sub[4]; 1105*2eeaed14Srobj } ipmi_sdr_entity_association_t; 1106*2eeaed14Srobj 1107*2eeaed14Srobj /* 1108*2eeaed14Srobj * Device-relative Entity Association Record. See section 43.5. 1109*2eeaed14Srobj */ 1110*2eeaed14Srobj 1111*2eeaed14Srobj #define IPMI_SDR_TYPE_DEVICE_RELATIVE 0x09 1112*2eeaed14Srobj 1113*2eeaed14Srobj typedef struct ipmi_sdr_device_relative { 1114*2eeaed14Srobj /* RECORD KEY BYTES */ 1115*2eeaed14Srobj uint8_t is_dr_entity_id; 1116*2eeaed14Srobj uint8_t is_dr_entity_instance; 1117*2eeaed14Srobj DECL_BITFIELD2( 1118*2eeaed14Srobj __reserved1 :1, 1119*2eeaed14Srobj is_dr_slaveaddr :7); 1120*2eeaed14Srobj DECL_BITFIELD2( 1121*2eeaed14Srobj __reserved2 :4, 1122*2eeaed14Srobj is_dr_channel :4); 1123*2eeaed14Srobj DECL_BITFIELD4( 1124*2eeaed14Srobj __reserved :5, 1125*2eeaed14Srobj is_dr_presence :1, 1126*2eeaed14Srobj is_dr_record_link :1, 1127*2eeaed14Srobj is_dr_range :1); 1128*2eeaed14Srobj /* RECORD BODY BYTES */ 1129*2eeaed14Srobj struct { 1130*2eeaed14Srobj DECL_BITFIELD2( 1131*2eeaed14Srobj __reserved3 :1, 1132*2eeaed14Srobj is_dr_sub_slaveaddr :7); 1133*2eeaed14Srobj DECL_BITFIELD2( 1134*2eeaed14Srobj __reserved4 :4, 1135*2eeaed14Srobj is_dr_sub_channel :4); 1136*2eeaed14Srobj uint8_t is_ea_sub_id; 1137*2eeaed14Srobj uint8_t is_ea_sub_instance; 1138*2eeaed14Srobj } is_ea_sub[4]; 1139*2eeaed14Srobj } ipmi_sdr_device_relative_t; 1140*2eeaed14Srobj 1141*2eeaed14Srobj /* 11429113a79cSeschrock * Generic Device Locator Record. See section 43.7. 11439113a79cSeschrock */ 11449113a79cSeschrock 11459113a79cSeschrock #define IPMI_SDR_TYPE_GENERIC_LOCATOR 0x10 11469113a79cSeschrock 11479113a79cSeschrock typedef struct ipmi_sdr_generic_locator { 11489113a79cSeschrock /* RECORD KEY BYTES */ 11492c32020fSeschrock DECL_BITFIELD2( 11502c32020fSeschrock __reserved1 :1, 11512c32020fSeschrock is_gl_accessaddr :7); 11522c32020fSeschrock DECL_BITFIELD2( 11532c32020fSeschrock is_gl_channel_msb :1, 11542c32020fSeschrock is_gl_slaveaddr :7); 11552c32020fSeschrock DECL_BITFIELD3( 11562c32020fSeschrock is_gl_bus :3, 11572c32020fSeschrock is_gl_lun :2, 11582c32020fSeschrock is_gl_channel :3); 11599113a79cSeschrock /* RECORD BODY BYTES */ 11602c32020fSeschrock DECL_BITFIELD2( 11612c32020fSeschrock is_gl_span :3, 11622c32020fSeschrock __reserved2 :5); 11639113a79cSeschrock uint8_t __reserved3; 11649113a79cSeschrock uint8_t is_gl_type; 11659113a79cSeschrock uint8_t is_gl_modifier; 11669113a79cSeschrock uint8_t is_gl_entity; 11679113a79cSeschrock uint8_t is_gl_instance; 11689113a79cSeschrock uint8_t is_gl_oem; 1169*2eeaed14Srobj DECL_BITFIELD3( 1170*2eeaed14Srobj is_gl_idlen :5, 1171*2eeaed14Srobj __reserved4 :1, 11722c32020fSeschrock is_gl_idtype :2); 11739113a79cSeschrock char is_gl_idstring[1]; 11749113a79cSeschrock } ipmi_sdr_generic_locator_t; 11759113a79cSeschrock 11769113a79cSeschrock /* 11779113a79cSeschrock * FRU Device Locator Record. See section 43.8. 11789113a79cSeschrock */ 11799113a79cSeschrock 11809113a79cSeschrock #define IPMI_SDR_TYPE_FRU_LOCATOR 0x11 11819113a79cSeschrock 11829113a79cSeschrock typedef struct ipmi_sdr_fru_locator { 11839113a79cSeschrock /* RECORD KEY BYTES */ 11842c32020fSeschrock DECL_BITFIELD2( 11852c32020fSeschrock __reserved1 :1, 11862c32020fSeschrock is_fl_accessaddr :7); 11879113a79cSeschrock union { 11889113a79cSeschrock struct { 11899113a79cSeschrock uint8_t _is_fl_devid; 11909113a79cSeschrock } _logical; 11919113a79cSeschrock struct { 11922c32020fSeschrock DECL_BITFIELD2( 11932c32020fSeschrock __reserved :1, 11942c32020fSeschrock _is_fl_slaveaddr :7); 11959113a79cSeschrock } _nonintelligent; 11969113a79cSeschrock } _devid_or_slaveaddr; 11972c32020fSeschrock DECL_BITFIELD4( 11982c32020fSeschrock is_fl_bus :3, 11992c32020fSeschrock is_fl_lun :2, 12002c32020fSeschrock __reserved2 :2, 12012c32020fSeschrock is_fl_logical :1); 12022c32020fSeschrock DECL_BITFIELD2( 12032c32020fSeschrock __reserved3 :4, 12042c32020fSeschrock is_fl_channel :4); 12059113a79cSeschrock /* RECORD BODY BYTES */ 12069113a79cSeschrock uint8_t __reserved4; 12079113a79cSeschrock uint8_t is_fl_type; 12089113a79cSeschrock uint8_t is_fl_modifier; 12099113a79cSeschrock uint8_t is_fl_entity; 12109113a79cSeschrock uint8_t is_fl_instance; 12119113a79cSeschrock uint8_t is_fl_oem; 1212*2eeaed14Srobj DECL_BITFIELD3( 1213*2eeaed14Srobj is_fl_idlen :5, 1214*2eeaed14Srobj __reserved5 :1, 12152c32020fSeschrock is_fl_idtype :2); 12169113a79cSeschrock char is_fl_idstring[1]; 12179113a79cSeschrock } ipmi_sdr_fru_locator_t; 12189113a79cSeschrock 12199113a79cSeschrock #define is_fl_devid _devid_or_slaveaddr._logical._is_fl_devid 12209113a79cSeschrock #define is_fl_slaveaddr _devid_or_slaveaddr._nonintelligent._is_fl_slaveaddr 12219113a79cSeschrock 12229113a79cSeschrock /* 1223*2eeaed14Srobj * Management Controller Device Locator Record. See section 43.9 12249113a79cSeschrock */ 1225*2eeaed14Srobj 1226*2eeaed14Srobj #define IPMI_SDR_TYPE_MANAGEMENT_LOCATOR 0x12 1227*2eeaed14Srobj 1228*2eeaed14Srobj typedef struct ipmi_sdr_management_locator { 1229*2eeaed14Srobj /* RECORD KEY BYTES */ 1230*2eeaed14Srobj DECL_BITFIELD2( 1231*2eeaed14Srobj __reserved1 :1, 1232*2eeaed14Srobj is_ml_devaddr :7); 1233*2eeaed14Srobj DECL_BITFIELD2( 1234*2eeaed14Srobj is_ml_channel :4, 1235*2eeaed14Srobj __reserved2 :4); 1236*2eeaed14Srobj /* RECORD BODY BYTES */ 1237*2eeaed14Srobj DECL_BITFIELD7( 1238*2eeaed14Srobj is_ml_init_message :2, 1239*2eeaed14Srobj is_ml_init_log :1, 1240*2eeaed14Srobj is_ml_init_controller_log :1, 1241*2eeaed14Srobj __reserved3 :1, 1242*2eeaed14Srobj is_ml_static :1, 1243*2eeaed14Srobj is_ml_acpi_device :1, 1244*2eeaed14Srobj is_ml_acpi_system :1); 1245*2eeaed14Srobj DECL_BITFIELD8( 1246*2eeaed14Srobj is_ml_supp_sensor :1, 1247*2eeaed14Srobj is_ml_supp_sdr :1, 1248*2eeaed14Srobj is_ml_supp_sel :1, 1249*2eeaed14Srobj is_ml_supp_fru :1, 1250*2eeaed14Srobj is_ml_supp_event_receiver :1, 1251*2eeaed14Srobj is_ml_supp_event_generator :1, 1252*2eeaed14Srobj is_ml_supp_bridge :1, 1253*2eeaed14Srobj is_ml_supp_chassis :1); 1254*2eeaed14Srobj uint8_t __reserved4; 1255*2eeaed14Srobj uint16_t __reserved5; 1256*2eeaed14Srobj uint8_t is_ml_entity_id; 1257*2eeaed14Srobj uint8_t is_ml_entity_instance; 1258*2eeaed14Srobj uint8_t is_ml_oem; 1259*2eeaed14Srobj DECL_BITFIELD3( 1260*2eeaed14Srobj is_ml_idlen :5, 1261*2eeaed14Srobj __reserved6 :1, 1262*2eeaed14Srobj is_ml_idtype :2); 1263*2eeaed14Srobj char is_ml_idstring[1]; 1264*2eeaed14Srobj } ipmi_sdr_management_locator_t; 1265*2eeaed14Srobj 1266*2eeaed14Srobj #define IPMI_MESSAGE_INIT_ENABLE 0x0 1267*2eeaed14Srobj #define IPMI_MESSAGE_INIT_DISABLE 0x1 1268*2eeaed14Srobj #define IPMI_MESSAGE_INIT_NONE 0x2 1269*2eeaed14Srobj 1270*2eeaed14Srobj /* 1271*2eeaed14Srobj * Management Controller Confirmation Record. See section 43.10 1272*2eeaed14Srobj */ 1273*2eeaed14Srobj 12749113a79cSeschrock #define IPMI_SDR_TYPE_MANAGEMENT_CONFIRMATION 0x13 1275*2eeaed14Srobj 1276*2eeaed14Srobj typedef struct ipmi_sdr_management_confirmation { 1277*2eeaed14Srobj /* RECORD KEY BYTES */ 1278*2eeaed14Srobj DECL_BITFIELD2( 1279*2eeaed14Srobj __reserved1 :1, 1280*2eeaed14Srobj is_mc_slaveaddr :7); 1281*2eeaed14Srobj uint8_t is_mc_deviceid; 1282*2eeaed14Srobj DECL_BITFIELD2( 1283*2eeaed14Srobj is_mc_dev_revision :4, 1284*2eeaed14Srobj is_mc_channel :4); 1285*2eeaed14Srobj /* RECORD BODY BYTES */ 1286*2eeaed14Srobj DECL_BITFIELD2( 1287*2eeaed14Srobj is_mc_major_rev :7, 1288*2eeaed14Srobj __reserved2 :1); 1289*2eeaed14Srobj uint8_t is_mc_minor_rev; 1290*2eeaed14Srobj uint8_t is_mc_impi_ver; 1291*2eeaed14Srobj uint8_t is_mc_manufacturer[3]; 1292*2eeaed14Srobj uint16_t is_mc_product; 1293*2eeaed14Srobj uint8_t is_mc_guid[16]; 1294*2eeaed14Srobj } ipmi_sdr_management_confirmation_t; 1295*2eeaed14Srobj 1296*2eeaed14Srobj /* 1297*2eeaed14Srobj * BMC Message Channel Info Record. See esction 43.11. 1298*2eeaed14Srobj */ 1299*2eeaed14Srobj 13009113a79cSeschrock #define IPMI_SDR_TYPE_BMC_MESSAGE_CHANNEL 0x14 1301*2eeaed14Srobj 1302*2eeaed14Srobj typedef struct ipmi_sdr_bmc_channel { 1303*2eeaed14Srobj /* RECORD BODY BYTES */ 1304*2eeaed14Srobj struct { 1305*2eeaed14Srobj DECL_BITFIELD3( 1306*2eeaed14Srobj is_bc_protocol :4, 1307*2eeaed14Srobj is_bc_receive_lun :3, 1308*2eeaed14Srobj is_bc_transmit :1); 1309*2eeaed14Srobj } is_bc_channel[8]; 1310*2eeaed14Srobj uint8_t is_bc_interrupt_type; 1311*2eeaed14Srobj uint8_t is_bc_buffer_type; 1312*2eeaed14Srobj uint8_t __reserved; 1313*2eeaed14Srobj } ipmi_sdr_bmc_channel_t; 1314*2eeaed14Srobj 1315*2eeaed14Srobj /* 1316*2eeaed14Srobj * OEM Record. See ction 43.12. 1317*2eeaed14Srobj */ 1318*2eeaed14Srobj 13199113a79cSeschrock #define IPMI_SDR_TYPE_OEM 0xC0 13209113a79cSeschrock 1321*2eeaed14Srobj typedef struct ipmi_sdr_oem { 1322*2eeaed14Srobj uint8_t is_oem_manufacturer[3]; 1323*2eeaed14Srobj uint8_t is_oem_data[1]; 1324*2eeaed14Srobj } ipmi_sdr_oem_t; 1325*2eeaed14Srobj 1326*2eeaed14Srobj /* 1327*2eeaed14Srobj * Iterate over the SDR repository. This function does the work of parsing the 1328*2eeaed14Srobj * name when available, and keeping the repository in a consistent state. 1329*2eeaed14Srobj */ 1330*2eeaed14Srobj extern int ipmi_sdr_iter(ipmi_handle_t *, 1331*2eeaed14Srobj int (*)(ipmi_handle_t *, const char *, ipmi_sdr_t *, void *), void *); 1332*2eeaed14Srobj 13339113a79cSeschrock /* 13349113a79cSeschrock * Lookup the given sensor type by name. These functions automatically read in 13359113a79cSeschrock * and cache the complete SDR repository. 13369113a79cSeschrock */ 1337*2eeaed14Srobj extern ipmi_sdr_t *ipmi_sdr_lookup(ipmi_handle_t *, const char *); 13389113a79cSeschrock extern ipmi_sdr_fru_locator_t *ipmi_sdr_lookup_fru(ipmi_handle_t *, 13399113a79cSeschrock const char *); 13409113a79cSeschrock extern ipmi_sdr_generic_locator_t *ipmi_sdr_lookup_generic(ipmi_handle_t *, 13419113a79cSeschrock const char *); 1342*2eeaed14Srobj extern ipmi_sdr_compact_sensor_t *ipmi_sdr_lookup_compact_sensor( 1343*2eeaed14Srobj ipmi_handle_t *, const char *); 1344*2eeaed14Srobj extern ipmi_sdr_full_sensor_t *ipmi_sdr_lookup_full_sensor( 1345*2eeaed14Srobj ipmi_handle_t *, const char *); 1346*2eeaed14Srobj 1347*2eeaed14Srobj /* 1348*2eeaed14Srobj * Entity ID codes. See table 43.13. 1349*2eeaed14Srobj */ 1350*2eeaed14Srobj #define IPMI_ET_UNSPECIFIED 0x00 1351*2eeaed14Srobj #define IPMI_ET_OTHER 0x01 1352*2eeaed14Srobj #define IPMI_ET_UNKNOWN 0x02 1353*2eeaed14Srobj #define IPMI_ET_PROCESSOR 0x03 1354*2eeaed14Srobj #define IPMI_ET_DISK 0x04 1355*2eeaed14Srobj #define IPMI_ET_PERIPHERAL 0x05 1356*2eeaed14Srobj #define IPMI_ET_MANAGEMENT_MODULE 0x06 1357*2eeaed14Srobj #define IPMI_ET_MOTHERBOARD 0x07 1358*2eeaed14Srobj #define IPMI_ET_MEMORY_MODULE 0x08 1359*2eeaed14Srobj #define IPMI_ET_PROCESSOR_MODULE 0x09 1360*2eeaed14Srobj #define IPMI_ET_PSU 0x0A 1361*2eeaed14Srobj #define IPMI_ET_CARD 0x0B 1362*2eeaed14Srobj #define IPMI_ET_FRONT_PANEL 0x0C 1363*2eeaed14Srobj #define IPMI_ET_BACK_PANEL 0x0D 1364*2eeaed14Srobj #define IPMI_ET_POWER_BOARD 0x0E 1365*2eeaed14Srobj #define IPMI_ET_BACKPLANE 0x0F 1366*2eeaed14Srobj #define IPMI_ET_EXPANSION_BOARD 0x10 1367*2eeaed14Srobj #define IPMI_ET_OTHER_BOARD 0x11 1368*2eeaed14Srobj #define IPMI_ET_PROCESSOR_BOARD 0x12 1369*2eeaed14Srobj #define IPMI_ET_POWER_DOMAIN 0x13 1370*2eeaed14Srobj #define IPMI_ET_POWER_CONVERTER 0x14 1371*2eeaed14Srobj #define IPMI_ET_POWER_MANAGEMENT 0x15 1372*2eeaed14Srobj #define IPMI_ET_BACK_CHASSIS 0x16 1373*2eeaed14Srobj #define IPMI_ET_SYSTEM_CHASSIS 0x17 1374*2eeaed14Srobj #define IPMI_ET_SUB_CHASSIS 0x18 1375*2eeaed14Srobj #define IPMI_ET_OTHER_CHASSIS 0x19 1376*2eeaed14Srobj #define IPMI_ET_DISK_BAY 0x1A 1377*2eeaed14Srobj #define IPMI_ET_PERIPHERAL_BAY 0x1B 1378*2eeaed14Srobj #define IPMI_ET_DEVICE_BAY 0x1C 1379*2eeaed14Srobj #define IPMI_ET_FAN 0x1D 1380*2eeaed14Srobj #define IPMI_ET_COOLING_DOMAIN 0x1E 1381*2eeaed14Srobj #define IPMI_ET_CABLE 0x1F 1382*2eeaed14Srobj #define IPMI_ET_MEMORY_DEVICE 0x20 1383*2eeaed14Srobj #define IPMI_ET_MANAGEMENT_SOFTWARE 0x21 1384*2eeaed14Srobj #define IPMI_ET_SYSTEM_FIRMWARE 0x22 1385*2eeaed14Srobj #define IPMI_ET_OS 0x23 1386*2eeaed14Srobj #define IPMI_ET_SYSTEM_BUS 0x24 1387*2eeaed14Srobj #define IPMI_ET_GROUP 0x25 1388*2eeaed14Srobj #define IPMI_ET_REMOTE 0x26 1389*2eeaed14Srobj #define IPMI_ET_ENVIRONMENT 0x27 1390*2eeaed14Srobj #define IPMI_ET_BATTERY 0x28 1391*2eeaed14Srobj #define IPMI_ET_BLADE 0x29 1392*2eeaed14Srobj #define IPMI_ET_SWITCH 0x2A 1393*2eeaed14Srobj #define IPMI_ET_PROCMEM_MODULE 0x2B 1394*2eeaed14Srobj #define IPMI_ET_IO_MODULE 0x2C 1395*2eeaed14Srobj #define IPMI_ET_PROCIO_MODULE 0x2D 1396*2eeaed14Srobj #define IPMI_ET_CONTROLLER_FIRMWARE 0x2E 1397*2eeaed14Srobj #define IPMI_ET_CHANNEL 0x2F 1398*2eeaed14Srobj #define IPMI_ET_PCI 0x30 1399*2eeaed14Srobj #define IPMI_ET_PCIE 0x31 1400*2eeaed14Srobj #define IPMI_ET_SCSI 0x32 1401*2eeaed14Srobj #define IPMI_ET_SATA_SAS 0x33 1402*2eeaed14Srobj #define IPMI_ET_FSB 0x34 1403*2eeaed14Srobj #define IPMI_ET_RTC 0x35 14049113a79cSeschrock 14059113a79cSeschrock /* 14069113a79cSeschrock * Get Sensor Reading. See section 35.14. 14079113a79cSeschrock */ 14089113a79cSeschrock 14099113a79cSeschrock #define IPMI_CMD_GET_SENSOR_READING 0x2d 14109113a79cSeschrock 14119113a79cSeschrock typedef struct ipmi_sensor_reading { 14129113a79cSeschrock uint8_t isr_reading; 14132c32020fSeschrock DECL_BITFIELD4( 14142c32020fSeschrock __reserved1 :5, 14152c32020fSeschrock isr_state_unavailable :1, 1416*2eeaed14Srobj isr_scanning_enabled :1, 1417*2eeaed14Srobj isr_event_enabled :1); 14189113a79cSeschrock uint16_t isr_state; 14199113a79cSeschrock } ipmi_sensor_reading_t; 14209113a79cSeschrock 1421*2eeaed14Srobj #define IPMI_SENSOR_THRESHOLD_LOWER_NONCRIT 0x0001 1422*2eeaed14Srobj #define IPMI_SENSOR_THRESHOLD_LOWER_CRIT 0x0002 1423*2eeaed14Srobj #define IPMI_SENSOR_THRESHOLD_LOWER_NONRECOV 0x0004 1424*2eeaed14Srobj #define IPMI_SENSOR_THRESHOLD_UPPER_NONCRIT 0x0008 1425*2eeaed14Srobj #define IPMI_SENSOR_THRESHOLD_UPPER_CRIT 0x0010 1426*2eeaed14Srobj #define IPMI_SENSOR_THRESHOLD_UPPER_NONRECOV 0x0020 1427*2eeaed14Srobj 14289113a79cSeschrock extern ipmi_sensor_reading_t *ipmi_get_sensor_reading(ipmi_handle_t *, uint8_t); 14299113a79cSeschrock 14309113a79cSeschrock /* 14319113a79cSeschrock * Set Sensor Reading. See section 35.14. 14329113a79cSeschrock */ 14339113a79cSeschrock #define IPMI_CMD_SET_SENSOR_READING 0x30 14349113a79cSeschrock 14359113a79cSeschrock #define IPMI_SENSOR_OP_CLEAR 0x3 /* clear '0' bits */ 14369113a79cSeschrock #define IPMI_SENSOR_OP_SET 0x2 /* set '1' bits */ 14379113a79cSeschrock #define IPMI_SENSOR_OP_EXACT 0x1 /* set bits exactly */ 14389113a79cSeschrock 14399113a79cSeschrock typedef struct ipmi_set_sensor_reading { 14409113a79cSeschrock uint8_t iss_id; 14412c32020fSeschrock DECL_BITFIELD5( 14422c32020fSeschrock iss_set_reading :1, 14432c32020fSeschrock __reserved :1, 14442c32020fSeschrock iss_deassrt_op :2, 14452c32020fSeschrock iss_assert_op :2, 14462c32020fSeschrock iss_data_bytes :2); 14479113a79cSeschrock uint8_t iss_sensor_reading; 14489113a79cSeschrock uint16_t iss_assert_state; /* optional */ 14499113a79cSeschrock uint16_t iss_deassert_state; /* optional */ 14509113a79cSeschrock uint8_t iss_event_data1; /* optional */ 14519113a79cSeschrock uint8_t iss_event_data2; /* optional */ 14529113a79cSeschrock uint8_t iss_event_data3; /* optional */ 14539113a79cSeschrock } ipmi_set_sensor_reading_t; 14549113a79cSeschrock 14559113a79cSeschrock extern int ipmi_set_sensor_reading(ipmi_handle_t *, 14569113a79cSeschrock ipmi_set_sensor_reading_t *); 14579113a79cSeschrock 14589113a79cSeschrock /* 14594557a2a1Srobj * These IPMI message id/opcodes are documented in Appendix G in the IPMI spec. 14604557a2a1Srobj * 14614557a2a1Srobj * Payloads for these two commands are described in Sections 34.1 and 34.2 of 14624557a2a1Srobj * the spec, respectively. 14634557a2a1Srobj */ 14644557a2a1Srobj #define IPMI_CMD_GET_FRU_INV_AREA 0x10 14654557a2a1Srobj #define IPMI_CMD_READ_FRU_DATA 0x11 14664557a2a1Srobj 14674557a2a1Srobj /* 14684557a2a1Srobj * Structs to hold the FRU Common Header and the FRU Product Info Area, as 14694557a2a1Srobj * described in the IPMI Platform Management FRU Information Storage 14704557a2a1Srobj * Definition (v1.1). 14714557a2a1Srobj */ 14724557a2a1Srobj typedef struct ipmi_fru_hdr 14734557a2a1Srobj { 14744557a2a1Srobj uint8_t ifh_format; 14754557a2a1Srobj uint8_t ifh_int_use_off; 14764557a2a1Srobj uint8_t ifh_chassis_info_off; 14774557a2a1Srobj uint8_t ifh_board_info_off; 14784557a2a1Srobj uint8_t ifh_product_info_off; 14794557a2a1Srobj uint8_t ifh_multi_rec_off; 14804557a2a1Srobj uint8_t ifh_pad; 14814557a2a1Srobj uint8_t ifh_chksum; 14824557a2a1Srobj } ipmi_fru_hdr_t; 14834557a2a1Srobj 14844557a2a1Srobj /* 14854557a2a1Srobj * Because only 6 bits are used to specify the length of each field in the FRU 14864557a2a1Srobj * product and board info areas, the biggest string we would ever need to hold 14874557a2a1Srobj * would be 63 chars plus a NULL. 14884557a2a1Srobj */ 14894557a2a1Srobj #define FRU_INFO_MAXLEN 64 14904557a2a1Srobj 14914557a2a1Srobj typedef struct ipmi_fru_brd_info 14924557a2a1Srobj { 14934557a2a1Srobj char ifbi_manuf_date[3]; 14944557a2a1Srobj char ifbi_manuf_name[FRU_INFO_MAXLEN]; 14954557a2a1Srobj char ifbi_board_name[FRU_INFO_MAXLEN]; 14964557a2a1Srobj char ifbi_product_serial[FRU_INFO_MAXLEN]; 14974557a2a1Srobj char ifbi_part_number[FRU_INFO_MAXLEN]; 14984557a2a1Srobj } ipmi_fru_brd_info_t; 14994557a2a1Srobj 15004557a2a1Srobj typedef struct ipmi_fru_prod_info 15014557a2a1Srobj { 15024557a2a1Srobj char ifpi_manuf_name[FRU_INFO_MAXLEN]; 15034557a2a1Srobj char ifpi_product_name[FRU_INFO_MAXLEN]; 15044557a2a1Srobj char ifpi_part_number[FRU_INFO_MAXLEN]; 15054557a2a1Srobj char ifpi_product_version[FRU_INFO_MAXLEN]; 15064557a2a1Srobj char ifpi_product_serial[FRU_INFO_MAXLEN]; 15074557a2a1Srobj char ifpi_asset_tag[FRU_INFO_MAXLEN]; 15084557a2a1Srobj } ipmi_fru_prod_info_t; 15094557a2a1Srobj 1510*2eeaed14Srobj extern int ipmi_fru_read(ipmi_handle_t *, ipmi_sdr_fru_locator_t *, char **); 1511*2eeaed14Srobj extern int ipmi_fru_parse_board(ipmi_handle_t *, char *, ipmi_fru_brd_info_t *); 1512*2eeaed14Srobj extern int ipmi_fru_parse_product(ipmi_handle_t *, char *, 1513*2eeaed14Srobj ipmi_fru_prod_info_t *); 1514*2eeaed14Srobj 1515*2eeaed14Srobj /* 1516*2eeaed14Srobj * Routines to convert from entity and sensors defines into text strings. 1517*2eeaed14Srobj */ 1518*2eeaed14Srobj void ipmi_entity_name(uint8_t, char *, size_t); 1519*2eeaed14Srobj void ipmi_sensor_type_name(uint8_t, char *, size_t); 1520*2eeaed14Srobj void ipmi_sensor_reading_name(uint8_t, uint8_t, char *, size_t); 1521*2eeaed14Srobj 1522*2eeaed14Srobj /* 1523*2eeaed14Srobj * Entity management. IPMI has a notion of 'entities', but these are not 1524*2eeaed14Srobj * directly accessible from any commands. Instead, their existence is inferred 1525*2eeaed14Srobj * from examining the SDR repository. Since this is rather unwieldy, and 1526*2eeaed14Srobj * iterating over entities is a common operation, libipmi provides an entity 1527*2eeaed14Srobj * abstraction that hides the implementation details. This handles entity 1528*2eeaed14Srobj * groupings as well as SDR associations. 1529*2eeaed14Srobj */ 1530*2eeaed14Srobj typedef struct ipmi_entity { 1531*2eeaed14Srobj uint8_t ie_type; 1532*2eeaed14Srobj uint8_t ie_instance; 1533*2eeaed14Srobj uint8_t ie_children; 1534*2eeaed14Srobj boolean_t ie_logical; 1535*2eeaed14Srobj } ipmi_entity_t; 1536*2eeaed14Srobj 1537*2eeaed14Srobj extern int ipmi_entity_iter(ipmi_handle_t *, int (*)(ipmi_handle_t *, 1538*2eeaed14Srobj ipmi_entity_t *, void *), void *); 1539*2eeaed14Srobj extern int ipmi_entity_iter_sdr(ipmi_handle_t *, ipmi_entity_t *, 1540*2eeaed14Srobj int (*)(ipmi_handle_t *, ipmi_entity_t *, const char *, ipmi_sdr_t *, 1541*2eeaed14Srobj void *), void *); 1542*2eeaed14Srobj extern int ipmi_entity_iter_children(ipmi_handle_t *, ipmi_entity_t *, 1543*2eeaed14Srobj int (*)(ipmi_handle_t *, ipmi_entity_t *, void *), void *); 1544*2eeaed14Srobj extern ipmi_entity_t *ipmi_entity_lookup(ipmi_handle_t *, uint8_t, 1545*2eeaed14Srobj uint8_t); 1546*2eeaed14Srobj extern ipmi_entity_t *ipmi_entity_lookup_sdr(ipmi_handle_t *, const char *); 1547*2eeaed14Srobj extern ipmi_entity_t *ipmi_entity_parent(ipmi_handle_t *, ipmi_entity_t *); 1548*2eeaed14Srobj extern int ipmi_entity_present(ipmi_handle_t *, ipmi_entity_t *, boolean_t *); 1549*2eeaed14Srobj extern int ipmi_entity_present_sdr(ipmi_handle_t *, ipmi_sdr_t *, boolean_t *); 15504557a2a1Srobj 15514557a2a1Srobj /* 15521af98250Seschrock * User management. The raw functions are private to libipmi, and only the 15531af98250Seschrock * higher level abstraction (ipmi_user_t) is exported to consumers of the 15541af98250Seschrock * library. 15551af98250Seschrock */ 15561af98250Seschrock 15571af98250Seschrock #define IPMI_USER_PRIV_CALLBACK 0x1 15581af98250Seschrock #define IPMI_USER_PRIV_USER 0x2 15591af98250Seschrock #define IPMI_USER_PRIV_OPERATOR 0x3 15601af98250Seschrock #define IPMI_USER_PRIV_ADMIN 0x4 15611af98250Seschrock #define IPMI_USER_PRIV_OEM 0x5 15621af98250Seschrock #define IPMI_USER_PRIV_NONE 0xf 15631af98250Seschrock 15641af98250Seschrock typedef struct ipmi_user { 15651af98250Seschrock uint8_t iu_uid; 15661af98250Seschrock char *iu_name; 15671af98250Seschrock boolean_t iu_enabled; 15681af98250Seschrock boolean_t iu_ipmi_msg_enable; 15691af98250Seschrock boolean_t iu_link_auth_enable; 15701af98250Seschrock uint8_t iu_priv; 15711af98250Seschrock } ipmi_user_t; 15721af98250Seschrock 15731af98250Seschrock extern int ipmi_user_iter(ipmi_handle_t *, 15741af98250Seschrock int (*)(ipmi_user_t *, void *), void *); 15751af98250Seschrock extern ipmi_user_t *ipmi_user_lookup_name(ipmi_handle_t *, const char *); 15761af98250Seschrock extern ipmi_user_t *ipmi_user_lookup_id(ipmi_handle_t *, uint8_t); 15771af98250Seschrock extern int ipmi_user_set_password(ipmi_handle_t *, uint8_t, const char *); 15781af98250Seschrock 15791af98250Seschrock /* 15809113a79cSeschrock * The remaining functions are private to the implementation of the Sun ILOM 15819113a79cSeschrock * service processor. These function first check the manufacturer from the IPMI 15829113a79cSeschrock * device ID, and will return EIPMI_NOT_SUPPORTED if attempted for non-Sun 15839113a79cSeschrock * devices. 15849113a79cSeschrock */ 15859113a79cSeschrock 15869113a79cSeschrock /* 15879113a79cSeschrock * Sun OEM LED requests. 15889113a79cSeschrock */ 15899113a79cSeschrock 15909113a79cSeschrock #define IPMI_SUNOEM_LED_MODE_OFF 0 15919113a79cSeschrock #define IPMI_SUNOEM_LED_MODE_ON 1 15929113a79cSeschrock #define IPMI_SUNOEM_LED_MODE_STANDBY 2 15939113a79cSeschrock #define IPMI_SUNOEM_LED_MODE_SLOW 3 15949113a79cSeschrock #define IPMI_SUNOEM_LED_MODE_FAST 4 15959113a79cSeschrock 15969113a79cSeschrock /* 15979113a79cSeschrock * These functions take a SDR record and construct the appropriate form of the 15989113a79cSeschrock * above commands. 15999113a79cSeschrock */ 16009113a79cSeschrock extern int ipmi_sunoem_led_set(ipmi_handle_t *, 16019113a79cSeschrock ipmi_sdr_generic_locator_t *, uint8_t); 16029113a79cSeschrock extern int ipmi_sunoem_led_get(ipmi_handle_t *, 16039113a79cSeschrock ipmi_sdr_generic_locator_t *, uint8_t *); 16049113a79cSeschrock 16059113a79cSeschrock /* 16069113a79cSeschrock * Sun OEM uptime. Note that the underlying command returns the uptime in big 16079113a79cSeschrock * endian form. This wrapper automatically converts to the appropriate native 16089113a79cSeschrock * form. 16099113a79cSeschrock */ 16109113a79cSeschrock 16119113a79cSeschrock #define IPMI_CMD_SUNOEM_UPTIME 0x08 16129113a79cSeschrock 16139113a79cSeschrock extern int ipmi_sunoem_uptime(ipmi_handle_t *, uint32_t *, uint32_t *); 16149113a79cSeschrock 16159113a79cSeschrock /* 16169113a79cSeschrock * Sun OEM FRU update. The FRU information is managed through a generic 16179113a79cSeschrock * identifier, and then a type-specific data portion. The wrapper function will 16189113a79cSeschrock * automatically fill in the data length field according to which type is 16199113a79cSeschrock * specified. 16209113a79cSeschrock */ 16219113a79cSeschrock 16229113a79cSeschrock #define IPMI_CMD_SUNOEM_FRU_UPDATE 0x16 16239113a79cSeschrock 16249113a79cSeschrock #define IPMI_SUNOEM_FRU_DIMM 0x00 16259113a79cSeschrock #define IPMI_SUNOEM_FRU_CPU 0x01 16269113a79cSeschrock #define IPMI_SUNOEM_FRU_BIOS 0x02 16279113a79cSeschrock #define IPMI_SUNOEM_FRU_DISK 0x03 16289113a79cSeschrock 16299113a79cSeschrock typedef struct ipmi_sunoem_fru { 16309113a79cSeschrock uint8_t isf_type; 16319113a79cSeschrock uint8_t isf_id; 16329113a79cSeschrock uint8_t isf_datalen; 16339113a79cSeschrock union { 16349113a79cSeschrock struct { 16359113a79cSeschrock uint8_t isf_data[128]; 16369113a79cSeschrock } dimm; 16379113a79cSeschrock struct { 16389113a79cSeschrock uint32_t isf_thermtrip; 16399113a79cSeschrock uint32_t isf_eax; 16409113a79cSeschrock char isf_product[48]; 16419113a79cSeschrock } cpu; 16429113a79cSeschrock struct { 16439113a79cSeschrock char isf_part[16]; 16449113a79cSeschrock char isf_version[16]; 16459113a79cSeschrock } bios; 16469113a79cSeschrock struct { 16479113a79cSeschrock char isf_manufacturer[16]; 16489113a79cSeschrock char isf_model[28]; 16499113a79cSeschrock char isf_serial[20]; 16509113a79cSeschrock char isf_version[8]; 16519113a79cSeschrock char isf_capacity[16]; 16529113a79cSeschrock } disk; 16539113a79cSeschrock } isf_data; 16549113a79cSeschrock } ipmi_sunoem_fru_t; 16559113a79cSeschrock 16569113a79cSeschrock int ipmi_sunoem_update_fru(ipmi_handle_t *, ipmi_sunoem_fru_t *); 16579113a79cSeschrock 16589113a79cSeschrock #pragma pack() 16599113a79cSeschrock 16609113a79cSeschrock #ifdef __cplusplus 16619113a79cSeschrock } 16629113a79cSeschrock #endif 16639113a79cSeschrock 16649113a79cSeschrock #endif /* _LIBIPMI_H */ 1665