xref: /titanic_52/usr/src/lib/libc/amd64/unwind/reg_num.h (revision bdfc6d18da790deeec2e0eb09c625902defe2498)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 /*
28  * DWARF register numbers for AMD64
29  */
30 
31 #ifndef _REG_NUM_H
32 #define	_REG_NUM_H
33 
34 #pragma ident	"%Z%%M%	%I%	%E% SMI"
35 
36 /*
37  * Dwarf register numbers for AMD64
38  * Only those with trailing comments are actually tracked
39  */
40 #define	GPR_RAX	0
41 #define	GPR_RDX	1
42 #define	GPR_RCX	2
43 #define	GPR_RBX	3	/* callee saves */
44 #define	GPR_RSI	4
45 #define	GPR_RDI	5
46 #define	FP_RBP	6	/* callee saves (optional frame pointer) */
47 #define	SP_RSP	7	/* stack pointer */
48 #define	EIR_R8	8
49 #define	EIR_R9	9
50 #define	EIR_R10	10
51 #define	EIR_R11	11
52 #define	EIR_R12	12	/* callee saves */
53 #define	EIR_R13	13	/* callee saves */
54 #define	EIR_R14	14	/* callee saves */
55 #define	EIR_R15	15	/* callee saves */
56 #define	RET_ADD	16	/* virtual register - really caller's PC */
57 #define	CF_ADDR	17	/* virtual register - tracks frame location */
58 
59 #if 0
60 #define	SSE_XMM0	17
61 #define	SSE_XMM1	18
62 #define	SSE_XMM2	19
63 #define	SSE_XMM3	20
64 #define	SSE_XMM4	21
65 #define	SSE_XMM5	22
66 #define	SSE_XMM6	23
67 #define	SSE_XMM7	24
68 #define	SSE_XMM8	25
69 #define	SSE_XMM9	26
70 #define	SSE_XMM10	27
71 #define	SSE_XMM11	28
72 #define	SSE_XMM12	29
73 #define	SSE_XMM13	30
74 #define	SSE_XMM14	31
75 #define	SSE_XMM15	32
76 #define	FP_ST0		33
77 #define	FP_ST1		34
78 #define	FP_ST2		35
79 #define	FP_ST3		36
80 #define	FP_ST4		37
81 #define	FP_ST5		38
82 #define	FP_ST6		39
83 #define	FP_ST7		40
84 #define	MMX_MMN0	41
85 #define	MMX_MMN1	42
86 #define	MMX_MMN2	43
87 #define	MMX_MMN3	44
88 #define	MMX_MMN4	45
89 #define	MMX_MMN5	46
90 #define	MMX_MMN6	47
91 #define	MMX_MMN7	48
92 #endif
93 #define	BAD_REG		49
94 
95 /*
96  * register arrays used in support routines contain 16 8-byte slots
97  * indexed from GPR_RAX to EIR_R15
98  *
99  *	%rax	0	0	<undefined>
100  *	%rdx	1	8	handler parameter
101  *	%rcx	2	16	handler parameter
102  *	%rbx	3	24	preserved
103  *	%rsi	4	32	handler parameter
104  *	%rdi	5	40	handler parameter
105  *	%rbp	6	48	frame pointer
106  *	%rsp	7	56	stack pointer
107  *	%r8	8	64	<undefined>
108  *	%r9	9	72	<undefined>
109  *	%r10	10	80	<undefined>
110  *	%r11	11	88	<undefined>
111  *	%r12	12	96	preserved
112  *	%r13	13	104	preserved
113  *	%r14	14	112	preserved
114  *	%r15	15	120	preserved
115  *
116  * register state arrays used to hold propagation information
117  * have two additional elements (indices RET_ADD and CF_ADDR)
118  */
119 
120 #endif	/* _REG_NUM_H */
121