xref: /titanic_52/usr/src/lib/libc/amd64/gen/cache.h (revision 0eb822a1c0c2bea495647510b75f77f0e57633eb)
1 /*
2  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 #ifndef	_AMD64CACHE_H
7 #define	_AMD64CACHE_H
8 
9 #pragma ident	"%Z%%M%	%I%	%E% SMI"
10 
11 #ifdef	__cplusplus
12 extern "C" {
13 #endif
14 
15 #ifdef _ASM	/* The remainder of this file is only for assembly files */
16 
17 /*
18  * Copyright (c) 2002 Advanced Micro Devices, Inc.
19  *
20  * All rights reserved.
21  *
22  * Redistribution and  use in source and binary  forms, with or
23  * without  modification,  are   permitted  provided  that  the
24  * following conditions are met:
25  *
26  * + Redistributions  of source  code  must  retain  the  above
27  *   copyright  notice,   this  list  of   conditions  and  the
28  *   following disclaimer.
29  *
30  * + Redistributions  in binary  form must reproduce  the above
31  *   copyright  notice,   this  list  of   conditions  and  the
32  *   following  disclaimer in  the  documentation and/or  other
33  *   materials provided with the distribution.
34  *
35  * + Neither the  name of Advanced Micro Devices,  Inc. nor the
36  *   names  of  its contributors  may  be  used  to endorse  or
37  *   promote  products  derived   from  this  software  without
38  *   specific prior written permission.
39  *
40  * THIS  SOFTWARE  IS PROVIDED  BY  THE  COPYRIGHT HOLDERS  AND
41  * CONTRIBUTORS AS IS AND  ANY EXPRESS OR IMPLIED WARRANTIES,
42  * INCLUDING,  BUT NOT  LIMITED TO,  THE IMPLIED  WARRANTIES OF
43  * MERCHANTABILITY  AND FITNESS  FOR A  PARTICULAR  PURPOSE ARE
44  * DISCLAIMED.  IN  NO  EVENT  SHALL  ADVANCED  MICRO  DEVICES,
45  * INC.  OR CONTRIBUTORS  BE LIABLE  FOR ANY  DIRECT, INDIRECT,
46  * INCIDENTAL,  SPECIAL,  EXEMPLARY,  OR CONSEQUENTIAL  DAMAGES
47  * (INCLUDING,  BUT NOT LIMITED  TO, PROCUREMENT  OF SUBSTITUTE
48  * GOODS  OR  SERVICES;  LOSS  OF  USE, DATA,  OR  PROFITS;  OR
49  * BUSINESS INTERRUPTION)  HOWEVER CAUSED AND ON  ANY THEORY OF
50  * LIABILITY,  WHETHER IN CONTRACT,  STRICT LIABILITY,  OR TORT
51  * (INCLUDING NEGLIGENCE  OR OTHERWISE) ARISING IN  ANY WAY OUT
52  * OF THE  USE  OF  THIS  SOFTWARE, EVEN  IF  ADVISED  OF  THE
53  * POSSIBILITY OF SUCH DAMAGE.
54  *
55  * It is  licensee's responsibility  to comply with  any export
56  * regulations applicable in licensee's jurisdiction.
57  *
58  * $Header: /K8_Projects/Glibc/amd64cache.h 3     7/28/04 18:13 Emenezes $
59  */
60 
61 	.equiv CPUIDLARGESTFUNCTION,	0	   /* value in EAX */
62 	.equiv CPUIDVENDORID,		0	   /* string in EBX:EDX:ECX */
63 	.equiv CPUIDFEATURE,		1	   /* value in EDX */
64 	.equiv CPUIDSIGNATURE,		1	   /* value in EAX */
65 	.equiv CPUIDLARGESTFUNCTIONEX,	0x80000000 /* value in EAX */
66 	.equiv AMDIDSIGNATUREEX,	0x80000001 /* value in EAX */
67 	.equiv AMDIDFEATUREEX,		0x80000001 /* value in EDX */
68 	.equiv AMDIDNAME,		0x80000002
69 	/* string in EAX:EBX:ECX:EDX, also in CPUIDNAME + 1 and CPUIDNAME + 2 */
70 	.equiv AMDIDL1INFO,		0x80000005
71 	/* values in EAX, EBX, ECX and EDX */
72 	.equiv AMDIDL2INFO,		0x80000006
73 	/* values in EAX, EBX, ECX and EDX */
74 
75 	.equiv AMDFAMILYK8, 0x0f
76 	.equiv AMDSTEPK8C0, 0x08
77 
78 	.equiv AMD64PAGESIZE, 4096
79 	.equiv AMD64PAGEMASK, 4095
80 
81 	.extern .amd64cache1, .amd64cache1half, .amd64cache2, .amd64cache2half
82 
83 	.extern __amd64id
84 
85 #endif /* _ASM */
86 
87 #ifdef	__cplusplus
88 }
89 #endif
90 
91 #endif /* _AMD64CACHE_H */
92