1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26#pragma dictionary "PCIEX" 27 28#include <fm/topo_hc.h> 29 30/* 31 * FIT rates - assume leaf devices are somewhat less reliable than 32 * root complexes, switches and bridges 33 */ 34#define PCIEX_RC_FIT 500 35#define PCIEX_SW_FIT 500 36#define PCIEX_BDG_FIT 500 37#define PCIEX_DEV_FIT 1000 38#define PCIEX_RC_INV_FIT 500 39#define PCIEX_DEV_INV_FIT 1000 40#define PCIEX_RC_NR_FIT 500 41#define PCIEX_SW_NR_FIT 500 42#define PCIEX_BDG_NR_FIT 500 43#define PCIEX_DEV_NR_FIT 1000 44#define PCIEX_BUS_FIT 500 45#define PCIEX_BUS_NR_FIT 500 46 47/* 48 * SERD parameters. 49 * 50 * PCI Express correctable link errors are automatically handled by the 51 * hardware, so have relatively little impact and we can allow quite a 52 * high frequency. We will also be quite conservative about nonfatal internal 53 * errors reported by the driver. 54 * 55 * Nonfatal dpe errors (ptlp/ecrc errors) have to be recovered by the hardened 56 * driver which may cause intermittant performance/responsiveness problems, so 57 * we have tighter serd parameters for these. These are most likely errors in 58 * buffers/caches within devices and bridges, so use similar rates to cpu 59 * data cache parity errors. 60 */ 61#define CORRLINK_COUNT 6 62#define CORRLINK_TIME 2h 63#define BTLP_COUNT 6 64#define BTLP_TIME 2h 65#define BDLLP_COUNT 6 66#define BDLLP_TIME 2h 67#define RTO_COUNT 6 68#define RTO_TIME 2h 69#define RNR_COUNT 6 70#define RNR_TIME 2h 71#define RE_COUNT 6 72#define RE_TIME 2h 73#define NONFATAL_DPE_COUNT 3 74#define NONFATAL_DPE_TIME 168h 75 76/* 77 * if the source-id payload is valid, then check it matches 78 */ 79#define SOURCE_ID_MATCHES_BDF \ 80 (!payloadprop_defined("source-valid") || \ 81 payloadprop("source-valid") == 0 || \ 82 payloadprop("source-id") == ((b << 8) | (d << 3) | f)) 83 84#define SOURCE_ID_MATCHES_OWN_BDF \ 85 (payloadprop_defined("source-valid") && \ 86 payloadprop("source-valid") == 1 && \ 87 payloadprop("source-id") == (confprop(pciexrc, TOPO_PCI_BDF) + 0)) 88 89/* 90 * Other useful macros. These use the EXCAP property (PCI Express Capabilities 91 * register) to find the type for PCI Express devices, and the CLASS-CODE 92 * property (PCI Class Code register) for to find the type of PCI devices behind 93 * a PCI Express-PCI bridge - note that 60400 and 60401 are defined as PCI-PCI 94 * bridges, everything else is consider a PCI leaf device. 95 */ 96#define PCIEXFN pciexbus/pciexdev/pciexfn 97#define PCIEXFNHZ pciexbus<>/pciexdev<>/pciexfn<> 98#define PCIEXFN1 pciexbus[b]/pciexdev[d]/pciexfn[f] 99#define PCIFN pcibus/pcidev/pcifn 100#define PCIFNHZ pcibus<>/pcidev<>/pcifn<> 101#define PCIFN1 pcibus[b]/pcidev[d]/pcifn[f] 102#define IS_LF(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexdev") 103#define IS_BG(f) (confprop(f, TOPO_PCI_EXCAP) == "pcibus") 104#define IS_SD(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswd") 105#define IS_SU(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswu") 106#define IS_PCI_LF(f) (confprop_defined(f, TOPO_PCI_CLASS) && \ 107 confprop(f, TOPO_PCI_CLASS) != "60400" && \ 108 confprop(f, TOPO_PCI_CLASS) != "60401") 109 110/* 111 * define faults 112 */ 113event fault.io.pciex.fw_corrupt@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 114event fault.io.pciex.fw_mismatch@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 115 116event fault.io.pciex.device-interr@PCIEXFN, FITrate=PCIEX_DEV_FIT; 117 118event fault.io.pciex.device-interr-deg@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 119 120engine serd.io.pciex.flt-nf@PCIEXFN, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 121event fault.io.pciex.device-interr-unaf@PCIEXFN, FITrate=PCIEX_DEV_FIT, 122 engine=serd.io.pciex.flt-nf@PCIEXFN; 123 124engine serd.io.device.nonfatal@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME; 125event fault.io.pciex.device-interr-corr@PCIEXFN, FITrate=PCIEX_DEV_FIT, 126 engine=serd.io.device.nonfatal@PCIEXFN; 127engine serd.io.device.nonfatal@PCIEXFN/PCIEXFN, 128 N=CORRLINK_COUNT, T=CORRLINK_TIME; 129event fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN, FITrate=PCIEX_DEV_FIT, 130 engine=serd.io.device.nonfatal@PCIEXFN/PCIEXFN; 131engine serd.io.device.nonfatal@pciexrc/PCIEXFN, 132 N=CORRLINK_COUNT, T=CORRLINK_TIME; 133event fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN, FITrate=PCIEX_DEV_FIT, 134 engine=serd.io.device.nonfatal@pciexrc/PCIEXFN; 135 136event fault.io.pciex.device-interr@pciexrc, FITrate=PCIEX_RC_FIT; 137 138event fault.io.pciex.device-interr-deg@pciexrc, FITrate=PCIEX_RC_FIT, retire=0; 139 140engine serd.io.pciex.flt-nf@pciexrc, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 141event fault.io.pciex.device-interr-unaf@pciexrc, FITrate=PCIEX_RC_FIT, 142 engine=serd.io.pciex.flt-nf@pciexrc; 143 144engine serd.io.device.nonfatal@pciexrc, N=CORRLINK_COUNT, T=CORRLINK_TIME; 145event fault.io.pciex.device-interr-corr@pciexrc, FITrate=PCIEX_RC_FIT, 146 engine=serd.io.device.nonfatal@pciexrc; 147 148event fault.io.pciex.device-invreq@PCIEXFN, FITrate=PCIEX_DEV_INV_FIT; 149 150event fault.io.pciex.device-invreq@pciexrc, FITrate=PCIEX_RC_FIT; 151 152event fault.io.pciex.device-noresp@PCIEXFN, FITrate=PCIEX_DEV_NR_FIT; 153 154event fault.io.pciex.device-noresp@pciexrc, FITrate=PCIEX_RC_NR_FIT; 155 156event fault.io.pciex.bus-noresp@PCIEXFN, FITrate=PCIEX_BUS_NR_FIT; 157 158event fault.io.pciex.bus-linkerr@PCIEXFN, FITrate=PCIEX_BUS_FIT; 159 160engine serd.io.pciex.corrlink-bus@pciexrc/PCIEXFN, 161 N=CORRLINK_COUNT, T=CORRLINK_TIME; 162event fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN, FITrate=PCIEX_BUS_FIT, 163 engine=serd.io.pciex.corrlink-bus@pciexrc/PCIEXFN; 164engine serd.io.pciex.corrlink-bus@PCIEXFN/PCIEXFN, 165 N=CORRLINK_COUNT, T=CORRLINK_TIME; 166event fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN, FITrate=PCIEX_BUS_FIT, 167 engine=serd.io.pciex.corrlink-bus@PCIEXFN/PCIEXFN; 168 169/* 170 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 171 * Handling of leaf driver detected internal errors. Use serd engine if 172 * no service impact - otherwise fail immediately 173 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 174 */ 175event ereport.io.device.inval_state@PCIEXFN{within(5s)}; 176event ereport.io.device.no_response@PCIEXFN{within(5s)}; 177event ereport.io.device.stall@PCIEXFN{within(5s)}; 178event ereport.io.device.badint_limit@PCIEXFN{within(5s)}; 179event ereport.io.device.intern_corr@PCIEXFN{within(5s)}; 180event ereport.io.device.intern_uncorr@PCIEXFN{within(5s)}; 181event ereport.io.service.lost@PCIEXFN{within(5s)}; 182event ereport.io.service.degraded@PCIEXFN{within(5s)}; 183event ereport.io.service.unaffected@PCIEXFN{within(5s)}; 184event ereport.io.service.restored@PCIEXFN{within(30s)}; 185event ereport.io.service.lost@PCIFN{within(5s)}; 186event ereport.io.service.degraded@PCIFN{within(5s)}; 187event ereport.io.service.unaffected@PCIFN{within(5s)}; 188 189event error.io.pciex.noimpact-d@PCIEXFN; 190event error.io.pciex.degraded-d@PCIEXFN; 191event error.io.pciex.lost-d@PCIEXFN; 192event error.io.service.restored@PCIEXFN; 193event error.io.service.restored@PCIFN; 194event error.io.device.nf-device@PCIEXFN; 195event error.io.device.deg-device@PCIEXFN; 196event error.io.device.f-device@PCIEXFN; 197 198prop error.io.device.f-device@PCIEXFN (1)-> 199 ereport.io.device.inval_state@PCIEXFN, 200 ereport.io.device.no_response@PCIEXFN, 201 ereport.io.device.stall@PCIEXFN, 202 ereport.io.device.badint_limit@PCIEXFN, 203 ereport.io.device.intern_corr@PCIEXFN, 204 ereport.io.device.intern_uncorr@PCIEXFN; 205 206prop error.io.device.f-device@PCIEXFN (0)-> 207 error.io.pciex.lost-d@PCIEXFN; 208 209prop error.io.device.deg-device@PCIEXFN (1)-> 210 ereport.io.device.inval_state@PCIEXFN, 211 ereport.io.device.no_response@PCIEXFN, 212 ereport.io.device.stall@PCIEXFN, 213 ereport.io.device.badint_limit@PCIEXFN, 214 ereport.io.device.intern_corr@PCIEXFN, 215 ereport.io.device.intern_uncorr@PCIEXFN; 216 217prop error.io.device.deg-device@PCIEXFN (1)-> 218 error.io.pciex.degraded-d@PCIEXFN; 219 220prop error.io.device.nf-device@PCIEXFN (1)-> 221 ereport.io.device.inval_state@PCIEXFN, 222 ereport.io.device.no_response@PCIEXFN, 223 ereport.io.device.stall@PCIEXFN, 224 ereport.io.device.badint_limit@PCIEXFN, 225 ereport.io.device.intern_corr@PCIEXFN, 226 ereport.io.device.intern_uncorr@PCIEXFN; 227 228prop error.io.device.nf-device@PCIEXFN (1)-> 229 error.io.pciex.noimpact-d@PCIEXFN; 230 231/* 232 * handling of service impact ereports. 233 */ 234prop error.io.pciex.lost-d@PCIEXFN (1)-> 235 ereport.io.service.lost@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 236 ereport.io.service.lost@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 237 238prop error.io.pciex.lost-d@PCIEXFN (0)-> 239 ereport.io.service.unaffected@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 240 ereport.io.service.unaffected@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }, 241 ereport.io.service.degraded@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 242 ereport.io.service.degraded@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 243 244prop error.io.pciex.degraded-d@PCIEXFN (1)-> 245 ereport.io.service.degraded@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 246 ereport.io.service.degraded@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 247 248prop error.io.pciex.degraded-d@PCIEXFN (0)-> 249 ereport.io.service.unaffected@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 250 ereport.io.service.unaffected@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 251 252prop error.io.pciex.noimpact-d@PCIEXFN (1)-> 253 ereport.io.service.unaffected@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 254 ereport.io.service.unaffected@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }, 255 error.io.service.restored@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 256 error.io.service.restored@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 257 258prop error.io.service.restored@PCIEXFN (1)-> 259 ereport.io.service.lost@PCIEXFN, 260 ereport.io.service.degraded@PCIEXFN; 261 262prop error.io.service.restored@PCIEXFN (1)-> 263 ereport.io.service.restored@PCIEXFN; 264 265/* 266 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 267 * A faulty PCI Express hostbridge (root complex) may cause: 268 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 269 * - nr-d: the device not to respond to a valid upstream request 270 * - ca-d: the device to completer abort a valid upstream request 271 * - mtlp-d: a malformed tlp to be transmitted downstream 272 * - badreq-d: a bad downstream request - not CRC error (may cause 273 * completer to respond with ur or ca) 274 * - ecrcreq-d: TLP with end-to-end CRC error transmitted downstream 275 * - ecrccomp-d: TLP with end-to-end CRC error transmitted downstream 276 * - poisreq-d: poisoned request transmitted downstream 277 * - poiscomp-d: poisoned completion transmitted downstream 278 * - corrlink: correctable link or physical level error 279 * - fatlink: fatal link or physical level error 280 */ 281event error.io.pciex.nr-d@pciexrc/PCIEXFN; 282event error.io.pciex.ca-d@pciexrc/PCIEXFN; 283event error.io.pciex.mtlp-d@pciexrc/PCIEXFN; 284event error.io.pciex.fatlink@pciexrc/PCIEXFN; 285event error.io.pciex.badreq-d@pciexrc/PCIEXFN; 286event error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFN; 287event error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFN; 288event error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFN; 289event ereport.io.pciex.dl.btlp@pciexrc{within(5s)}; 290event ereport.io.pciex.dl.bdllp@pciexrc{within(5s)}; 291event ereport.io.pciex.dl.rto@pciexrc{within(5s)}; 292event ereport.io.pciex.dl.rnr@pciexrc{within(5s)}; 293event ereport.io.pciex.pl.re@pciexrc{within(5s)}; 294event ereport.io.pciex.dl.btlp@pciexrc/PCIEXFN{within(5s)}; 295event ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFN{within(5s)}; 296event ereport.io.pciex.dl.rto@pciexrc/PCIEXFN{within(5s)}; 297event ereport.io.pciex.dl.rnr@pciexrc/PCIEXFN{within(5s)}; 298event ereport.io.pciex.pl.re@pciexrc/PCIEXFN{within(5s)}; 299 300prop fault.io.pciex.device-noresp@pciexrc (1)-> 301 error.io.pciex.nr-d@pciexrc/PCIEXFNHZ; 302 303prop fault.io.pciex.device-invreq@pciexrc (1)-> 304 error.io.pciex.badreq-d@pciexrc/PCIEXFNHZ; 305 306prop fault.io.pciex.device-interr-corr@pciexrc { 307 payloadprop_defined("detector") && setserdsuffix("_btlp") && 308 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 309 ereport.io.pciex.dl.btlp@pciexrc, 310 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 311 312prop fault.io.pciex.device-interr-corr@pciexrc { 313 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 314 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 315 ereport.io.pciex.dl.bdllp@pciexrc, 316 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 317 318prop fault.io.pciex.device-interr-corr@pciexrc { 319 payloadprop_defined("detector") && setserdsuffix("_rto") && 320 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 321 ereport.io.pciex.dl.rto@pciexrc, 322 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 323 324prop fault.io.pciex.device-interr-corr@pciexrc { 325 payloadprop_defined("detector") && setserdsuffix("_rnr") && 326 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 327 ereport.io.pciex.dl.rnr@pciexrc, 328 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 329 330prop fault.io.pciex.device-interr-corr@pciexrc { 331 payloadprop_defined("detector") && setserdsuffix("_re") && 332 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 333 ereport.io.pciex.pl.re@pciexrc, 334 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 335 336prop fault.io.pciex.device-interr-unaf@pciexrc (1)-> 337 error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFNHZ; 338 339prop fault.io.pciex.device-interr-deg@pciexrc (1)-> 340 error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFNHZ; 341 342prop fault.io.pciex.device-interr@pciexrc (1)-> 343 error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFNHZ, 344 error.io.pciex.ca-d@pciexrc/PCIEXFNHZ, 345 error.io.pciex.mtlp-d@pciexrc/PCIEXFNHZ, 346 error.io.pciex.fatlink@pciexrc/PCIEXFNHZ; 347 348/* 349 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 350 * A faulty PCI Express leaf device or upstream switch port may cause: 351 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 352 * - flt-nr-u: the device not to respond to a valid downstream request 353 * - flt-ca-u: the device to completer abort a valid downstream request 354 * - flt-badreq-u: a bad upstream request - not CRC error (may cause 355 * completer to respond with ur or ca) - leaf only 356 * - flt-mtlp-u: a malformed tlp transmitted upstream - leaf only 357 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 358 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 359 * - flt-poisreq-u: poisoned request transmitted upstream 360 * - flt-poiscomp-u: poisoned completion transmitted upstream 361 * - device: internal error reported by leaf device 362 * - corrlink: correctable link or physical level error 363 * - fatlink: fatal link or physical level error 364 */ 365 366event error.io.pciex.flt-nr-u@PCIEXFN; 367event error.io.pciex.flt-ca-u@PCIEXFN; 368event error.io.pciex.flt-mtlp-u@PCIEXFN; 369event error.io.pciex.fatlink@PCIEXFN; 370event error.io.pciex.flt-badreq-u@PCIEXFN; 371event error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 372event error.io.pciex.flt-f-poisecrc-u@PCIEXFN; 373event error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 374event ereport.io.pciex.dl.btlp@PCIEXFN{within(5s)}; 375event ereport.io.pciex.dl.bdllp@PCIEXFN{within(5s)}; 376event ereport.io.pciex.dl.rto@PCIEXFN{within(5s)}; 377event ereport.io.pciex.dl.rnr@PCIEXFN{within(5s)}; 378event ereport.io.pciex.pl.re@PCIEXFN{within(5s)}; 379event ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFN{within(5s)}; 380event ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFN{within(5s)}; 381event ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFN{within(5s)}; 382event ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFN{within(5s)}; 383event ereport.io.pciex.pl.re@PCIEXFN/PCIEXFN{within(5s)}; 384event ereport.io.device.fw_corrupt@PCIEXFN{within(5s)}; 385event ereport.io.device.fw_mismatch@PCIEXFN{within(5s)}; 386 387prop fault.io.pciex.device-noresp@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 388 error.io.pciex.flt-nr-u@PCIEXFN; 389 390prop fault.io.pciex.device-noresp@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 391 error.io.pciex.flt-nr-u@PCIEXFN; 392 393prop fault.io.pciex.device-invreq@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 394 error.io.pciex.flt-badreq-u@PCIEXFN; 395 396prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 397 payloadprop_defined("detector") && setserdsuffix("_btlp") && 398 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 399 ereport.io.pciex.dl.btlp@pciexrc, 400 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 401 402prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 403 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 404 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 405 ereport.io.pciex.dl.bdllp@pciexrc, 406 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 407 408prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 409 payloadprop_defined("detector") && setserdsuffix("_rto") && 410 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 411 ereport.io.pciex.dl.rto@pciexrc, 412 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 413 414prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 415 payloadprop_defined("detector") && setserdsuffix("_rnr") && 416 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 417 ereport.io.pciex.dl.rnr@pciexrc, 418 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 419 420prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 421 payloadprop_defined("detector") && setserdsuffix("_re") && 422 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 423 ereport.io.pciex.pl.re@pciexrc, 424 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 425 426prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 427 !IS_SD(PCIEXFN/PCIEXFN) && 428 payloadprop_defined("detector") && setserdsuffix("_btlp") && 429 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 430 ereport.io.pciex.dl.btlp@PCIEXFN, 431 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 432 433prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 434 !IS_SD(PCIEXFN/PCIEXFN) && 435 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 436 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 437 ereport.io.pciex.dl.bdllp@PCIEXFN, 438 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 439 440prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 441 !IS_SD(PCIEXFN/PCIEXFN) && 442 payloadprop_defined("detector") && setserdsuffix("_rto") && 443 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 444 ereport.io.pciex.dl.rto@PCIEXFN, 445 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 446 447prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 448 !IS_SD(PCIEXFN/PCIEXFN) && 449 payloadprop_defined("detector") && setserdsuffix("_rnr") && 450 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 451 ereport.io.pciex.dl.rnr@PCIEXFN, 452 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 453 454prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 455 !IS_SD(PCIEXFN/PCIEXFN) && 456 payloadprop_defined("detector") && setserdsuffix("_re") && 457 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 458 ereport.io.pciex.pl.re@PCIEXFN, 459 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 460 461prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 462 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 463 464prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 465 error.io.device.nf-device@PCIEXFN; 466 467prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 468 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 469 470prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 471 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 472 473prop fault.io.pciex.device-interr@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 474 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 475 error.io.pciex.flt-ca-u@PCIEXFN, 476 error.io.pciex.fatlink@PCIEXFN; 477 478prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 479 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 480 error.io.device.deg-device@PCIEXFN; 481 482prop fault.io.pciex.device-interr@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 483 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 484 error.io.device.f-device@PCIEXFN, 485 error.io.pciex.flt-ca-u@PCIEXFN, 486 error.io.pciex.flt-mtlp-u@PCIEXFN, 487 error.io.pciex.fatlink@PCIEXFN; 488 489prop fault.io.pciex.fw_corrupt@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 490 ereport.io.device.fw_corrupt@PCIEXFN; 491 492prop fault.io.pciex.fw_corrupt@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 493 ereport.io.service.lost@PCIEXFN, 494 ereport.io.service.degraded@PCIEXFN; 495 496prop fault.io.pciex.fw_mismatch@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 497 ereport.io.device.fw_mismatch@PCIEXFN; 498 499prop fault.io.pciex.fw_mismatch@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 500 ereport.io.service.lost@PCIEXFN, 501 ereport.io.service.degraded@PCIEXFN; 502 503/* 504 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 505 * A faulty PCI Express downstream switch port may cause 506 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 507 * - nr-d: the device not to respond to an upstream request 508 * - ca-d: the device to completer abort an upstream request 509 * - ecrcreq-d: TLP with end-to-end CRC error transmitted upstream 510 * - ecrccomp-d: TLP with end-to-end CRC error transmitted upstream 511 * - poisreq-d: poisoned request transmitted upstream 512 * - poiscomp-d: poisoned completion transmitted upstream 513 * - corrlink: correctable link or physical level error 514 * - fatlink: fatal link or physical level error 515 */ 516 517event error.io.pciex.nr-d@PCIEXFN/PCIEXFN; 518event error.io.pciex.ca-d@PCIEXFN/PCIEXFN; 519event error.io.pciex.fatlink@PCIEXFN/PCIEXFN; 520event error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFN; 521event error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFN; 522event error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFN; 523 524prop fault.io.pciex.device-noresp@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 525 error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ; 526 527prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 528 payloadprop_defined("detector") && setserdsuffix("_btlp") && 529 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 530 ereport.io.pciex.dl.btlp@PCIEXFN, 531 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 532 533prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 534 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 535 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 536 ereport.io.pciex.dl.bdllp@PCIEXFN, 537 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 538 539prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 540 payloadprop_defined("detector") && setserdsuffix("_rto") && 541 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 542 ereport.io.pciex.dl.rto@PCIEXFN, 543 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 544 545prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 546 payloadprop_defined("detector") && setserdsuffix("_rnr") && 547 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 548 ereport.io.pciex.dl.rnr@PCIEXFN, 549 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 550 551prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 552 payloadprop_defined("detector") && setserdsuffix("_re") && 553 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 554 ereport.io.pciex.pl.re@PCIEXFN, 555 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 556 557prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 558 error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFNHZ; 559 560prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 561 error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFNHZ; 562 563prop fault.io.pciex.device-interr@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 564 error.io.pciex.ca-d@PCIEXFN/PCIEXFNHZ, 565 error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFNHZ, 566 error.io.pciex.fatlink@PCIEXFN/PCIEXFNHZ; 567 568/* 569 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 570 * A faulty PCIEX bus may cause: 571 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 572 * - flt-nr-u: a device to not respond because the link is down 573 * - nr-d: a device to not respond because the link is down 574 * - corrlink: correctable link or physical level error 575 * - fatlink: fatal link or physical level error 576 */ 577 578event error.io.pciex.nr-d@PCIEXFN; 579 580prop fault.io.pciex.bus-noresp@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 581 error.io.pciex.flt-nr-u@PCIEXFN, 582 error.io.pciex.nr-d@PCIEXFN; 583 584prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 585 !IS_SD(PCIEXFN/PCIEXFN) && 586 payloadprop_defined("detector") && setserdsuffix("_btlp") && 587 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 588 ereport.io.pciex.dl.btlp@PCIEXFN, 589 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 590 591prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 592 !IS_SD(PCIEXFN/PCIEXFN) && 593 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 594 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 595 ereport.io.pciex.dl.bdllp@PCIEXFN, 596 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 597 598prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 599 !IS_SD(PCIEXFN/PCIEXFN) && 600 payloadprop_defined("detector") && setserdsuffix("_rto") && 601 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 602 ereport.io.pciex.dl.rto@PCIEXFN, 603 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 604 605prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 606 !IS_SD(PCIEXFN/PCIEXFN) && 607 payloadprop_defined("detector") && setserdsuffix("_rnr") && 608 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 609 ereport.io.pciex.dl.rnr@PCIEXFN, 610 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 611 612prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 613 !IS_SD(PCIEXFN/PCIEXFN) && 614 payloadprop_defined("detector") && setserdsuffix("_re") && 615 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 616 ereport.io.pciex.pl.re@PCIEXFN, 617 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 618 619prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 620 payloadprop_defined("detector") && setserdsuffix("_btlp") && 621 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 622 ereport.io.pciex.dl.btlp@pciexrc, 623 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 624 625prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 626 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 627 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 628 ereport.io.pciex.dl.bdllp@pciexrc, 629 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 630 631prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 632 payloadprop_defined("detector") && setserdsuffix("_rto") && 633 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 634 ereport.io.pciex.dl.rto@pciexrc, 635 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 636 637prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 638 payloadprop_defined("detector") && setserdsuffix("_rnr") && 639 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 640 ereport.io.pciex.dl.rnr@pciexrc, 641 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 642 643prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 644 payloadprop_defined("detector") && setserdsuffix("_re") && 645 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 646 ereport.io.pciex.pl.re@pciexrc, 647 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 648 649prop fault.io.pciex.bus-linkerr@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 650 error.io.pciex.fatlink@PCIEXFN; 651 652/* 653 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 654 * A faulty pciex-pci bridge may cause 655 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 656 * The following errors to propagate onto the PCI Express fabric 657 * - flt-nr-u: the device not to respond to a valid downstream request 658 * - flt-ca-u: the device to completer abort a valid downstream request 659 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 660 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 661 * - flt-poisreq-u: poisoned request transmitted upstream 662 * - flt-poiscomp-u: poisoned completion transmitted upstream 663 * - corrlink: correctable link or physical level error upstream 664 * - fatlink: fatal link or physical level error upstream 665 * - sec-interr: internal error on pci express to pci bridge 666 * 667 * And the following errors to propagate onto the secondary pci or pci/x bus 668 * (these will be handled by code in the pci.esc file). 669 * - nr-pw-d: the device not to respond to a valid upstream request 670 * - nr-drw-d: the device not to respond to a valid upstream request 671 * - retry-to-d: failure to retry an downstream delayed request 672 * - ta-pw-d: the device responds with a ta to a valid upstream 673 * request 674 * - ta-drw-d: the device responds with a ta to a valid upstream 675 * request 676 * - ape-d: address/parity to get corrupted during downstream transmission. 677 * - dpe-d: data/parity to get corrupted during downstream transmission. 678 * - scpe-d: split completion to get corrupted during downstream transmission 679 */ 680 681event error.io.pci.ape-d@PCIEXFN/PCIFN; 682event error.io.pci.f-dpe-d@PCIEXFN/PCIFN; 683event error.io.pci.deg-dpe-d@PCIEXFN/PCIFN; 684event error.io.pci.nf-dpe-d@PCIEXFN/PCIFN; 685event error.io.pci.retry-to-d@PCIEXFN/PCIFN; 686event error.io.pci.nr-pw-d@PCIEXFN/PCIFN; 687event error.io.pci.nr-drw-d@PCIEXFN/PCIFN; 688event error.io.pci.ta-pw-d@PCIEXFN/PCIFN; 689event error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 690event error.io.pcix.scpe-d@PCIEXFN/PCIFN; 691event error.io.pciex.sec-interr@PCIEXFN; 692event ereport.io.pci.sec-sta@PCIEXFN{within(5s)}; 693 694prop fault.io.pciex.device-noresp@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 695 error.io.pciex.flt-nr-u@PCIEXFN, 696 error.io.pci.retry-to-d@PCIEXFN/PCIFNHZ, 697 error.io.pci.nr-pw-d@PCIEXFN/PCIFNHZ, 698 error.io.pci.nr-drw-d@PCIEXFN/PCIFNHZ; 699 700prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 701 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN, 702 error.io.pci.nf-dpe-d@PCIEXFN/PCIFNHZ; 703 704prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 705 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 706 error.io.pci.deg-dpe-d@PCIEXFN/PCIFNHZ; 707 708prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 709 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 710 error.io.pciex.flt-ca-u@PCIEXFN, 711 error.io.pciex.flt-mtlp-u@PCIEXFN, 712 error.io.pciex.sec-interr@PCIEXFN, 713 error.io.pciex.fatlink@PCIEXFN, 714 error.io.pci.ta-pw-d@PCIEXFN/PCIFNHZ, 715 error.io.pci.ta-drw-d@PCIEXFN/PCIFNHZ, 716 error.io.pci.ape-d@PCIEXFN/PCIFNHZ, 717 error.io.pcix.scpe-d@PCIEXFN/PCIFNHZ, 718 error.io.pci.f-dpe-d@PCIEXFN/PCIFNHZ; 719 720prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 721 ereport.io.pci.sec-sta@PCIEXFN; 722 723prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 724 ereport.io.pci.sec-sta@PCIEXFN; 725 726/* 727 * the following rules for ptlp and ecrc faults are split into fatal and 728 * nonfatal, depending on the service impact reported by the leaf driver 729 */ 730event error.io.pciex.nf-poisecrc-d@PCIEXFN; 731event error.io.pciex.deg-poisecrc-d@PCIEXFN; 732event error.io.pciex.f-poisecrc-d@PCIEXFN; 733event error.io.pciex.ecrcreq-d@PCIEXFN; 734event error.io.pciex.ecrccomp-d@PCIEXFN; 735event error.io.pciex.poisreq-d@PCIEXFN; 736event error.io.pciex.poiscomp-d@PCIEXFN; 737event error.io.pciex.flt-poisreq-u@PCIEXFN; 738event error.io.pciex.flt-poiscomp-u@PCIEXFN; 739event error.io.pciex.flt-ecrcreq-u@PCIEXFN; 740event error.io.pciex.flt-ecrccomp-u@PCIEXFN; 741 742prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 743 error.io.pciex.ecrcreq-d@PCIEXFN, 744 error.io.pciex.ecrccomp-d@PCIEXFN, 745 error.io.pciex.poisreq-d@PCIEXFN, 746 error.io.pciex.poiscomp-d@PCIEXFN; 747 748prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 749 error.io.pciex.noimpact-d@PCIEXFN; 750 751prop error.io.pciex.f-poisecrc-d@PCIEXFN (1)-> 752 error.io.pciex.ecrcreq-d@PCIEXFN, 753 error.io.pciex.ecrccomp-d@PCIEXFN, 754 error.io.pciex.poisreq-d@PCIEXFN, 755 error.io.pciex.poiscomp-d@PCIEXFN; 756 757prop error.io.pciex.f-poisecrc-d@PCIEXFN (0)-> 758 error.io.pciex.lost-d@PCIEXFN; 759 760prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 761 error.io.pciex.ecrcreq-d@PCIEXFN, 762 error.io.pciex.ecrccomp-d@PCIEXFN, 763 error.io.pciex.poisreq-d@PCIEXFN, 764 error.io.pciex.poiscomp-d@PCIEXFN; 765 766prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 767 error.io.pciex.degraded-d@PCIEXFN; 768 769prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 770 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 771 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 772 error.io.pciex.flt-poisreq-u@PCIEXFN, 773 error.io.pciex.flt-poiscomp-u@PCIEXFN; 774 775prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 776 error.io.pciex.noimpact-d@PCIEXFN; 777 778prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 779 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 780 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 781 error.io.pciex.flt-poisreq-u@PCIEXFN, 782 error.io.pciex.flt-poiscomp-u@PCIEXFN; 783 784prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 785 error.io.pciex.degraded-d@PCIEXFN; 786 787prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (1)-> 788 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 789 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 790 error.io.pciex.flt-poisreq-u@PCIEXFN, 791 error.io.pciex.flt-poiscomp-u@PCIEXFN; 792 793prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (0)-> 794 error.io.pciex.lost-d@PCIEXFN; 795 796/* 797 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 798 * declarations 799 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 800 */ 801event error.io.pciex.fatal@PCIEXFN; 802event error.io.pciex.nonfatal@PCIEXFN; 803event error.io.pciex.nr-fwd-d@PCIEXFN; 804event error.io.pciex.mtlp-fwd-d@PCIEXFN; 805event error.io.pciex.flt-ur-u@PCIEXFN; 806event error.io.pciex.mtlp-d@PCIEXFN; 807event error.io.pciex.ca-d@PCIEXFN; 808event error.io.pciex.ca-fwd-d@PCIEXFN; 809event error.io.pciex.poisreq-fwd-d@PCIEXFN; 810event error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN; 811event error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN; 812event error.io.pciex.poiscomp-fwd-d@PCIEXFN; 813event error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFN; 814event error.io.pciex.ecrcreq-fwd-d@PCIEXFN; 815event error.io.pciex.ecrccomp-fwd-d@PCIEXFN; 816event error.io.pciex.source-ecrcreq-u@PCIEXFN; 817event error.io.pciex.source-ecrccomp-u@PCIEXFN; 818event error.io.pciex.source-poiscomp-u@PCIEXFN; 819event error.io.pciex.source-poisreq-u@PCIEXFN; 820event error.io.pciex.badreq-d@PCIEXFN; 821event error.io.pci.badreq-pw-d@PCIEXFN/PCIFN; 822event error.io.pci.badreq-drw-d@PCIEXFN/PCIFN; 823event error.io.pci.target-ma-d@PCIEXFN; 824event error.io.pci.target-rta-d@PCIEXFN; 825event error.io.pci.dpdata-pw-d@PCIEXFN/PCIFN; 826event error.io.pci.dpdata-dw-d@PCIEXFN/PCIFN; 827event error.io.pci.dpdata-dr-d@PCIEXFN/PCIFN; 828event error.io.pciex.ca-u@PCIEXFN; 829event error.io.pciex.ca-u@PCIEXFN/PCIEXFN; 830event error.io.pciex.ca-u@pciexrc/PCIEXFN; 831event error.io.pciex.ur-u@PCIEXFN; 832event error.io.pciex.ur-u@PCIEXFN/PCIEXFN; 833event error.io.pciex.ur-u@pciexrc/PCIEXFN; 834event error.io.pciex.nr-u@PCIEXFN; 835event error.io.pciex.nr-u@PCIEXFN/PCIEXFN; 836event error.io.pciex.nr-u@pciexrc/PCIEXFN; 837event error.io.pciex.mtlp-u@PCIEXFN; 838event error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN; 839event error.io.pciex.mtlp-u@pciexrc/PCIEXFN; 840event error.io.pciex.badreq-u@PCIEXFN; 841event error.io.pciex.badreq-u@PCIEXFN/PCIEXFN; 842event error.io.pciex.badreq-u@pciexrc/PCIEXFN; 843event error.io.pciex.poisreq-u@PCIEXFN; 844event error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN; 845event error.io.pciex.poisreq-u@pciexrc/PCIEXFN; 846event error.io.pciex.poiscomp-u@PCIEXFN; 847event error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN; 848event error.io.pciex.poiscomp-u@pciexrc/PCIEXFN; 849event error.io.pciex.ecrcreq-u@PCIEXFN; 850event error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN; 851event error.io.pciex.ecrccomp-u@PCIEXFN; 852event error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN; 853 854event ereport.io.pci.ma@PCIEXFN{within(5s)}; 855event ereport.io.pci.mdpe@PCIEXFN{within(5s)}; 856event ereport.io.pci.dpe@PCIEXFN{within(5s)}; 857event ereport.io.pci.rta@PCIEXFN{within(5s)}; 858event ereport.io.pci.sta@PCIEXFN{within(5s)}; 859event ereport.io.pciex.dl.dllp@PCIEXFN{within(5s)}; 860event ereport.io.pciex.pl.te@PCIEXFN{within(5s)}; 861event ereport.io.pciex.pl.sd@PCIEXFN{within(5s)}; 862event ereport.io.pciex.tl.fcp@PCIEXFN{within(5s)}; 863event ereport.io.pciex.tl.rof@PCIEXFN{within(5s)}; 864event ereport.io.pciex.tl.mtlp@PCIEXFN{within(5s)}; 865event ereport.io.pciex.tl.ur@PCIEXFN{within(5s)}; 866event ereport.io.pciex.tl.ca@PCIEXFN{within(5s)}; 867event ereport.io.pciex.tl.ptlp@PCIEXFN{within(5s)}; 868event ereport.io.pciex.tl.ecrc@PCIEXFN{within(5s)}; 869event ereport.io.pciex.tl.uc@PCIEXFN{within(5s)}; 870event ereport.io.pciex.tl.cto@PCIEXFN{within(5s)}; 871event ereport.io.pciex.dl.dllp@pciexrc{within(5s)}; 872event ereport.io.pciex.pl.te@pciexrc{within(5s)}; 873event ereport.io.pciex.pl.sd@pciexrc{within(5s)}; 874event ereport.io.pciex.tl.fcp@pciexrc{within(5s)}; 875event ereport.io.pciex.tl.rof@pciexrc{within(5s)}; 876event ereport.io.pciex.tl.mtlp@pciexrc{within(5s)}; 877event ereport.io.pciex.tl.ur@pciexrc{within(5s)}; 878event ereport.io.pciex.tl.ca@pciexrc{within(5s)}; 879event ereport.io.pciex.tl.ptlp@pciexrc{within(5s)}; 880event ereport.io.pciex.tl.ecrc@pciexrc{within(5s)}; 881event ereport.io.pciex.tl.cto@pciexrc{within(5s)}; 882event ereport.io.pci.sec-ma@pciexrc{within(5s)}; 883event ereport.io.pci.sec-mdpe@pciexrc{within(5s)}; 884event ereport.io.pci.sec-dpe@pciexrc{within(5s)}; 885event ereport.io.pci.sec-rta@pciexrc{within(5s)}; 886event ereport.io.pci.sec-sta@pciexrc{within(5s)}; 887event ereport.io.pci.sec-mdpe@PCIEXFN{within(5s)}; 888event ereport.io.pci.sec-dpe@PCIEXFN{within(5s)}; 889event ereport.io.pci.sec-rserr@PCIEXFN{within(5s)}; 890event ereport.io.pci.sserr@PCIEXFN{within(5s)}; 891event ereport.io.pci.sec-rserr@pciexrc{within(5s)}; 892event ereport.io.pciex.rc.fe-msg@pciexrc{within(5s)}; 893event ereport.io.pciex.rc.nfe-msg@pciexrc{within(5s)}; 894event ereport.io.pciex.rc.mue-msg@pciexrc{within(5s)}; 895event ereport.io.pciex.bdg.sec-interr@PCIEXFN{within(5s)}; 896event ereport.io.pciex.bdg.sec-ude@PCIEXFN{within(5s)}; 897event ereport.io.pci.target-mdpe@PCIEXFN{within(5s)}; 898event ereport.io.pci.target-mdpe@PCIFN{within(5s)}; 899 900/* 901 * handling of fatal and nonfatal error messages propagated up to root complex 902 * 903 * Use these for errors reported by root-complex on behalf of another device. 904 * Can use source-id payload to identify where the message came from. 905 */ 906prop error.io.pciex.fatal@PCIEXFN1 (1)-> 907 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 908 ereport.io.pciex.rc.fe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 909 SOURCE_ID_MATCHES_BDF }; 910 911prop error.io.pciex.fatal@PCIEXFN (0)-> 912 ereport.io.pci.sserr@PCIEXFN; 913 914prop error.io.pciex.fatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 915 ereport.io.pci.sserr@PCIEXFN1, 916 ereport.io.pci.sec-rserr@PCIEXFN1; 917 918prop error.io.pciex.fatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 919 ereport.io.pci.sec-rserr@pciexrc; 920 921prop error.io.pciex.nonfatal@PCIEXFN1 (1)-> 922 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 923 ereport.io.pciex.rc.nfe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 924 SOURCE_ID_MATCHES_BDF }; 925 926prop error.io.pciex.nonfatal@PCIEXFN (0)-> 927 ereport.io.pci.sserr@PCIEXFN; 928 929prop error.io.pciex.nonfatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 930 ereport.io.pci.sserr@PCIEXFN1, 931 ereport.io.pci.sec-rserr@PCIEXFN1; 932 933prop error.io.pciex.nonfatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 934 ereport.io.pci.sec-rserr@pciexrc; 935 936/* 937 * link-level errors - could generate ereports at either end of link 938 * 939 * can use may propagations here as these ereports are only seen for these 940 * faults. 941 */ 942prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 943 error.io.pciex.fatal@PCIEXFN; 944 945prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 946 ereport.io.pciex.dl.dllp@PCIEXFN, 947 ereport.io.pciex.tl.fcp@PCIEXFN, 948 ereport.io.pciex.tl.rof@PCIEXFN; 949 950prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 951 error.io.pciex.fatal@PCIEXFN; 952 953prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 954 ereport.io.pciex.dl.dllp@PCIEXFN, 955 ereport.io.pciex.pl.te@PCIEXFN, 956 ereport.io.pciex.pl.sd@PCIEXFN, 957 ereport.io.pciex.tl.fcp@PCIEXFN, 958 ereport.io.pciex.tl.rof@PCIEXFN; 959 960prop error.io.pciex.fatlink@pciexrc/PCIEXFN (0)-> 961 ereport.io.pciex.dl.dllp@pciexrc, 962 ereport.io.pciex.pl.te@pciexrc, 963 ereport.io.pciex.pl.sd@pciexrc, 964 ereport.io.pciex.tl.fcp@pciexrc, 965 ereport.io.pciex.tl.rof@pciexrc; 966 967/* 968 * bridge internal error 969 */ 970prop error.io.pciex.sec-interr@PCIEXFN { IS_BG(PCIEXFN) } (2) -> 971 error.io.pciex.nonfatal@PCIEXFN, 972 ereport.io.pciex.bdg.sec-interr@PCIEXFN; 973 974/* 975 * downstream poisoned request 976 * 977 * - poisreq-d cascades down to the leaf device/bridge and any switch ports 978 * on route must raise a ptlp ereport while any switch ports forwarding 979 * the poisoned request must raise sec-mdpe ereports. The originator of the 980 * poisoning (be it root complex or downstream port of a switch) also raises 981 * sec-mdpe. A hardened leaf driver will also raise ptlp. A target-mdpe may 982 * be seen at the leaf (which may be a pci device beyond the bridge). 983 * 984 * Additionally, the leaf/bridge may treat the request as a ur, which the 985 * root complex will see and report an ma. Use flt-ur-u to represent this. 986 * 987 * The fault can always be recognized and the source identified using the ptlp 988 * and sec-mdpe ereports. 989 */ 990prop error.io.pciex.poisreq-d@PCIEXFN (1)-> 991 error.io.pciex.poisreq-fwd-d@PCIEXFN; 992 993prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) || 994 IS_SU(PCIEXFN) } (1)-> 995 error.io.pciex.flt-ur-u@PCIEXFN, 996 error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFNHZ; 997 998prop error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN (1)-> 999 ereport.io.pci.sec-mdpe@pciexrc; 1000 1001prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1002 ereport.io.pci.sec-mdpe@PCIEXFN; 1003 1004prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1005 ereport.io.pci.dpe@PCIEXFN, 1006 ereport.io.pciex.tl.ptlp@PCIEXFN; 1007 1008prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1009 error.io.pciex.nonfatal@PCIEXFN; 1010 1011prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (1)-> 1012 ereport.io.pci.sec-mdpe@PCIEXFN; 1013 1014prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1015 ereport.io.pci.dpe@PCIEXFN, 1016 ereport.io.pciex.tl.ptlp@PCIEXFN, 1017 error.io.pciex.nonfatal@PCIEXFN; 1018 1019prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1020 ereport.io.pci.dpe@PCIEXFN, 1021 ereport.io.pciex.tl.ptlp@PCIEXFN, 1022 error.io.pciex.nonfatal@PCIEXFN; 1023 1024prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1025 error.io.pci.dpdata-pw-d@PCIEXFN/PCIFNHZ, 1026 error.io.pci.dpdata-dw-d@PCIEXFN/PCIFNHZ; 1027 1028prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1029 error.io.pciex.nonfatal@PCIEXFN; 1030 1031prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1032 ereport.io.pci.dpe@PCIEXFN, 1033 ereport.io.pciex.tl.ptlp@PCIEXFN, 1034 error.io.pciex.flt-ur-u@PCIEXFN; 1035 1036prop error.io.pciex.poisreq-fwd-d@PCIEXFN (0)-> 1037 ereport.io.pci.target-mdpe@PCIEXFN; 1038 1039/* 1040 * downstream poisoned completion 1041 * 1042 * - poiscomp-d cascades down to the leaf device/bridge and any switch ports on 1043 * route must raise ptlp and mdpe ereports. A hardened leaf driver will also 1044 * raise pltp and mdpe. For non-hardened leaf devices, no ptlp/mdpe may be 1045 * reported, and though we should still see a nonfatal error reported from 1046 * the root complex identifying the leaf device, we won't actually be informed 1047 * that the error was an ptlp. 1048 */ 1049prop error.io.pciex.poiscomp-d@PCIEXFN (1)-> 1050 error.io.pciex.poiscomp-fwd-d@PCIEXFN; 1051 1052prop error.io.pciex.poiscomp-fwd-d@PCIEXFN (1)-> 1053 error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFNHZ; 1054 1055prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1056 ereport.io.pci.dpe@PCIEXFN, 1057 ereport.io.pciex.tl.ptlp@PCIEXFN; 1058 1059prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 1060 ereport.io.pci.mdpe@PCIEXFN, 1061 ereport.io.pci.sec-mdpe@PCIEXFN; 1062 1063prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1064 error.io.pciex.nonfatal@PCIEXFN; 1065 1066prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1067 ereport.io.pci.mdpe@PCIEXFN, 1068 ereport.io.pci.sec-mdpe@PCIEXFN, 1069 ereport.io.pci.dpe@PCIEXFN, 1070 ereport.io.pciex.tl.ptlp@PCIEXFN, 1071 error.io.pciex.nonfatal@PCIEXFN; 1072 1073prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (4)-> 1074 ereport.io.pci.mdpe@PCIEXFN, 1075 ereport.io.pci.dpe@PCIEXFN, 1076 ereport.io.pciex.tl.ptlp@PCIEXFN, 1077 error.io.pciex.nonfatal@PCIEXFN; 1078 1079prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1080 error.io.pci.dpdata-dr-d@PCIEXFN/PCIFNHZ; 1081 1082prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1083 error.io.pciex.nonfatal@PCIEXFN; 1084 1085prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1086 ereport.io.pci.mdpe@PCIEXFN, 1087 ereport.io.pci.dpe@PCIEXFN, 1088 ereport.io.pciex.tl.ptlp@PCIEXFN; 1089 1090/* 1091 * downstream request with ecrc error. 1092 * 1093 * - ecrcreq-d cascades down to the leaf device/bridge and any switches on 1094 * route can optionally raise an ecrc ereport. A hardened leaf driver may also 1095 * raise ecrc. For non-hardened leaf devices, no ecrc may be reported, and 1096 * though we should still see a nonfatal error reported from the root complex 1097 * identifying the leaf device, we won't actually be informed that the error 1098 * was an ecrc. 1099 * 1100 * Additionally, as the leaf/bridge will just throw away the packet, we should 1101 * eventually get a cto at the root complex - so use an nr-u at the pciex 1102 * leaf or bridge to get the appropriate behaviour. For the case where the leaf 1103 * driver wasn't hardened we may be able to identify the leaf device (and 1104 * therefore any intermediate switches which might have caused the problem) 1105 * either via a target-ma ereport if available or via the nonfatal error 1106 * reported from the root complex identifying the leaf device. The combination 1107 * of a nonfatal error reported from the root complex and a cto from the root 1108 * complex is sufficient to positively identify this case. 1109 */ 1110prop error.io.pciex.ecrcreq-d@PCIEXFN (1)-> 1111 error.io.pciex.ecrcreq-fwd-d@PCIEXFN, 1112 error.io.pciex.ecrcreq-fwd-d@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }; 1113 1114prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1115 IS_SD(PCIEXFN) } (1)-> 1116 error.io.pciex.flt-nr-u@PCIEXFN; 1117 1118prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1119 IS_SD(PCIEXFN) } (0)-> 1120 ereport.io.pciex.tl.ecrc@PCIEXFN, 1121 error.io.pciex.nonfatal@PCIEXFN; 1122 1123prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1124 error.io.pciex.nonfatal@PCIEXFN, 1125 ereport.io.pciex.tl.ecrc@PCIEXFN, 1126 error.io.pciex.flt-nr-u@PCIEXFN; 1127 1128prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (2)-> 1129 error.io.pciex.nonfatal@PCIEXFN, 1130 error.io.pciex.flt-nr-u@PCIEXFN; 1131 1132prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1133 ereport.io.pciex.tl.ecrc@PCIEXFN; 1134 1135/* 1136 * downstream completion with ecrc error. 1137 * 1138 * - ecrccomp-d cascades down to the leaf device/bridge and any switches on 1139 * route can optionally raise an ecrc ereport. A hardened leaf driver may 1140 * also raise ecrc. For non-hardened leaf devices, no ecrc may be reported, 1141 * and though we should still see a nonfatal error reported from the root 1142 * complex identifying the leaf device, we won't actually be informed that 1143 * the error was an ecrc. 1144 * 1145 * Additionally, as the leaf/bridge will just throw away the packet, we should 1146 * eventually get a cto. Note the leaf ereports are optional (ie in case driver 1147 * not hardened) but if we get both ecrc and cto we need to distinguish from 1148 * cto only which would be an nr-d. 1149 */ 1150prop error.io.pciex.ecrccomp-d@PCIEXFN (1)-> 1151 error.io.pciex.ecrccomp-fwd-d@PCIEXFN, 1152 error.io.pciex.ecrccomp-fwd-d@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }; 1153 1154prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1155 IS_SD(PCIEXFN) } (0)-> 1156 error.io.pciex.nonfatal@PCIEXFN, 1157 ereport.io.pciex.tl.ecrc@PCIEXFN; 1158 1159prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1160 error.io.pciex.nonfatal@PCIEXFN, 1161 ereport.io.pciex.tl.ecrc@PCIEXFN, 1162 error.io.pciex.nr-d@PCIEXFN; 1163 1164prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1165 error.io.pciex.nonfatal@PCIEXFN; 1166 1167prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1168 ereport.io.pciex.tl.ecrc@PCIEXFN, 1169 error.io.pciex.nr-d@PCIEXFN; 1170 1171/* 1172 * upstream poisoned request 1173 * 1174 * - flt-poisreq-u is on the pciex node which generated the fault 1175 * - source-poisreq-u refers to at least one leaf or bridge device 1176 * whose bdf (if leaf) must match the source-id in the payload of the 1177 * ereport generated from the root complex. 1178 * - poisreq-u propagates up to the root complex and any switch ports on 1179 * route will raise a ptlp ereport, while any upstream devices generating 1180 * or forwarding the poisoned packed will raise an mdpe ereport. The root 1181 * complex should also report a ptlp. 1182 * 1183 * Additionally, as the root complex may treat the request as a ur, which the 1184 * leaf/bridge will see (and if hardened report) as an ma (including sending a 1185 * ta onto the child pci bus if this was a delayed write). 1186 * 1187 * We can always recognize what sort of fault this is from the ptlp (with no 1188 * sec-mdpe) at the root complex. Recognizing which originating devices may be 1189 * implicated can be done using the mdpe ereport (for a hardened leaf driver), 1190 * or for a non-hardened leaf driver by using the source-id payload in the ptlp 1191 * ereport to identify the originator of the request. The ptlp/mdpe ereports 1192 * at the intervening switches will narrow the fault down to a single suspect. 1193 */ 1194 1195prop error.io.pciex.flt-poisreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1196 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1197 error.io.pciex.source-poisreq-u@PCIEXFN; 1198 1199prop error.io.pciex.source-poisreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1200 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1201 ereport.io.pciex.tl.ptlp@pciexrc, 1202 ereport.io.pciex.tl.ur@pciexrc; 1203 1204prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1205 ereport.io.pci.ma@PCIEXFN; 1206 1207prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1208 is_under(pciexrc, PCIEXFN) } (0)-> 1209 ereport.io.pciex.tl.ptlp@pciexrc, 1210 ereport.io.pciex.tl.ur@pciexrc; 1211 1212prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1213 ereport.io.pci.ma@PCIEXFN, 1214 ereport.io.pci.sec-sta@PCIEXFN, 1215 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1216 1217prop error.io.pciex.flt-poisreq-u@PCIEXFN (1)-> 1218 error.io.pciex.poisreq-u@PCIEXFN; 1219 1220/* 1221 * the remaining propagations are also used for poisoned requests propagating 1222 * up due to a fault behind a pcie-pci bridge 1223 */ 1224prop error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN (1)-> 1225 error.io.pciex.poisreq-u@PCIEXFN; 1226 1227prop error.io.pciex.poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1228 ereport.io.pci.mdpe@PCIEXFN; 1229 1230prop error.io.pciex.poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1231 ereport.io.pci.mdpe@PCIEXFN; 1232 1233prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1234 ereport.io.pci.sec-dpe@PCIEXFN, 1235 ereport.io.pciex.tl.ptlp@PCIEXFN; 1236 1237prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1238 ereport.io.pci.mdpe@PCIEXFN, 1239 error.io.pciex.nonfatal@PCIEXFN; 1240 1241prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 1242 ereport.io.pci.mdpe@PCIEXFN; 1243 1244prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1245 ereport.io.pci.sec-dpe@PCIEXFN, 1246 ereport.io.pciex.tl.ptlp@PCIEXFN, 1247 error.io.pciex.nonfatal@PCIEXFN; 1248 1249prop error.io.pciex.poisreq-u@pciexrc/PCIEXFN (1)-> 1250 ereport.io.pci.sec-dpe@pciexrc; 1251 1252/* 1253 * upstream poisoned completion 1254 * 1255 * - flt-poiscomp-u is on the pciex node which generated the fault. There will 1256 * be a target-mdpe downstream from here. 1257 * - source-poiscomp-u refers to at least one leaf or bridge device 1258 * whose bdf (if leaf) must match the source-id in the payload of the 1259 * ereport generated from the root complex. 1260 * - poiscomp-u propagates up to the root complex and any switches on 1261 * route will raise ptlp and sec-mdpe ereports. The root complex will also 1262 * raise a sec-mdpe and ptlp. 1263 * 1264 * We can always recognize what sort of fault this is from the ptlp/sec-mdpe at 1265 * the root complex. Recognizing which originating devices may be implicated 1266 * can be done using the source-id payload in the ptlp ereport to identify the 1267 * originator of the completion. The ptlp/sec-mdpe ereports at the intervening 1268 * switches will narrow the fault down to a single suspect. 1269 */ 1270prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_LF(PCIEXFN1) && 1271 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1272 ereport.io.pci.target-mdpe@PCIEXFN1; 1273 1274prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_PCI_LF(PCIFN) && 1275 is_under(PCIEXFN, PCIFN) } (0)-> 1276 ereport.io.pci.target-mdpe@PCIFN; 1277 1278prop error.io.pciex.flt-poiscomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1279 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1280 error.io.pciex.source-poiscomp-u@PCIEXFN; 1281 1282prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1283 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1284 ereport.io.pciex.tl.ptlp@pciexrc; 1285 1286prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_BG(PCIEXFN1) && 1287 is_under(pciexrc, PCIEXFN1) } (0)-> 1288 ereport.io.pciex.tl.ptlp@pciexrc; 1289 1290prop error.io.pciex.flt-poiscomp-u@PCIEXFN (1)-> 1291 error.io.pciex.poiscomp-u@PCIEXFN; 1292 1293/* 1294 * the remaining propagations are also used for poisoned completions propagating 1295 * up due to a fault behind a pcie-pci bridge 1296 */ 1297prop error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN (1)-> 1298 error.io.pciex.poiscomp-u@PCIEXFN; 1299 1300prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1301 ereport.io.pci.sec-dpe@PCIEXFN, 1302 ereport.io.pciex.tl.ptlp@PCIEXFN; 1303 1304prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 1305 ereport.io.pci.sec-mdpe@PCIEXFN, 1306 ereport.io.pci.mdpe@PCIEXFN; 1307 1308prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1309 error.io.pciex.nonfatal@PCIEXFN; 1310 1311prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1312 ereport.io.pci.mdpe@PCIEXFN, 1313 ereport.io.pci.sec-mdpe@PCIEXFN, 1314 ereport.io.pci.sec-dpe@PCIEXFN, 1315 ereport.io.pciex.tl.ptlp@PCIEXFN, 1316 error.io.pciex.nonfatal@PCIEXFN; 1317 1318prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (1)-> 1319 ereport.io.pci.sec-dpe@pciexrc; 1320 1321prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (0)-> 1322 ereport.io.pci.sec-mdpe@pciexrc; 1323 1324/* 1325 * upstream request with ecrc error. 1326 * 1327 * - flt-ecrcreq-u is on the pciex node which generated the fault. 1328 * - source-ecrcreq-u cascades down to at least one leaf device (pciex or pci), 1329 * whose bdf (if pciex) must match the source-id in the payload of the 1330 * ereport generated from the root complex. 1331 * - ecrcreq-u propagates up to the root complex which must report it with an 1332 * ecrc ereport and any switches on route can optionally raise an ecrc ereport 1333 * 1334 * Additionally, as the root complex will just throw away the packet, we may 1335 * eventually get a cto - so use an nr-d at the pciex leaf or bridge to get 1336 * the appropriate behaviour. 1337 * 1338 * We can always recognize what sort of fault this is from the ecrc (with no 1339 * cto) at the root complex. Recognizing which leaf device may be implicated 1340 * can be done from the cto ereport (for a hardened leaf driver) or for a 1341 * non-hardened leaf using the source-id payload of the ecrc. 1342 */ 1343prop error.io.pciex.flt-ecrcreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1344 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1345 error.io.pciex.source-ecrcreq-u@PCIEXFN; 1346 1347prop error.io.pciex.source-ecrcreq-u@PCIEXFN (0)-> 1348 error.io.pciex.nr-d@PCIEXFN; 1349 1350prop error.io.pciex.source-ecrcreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1351 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1352 ereport.io.pciex.tl.ecrc@pciexrc; 1353 1354prop error.io.pciex.source-ecrcreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1355 is_under(pciexrc, PCIEXFN) } (0)-> 1356 ereport.io.pciex.tl.ecrc@pciexrc; 1357 1358prop error.io.pciex.flt-ecrcreq-u@PCIEXFN (1)-> 1359 error.io.pciex.ecrcreq-u@PCIEXFN; 1360 1361prop error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN (1)-> 1362 error.io.pciex.ecrcreq-u@PCIEXFN; 1363 1364prop error.io.pciex.ecrcreq-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1365 ereport.io.pciex.tl.ecrc@PCIEXFN, 1366 error.io.pciex.nonfatal@PCIEXFN; 1367 1368/* 1369 * upstream completion with ecrc error. 1370 * 1371 * - flt-ecrccomp-u is on the pciex node which generated the fault. 1372 * - source-ecrccomp-u cascades down to at least one leaf device (pciex or pci), 1373 * whose bdf (if pciex) must match the source-id in the payload of the 1374 * ereport generated from the root complex. 1375 * - ecrccomp-u propagates up to the root complex, which should report it with 1376 * an ecrc ereport and any switches on route can optionally raise an ecrc 1377 * ereport. 1378 * 1379 * Additionally, as the root complex will just throw away the packet, we'll 1380 * eventually get a cto - so use an flt-nr-u at the pciex leaf or bridge to get 1381 * the appropriate behaviour. 1382 * 1383 * We can always recognize what sort of fault this from the ecrc/cto from the 1384 * root complex. Recognizing which leaf device may be implicated can be done 1385 * using either the source-id payload of the ecrc or the target-ma ereport if 1386 * available. 1387 */ 1388prop error.io.pciex.flt-ecrccomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1389 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1390 error.io.pciex.source-ecrccomp-u@PCIEXFN; 1391 1392prop error.io.pciex.source-ecrccomp-u@PCIEXFN (0)-> 1393 error.io.pciex.flt-nr-u@PCIEXFN; 1394 1395prop error.io.pciex.source-ecrccomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1396 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1397 ereport.io.pciex.tl.ecrc@pciexrc; 1398 1399prop error.io.pciex.source-ecrccomp-u@PCIEXFN { IS_BG(PCIEXFN) && 1400 is_under(pciexrc, PCIEXFN) } (0)-> 1401 ereport.io.pciex.tl.ecrc@pciexrc; 1402 1403prop error.io.pciex.flt-ecrccomp-u@PCIEXFN (1)-> 1404 error.io.pciex.ecrccomp-u@PCIEXFN; 1405 1406prop error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN (1)-> 1407 error.io.pciex.ecrccomp-u@PCIEXFN; 1408 1409prop error.io.pciex.ecrccomp-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1410 ereport.io.pciex.tl.ecrc@PCIEXFN, 1411 error.io.pciex.nonfatal@PCIEXFN; 1412 1413/* 1414 * no response to downstream requester 1415 * 1416 * - nr-d will effectively cascade downstream to the requester. The fault here 1417 * is always at the root complex. For a hardened leaf device driver, we will 1418 * always be able to recognize this as the requester will report this as a 1419 * cto. For non-hardened leaf devices, no cto will be reported, and though we 1420 * should still see a nonfatal error reported from the root complex 1421 * identifying the leaf device, we won't actually be informed that the error 1422 * was a cto. 1423 */ 1424prop error.io.pciex.nr-d@PCIEXFN (1)-> 1425 error.io.pciex.nr-fwd-d@PCIEXFN { IS_BG(PCIEXFN) || IS_LF(PCIEXFN) }, 1426 error.io.pciex.nr-fwd-d@PCIEXFNHZ { (IS_BG(PCIEXFNHZ) || 1427 IS_LF(PCIEXFNHZ)) && is_under(PCIEXFN, PCIEXFNHZ) }; 1428 1429prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1430 error.io.pciex.nonfatal@PCIEXFN, 1431 ereport.io.pciex.tl.cto@PCIEXFN; 1432 1433prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1434 ereport.io.pci.ma@PCIEXFN, 1435 ereport.io.pci.sec-sta@PCIEXFN, 1436 error.io.pci.nr-drw-d@PCIEXFN/PCIFN, 1437 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1438 1439prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1440 error.io.pciex.nonfatal@PCIEXFN; 1441 1442prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1443 ereport.io.pci.ma@PCIEXFN, 1444 ereport.io.pciex.tl.cto@PCIEXFN; 1445 1446/* 1447 * no response to upstream requester 1448 * 1449 * - flt-nr-u will effectively cascade upstream to the root complex which will 1450 * report it as a cto. 1451 * 1452 * We have to use target-ma to informs us which device failed to respond. 1453 */ 1454prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1455 error.io.pci.target-ma-d@PCIEXFN; 1456 1457prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1458 error.io.pciex.nr-u@PCIEXFN; 1459 1460prop error.io.pciex.nr-u@PCIEXFN/PCIEXFN (1)-> 1461 error.io.pciex.nr-u@PCIEXFN; 1462 1463prop error.io.pciex.nr-u@pciexrc/PCIEXFN (1)-> 1464 ereport.io.pciex.tl.cto@pciexrc; 1465 1466prop error.io.pciex.nr-u@pciexrc/PCIEXFN (0)-> 1467 ereport.io.pci.sec-ma@pciexrc; 1468 1469/* 1470 * downstream malformed tlp 1471 * 1472 * This will cascade downstream to the receiver which will report it as an mtlp. 1473 * For non-hardened leaf drivers, no mtlp will be reported, and though we should 1474 * still see a fatal error reported from the root complex identifying the leaf 1475 * device, we won't actually be informed that the error was a mtlp. 1476 * Note that sw-mtlp-d is to handle the case where the switch is actually 1477 * the target of the packet (config request etc). 1478 */ 1479prop error.io.pciex.mtlp-d@PCIEXFN (1)-> 1480 error.io.pciex.mtlp-fwd-d@PCIEXFN { !IS_SD(PCIEXFN) }, 1481 error.io.pciex.mtlp-fwd-d@PCIEXFNHZ { !IS_SD(PCIEXFNHZ) && 1482 is_under(PCIEXFN, PCIEXFNHZ) }; 1483 1484prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1485 error.io.pciex.fatal@PCIEXFN, 1486 ereport.io.pciex.tl.mtlp@PCIEXFN; 1487 1488prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1489 error.io.pciex.fatal@PCIEXFN, 1490 ereport.io.pciex.tl.mtlp@PCIEXFN; 1491 1492prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1493 error.io.pciex.fatal@PCIEXFN; 1494 1495prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1496 ereport.io.pciex.tl.mtlp@PCIEXFN; 1497 1498/* 1499 * upstream malformed tlp 1500 * 1501 * This will cascade upstream to the receiver which will report it as an mtlp. 1502 */ 1503prop error.io.pciex.flt-mtlp-u@PCIEXFN (1)-> 1504 error.io.pciex.mtlp-u@PCIEXFN; 1505 1506prop error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN (1)-> 1507 error.io.pciex.mtlp-u@PCIEXFN; 1508 1509prop error.io.pciex.mtlp-u@pciexrc/PCIEXFN (1)-> 1510 ereport.io.pciex.tl.mtlp@pciexrc; 1511 1512/* 1513 * downstream completer aborts 1514 * 1515 * This could be the fault of the root complex or a switch reporting an internal 1516 * error, or of the leaf device sending an invalid request (the latter is 1517 * handled by the flt-badreq-u case below). 1518 * 1519 * This is reported by the completer or by an intervening downstream switch 1520 * port. The completer abort response propagates down to the initiator which 1521 * will set the legacy pci bit rta. 1522 * 1523 * The fault can always be recognized by the ca ereport from the root complex 1524 * or downstream switch port. The originator of the request can be recognized 1525 * by the rta for a hardened driver or by using the source-id payload of the 1526 * ca ereport for a non-hardened driver. 1527 */ 1528prop error.io.pciex.ca-d@pciexrc/PCIEXFN (0)-> 1529 ereport.io.pciex.tl.ca@pciexrc; 1530 1531prop error.io.pciex.ca-d@pciexrc/PCIEXFN (1)-> 1532 ereport.io.pci.sec-sta@pciexrc; 1533 1534prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (0)-> 1535 ereport.io.pci.sec-sta@PCIEXFN; 1536 1537prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (2)-> 1538 ereport.io.pciex.tl.ca@PCIEXFN, 1539 error.io.pciex.nonfatal@PCIEXFN; 1540 1541prop error.io.pciex.ca-d@PCIEXFN (1)-> 1542 error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) || IS_LF(PCIEXFN) }, 1543 error.io.pciex.ca-fwd-d@PCIEXFNHZ { (IS_BG(PCIEXFNHZ) || 1544 IS_LF(PCIEXFNHZ)) && is_under(PCIEXFN, PCIEXFNHZ) }; 1545 1546prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1547 ereport.io.pci.rta@PCIEXFN; 1548 1549prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1550 ereport.io.pci.sec-sta@PCIEXFN, 1551 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1552 1553prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1554 ereport.io.pci.rta@PCIEXFN; 1555 1556/* 1557 * upstream completer aborts 1558 * 1559 * This could be the fault of the leaf device/bridge/upstream switch port 1560 * reporting an internal error, or of the root complex sending an invalid 1561 * request (the latter case is handled by badreq-d below). 1562 * 1563 * This is reported as a ca by the completer. The completer (for non-posted 1564 * requests) sends the appropriate error bits in the completion message to 1565 * the initiator which will set the legacy pci bit sec-rta. 1566 * 1567 * The fault can always be recognized from the sec-rta bit at the root complex. 1568 * 1569 * If the fault was with a PCI Express leaf with a hardened driver, then we 1570 * will identify the device from the ca ereport. 1571 * 1572 * If the fault was with a PCI Express leaf with a non-hardened driver, then we 1573 * can still identify the leaf device from the source-id payload of the nonfatal 1574 * message ereport from the root complex or from the target-rta ereport. 1575 */ 1576prop error.io.pciex.flt-ca-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1577 ereport.io.pciex.tl.ca@PCIEXFN; 1578 1579prop error.io.pciex.flt-ca-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1580 ereport.io.pciex.tl.ca@PCIEXFN; 1581 1582prop error.io.pciex.flt-ca-u@PCIEXFN (0)-> 1583 error.io.pciex.nonfatal@PCIEXFN, 1584 ereport.io.pci.sta@PCIEXFN; 1585 1586prop error.io.pciex.flt-ca-u@PCIEXFN (2)-> 1587 error.io.pci.target-rta-d@PCIEXFN, 1588 error.io.pciex.ca-u@PCIEXFN; 1589 1590prop error.io.pciex.ca-u@PCIEXFN/PCIEXFN (1)-> 1591 error.io.pciex.ca-u@PCIEXFN; 1592 1593prop error.io.pciex.ca-u@pciexrc/PCIEXFN (0)-> 1594 ereport.io.pci.sec-rta@pciexrc; 1595 1596/* 1597 * upstream bad request 1598 * 1599 * When detecting bad data on a request the completer (or any switch on the 1600 * way to the completer) may report ur or ca. If the switch detects the problem 1601 * first then the request doesn't get forwarded on to the completer. 1602 * 1603 * These are reported as ur/ca ereports. For non-posted requests, the reporter 1604 * then sends the appropriate error bits in the completion message to the 1605 * initiator which will set the legacy pci bits ma or rta. 1606 * 1607 * For flt-badreq-u, the ca/ur ereports contain a source-id payload that 1608 * identifies the initiator. 1609 * 1610 * The fault can always be recognized by the ca/ur ereport from the root 1611 * complex or downstream switch port. The originator of the request can be 1612 * recognized by the rta/ma for a hardened driver or by using the source-id 1613 * payload of the ca/ur ereport for a non-hardened driver. 1614 */ 1615prop error.io.pciex.flt-badreq-u@PCIEXFN (0)-> 1616 ereport.io.pci.ma@PCIEXFN, 1617 ereport.io.pci.rta@PCIEXFN; 1618 1619prop error.io.pciex.flt-badreq-u@PCIEXFN1 { 1620 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1621 ereport.io.pciex.tl.ur@pciexrc, 1622 ereport.io.pciex.tl.ca@pciexrc; 1623 1624prop error.io.pciex.flt-badreq-u@PCIEXFN (1)-> 1625 error.io.pciex.badreq-u@PCIEXFN; 1626 1627prop error.io.pciex.badreq-u@PCIEXFN/PCIEXFN (1)-> 1628 error.io.pciex.badreq-u@PCIEXFN; 1629 1630prop error.io.pciex.badreq-u@pciexrc/PCIEXFN (0)-> 1631 ereport.io.pci.sec-sta@pciexrc; 1632 1633prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1634 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIEXFN1) } (0)-> 1635 ereport.io.pciex.tl.ur@PCIEXFN, 1636 ereport.io.pciex.tl.ca@PCIEXFN; 1637 1638prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1639 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1640 ereport.io.pci.sec-sta@PCIEXFN, 1641 error.io.pciex.nonfatal@PCIEXFN; 1642 1643/* 1644 * downstream bad request 1645 * 1646 * When detecting bad data on a request the completer (or any switch on the 1647 * way to the completer) may report ur or ca. If the switch detects the problem 1648 * first then the request doesn't get forwarded on to the completer. 1649 * 1650 * These are reported as ur/ca ereports (except where the completer is a non- 1651 * hardened leaf driver when all we get is a nonfatal error from the root 1652 * complex identifying the leaf device). The reporter then sends the appropriate 1653 * error bits in the completion message to the initiator which will set the 1654 * legacy pci bits ma or rta (oddly there is no equivalent in pcie error 1655 * reporting). 1656 */ 1657prop error.io.pciex.badreq-d@PCIEXFN (1)-> 1658 error.io.pciex.flt-ur-u@PCIEXFN, 1659 error.io.pciex.flt-ca-u@PCIEXFN, 1660 error.io.pciex.flt-ur-u@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 1661 error.io.pciex.flt-ca-u@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 1662 error.io.pci.badreq-pw-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 1663 error.io.pci.badreq-drw-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN,PCIEXFNHZ) }; 1664 1665prop error.io.pciex.flt-ur-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1666 ereport.io.pciex.tl.ur@PCIEXFN; 1667 1668prop error.io.pciex.flt-ur-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1669 ereport.io.pciex.tl.ur@PCIEXFN; 1670 1671prop error.io.pciex.flt-ur-u@PCIEXFN (2)-> 1672 error.io.pci.target-ma-d@PCIEXFN, 1673 error.io.pciex.ur-u@PCIEXFN; 1674 1675prop error.io.pciex.flt-ur-u@PCIEXFN (0)-> 1676 error.io.pciex.nonfatal@PCIEXFN; 1677 1678prop error.io.pciex.ur-u@PCIEXFN/PCIEXFN (1)-> 1679 error.io.pciex.ur-u@PCIEXFN; 1680 1681prop error.io.pciex.ur-u@pciexrc/PCIEXFN (0)-> 1682 ereport.io.pci.sec-ma@pciexrc; 1683 1684/* 1685 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1686 * Stub unused legacy pci ereports at root complex. 1687 * Stub tl.uc as we can't do anything useful with it (we should eventually 1688 * get a cto which we can do something with - a uc without a cto is a genuinely 1689 * spurious completion which is at least harmless). 1690 * Stub messages that the root complex sends to itself. 1691 * Stub mce/mue/ce/nr/noadverr. 1692 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1693 */ 1694 1695event error.io.pciex.discard_rc@pciexrc; 1696 1697event ereport.io.pciex.noadverr@PCIEXFN{within(5s)}; 1698event ereport.io.pciex.correctable@PCIEXFN{within(5s)}; 1699event ereport.io.pciex.nonfatal@PCIEXFN{within(5s)}; 1700event ereport.io.pciex.a-nonfatal@PCIEXFN{within(5s)}; 1701event ereport.io.pciex.fatal@PCIEXFN{within(5s)}; 1702event ereport.io.pci.nr@PCIEXFN{within(5s)}; 1703event ereport.io.pci.nr@pciexrc{within(5s)}; 1704event ereport.io.pci.ma@pciexrc{within(5s)}; 1705event ereport.io.pci.rta@pciexrc{within(5s)}; 1706event ereport.io.pci.sta@pciexrc{within(5s)}; 1707event ereport.io.pci.dpe@pciexrc{within(5s)}; 1708event ereport.io.pci.mdpe@pciexrc{within(5s)}; 1709event ereport.io.pci.sserr@pciexrc{within(5s)}; 1710event ereport.io.pciex.tl.uc@pciexrc{within(5s)}; 1711event ereport.io.pciex.noadverr@pciexrc{within(5s)}; 1712event ereport.io.pciex.a-nonfatal@pciexrc{within(5s)}; 1713event ereport.io.pciex.rc.ce-msg@pciexrc{within(5s)}; 1714event ereport.io.pciex.rc.mce-msg@pciexrc{within(5s)}; 1715 1716event upset.io.pciex.discard_uc@PCIEXFN; 1717event upset.io.pciex.discard@PCIEXFN; 1718event upset.io.pciex.discard@pciexrc; 1719 1720prop upset.io.pciex.discard_uc@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1721 ereport.io.pciex.tl.uc@PCIEXFN; 1722 1723prop upset.io.pciex.discard_uc@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1724 ereport.io.pciex.tl.uc@PCIEXFN; 1725 1726prop upset.io.pciex.discard@PCIEXFN (1)-> 1727 ereport.io.pci.nr@PCIEXFN, 1728 ereport.io.pciex.noadverr@PCIEXFN, 1729 ereport.io.pciex.correctable@PCIEXFN, 1730 ereport.io.pciex.nonfatal@PCIEXFN, 1731 ereport.io.pciex.a-nonfatal@PCIEXFN, 1732 ereport.io.pciex.fatal@PCIEXFN; 1733 1734prop error.io.pciex.discard_rc@pciexrc (0)-> 1735 ereport.io.pciex.rc.mue-msg@pciexrc, 1736 ereport.io.pciex.rc.fe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }, 1737 ereport.io.pciex.rc.nfe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }; 1738 1739prop upset.io.pciex.discard@pciexrc (1)-> 1740 error.io.pciex.discard_rc@pciexrc, 1741 ereport.io.pci.nr@pciexrc, 1742 ereport.io.pciex.noadverr@pciexrc, 1743 ereport.io.pciex.a-nonfatal@pciexrc, 1744 ereport.io.pciex.rc.ce-msg@pciexrc, 1745 ereport.io.pciex.rc.mce-msg@pciexrc, 1746 ereport.io.pciex.tl.uc@pciexrc, 1747 ereport.io.pci.ma@pciexrc, 1748 ereport.io.pci.rta@pciexrc, 1749 ereport.io.pci.sta@pciexrc, 1750 ereport.io.pci.dpe@pciexrc, 1751 ereport.io.pci.mdpe@pciexrc, 1752 ereport.io.pci.sserr@pciexrc; 1753 1754/* 1755 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1756 * rules for propagations from child PCI bus 1757 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1758 */ 1759 1760event error.io.pci.retry-to-u@PCIEXFN/PCIFN; 1761event error.io.pci.ma-u@PCIEXFN/PCIFN; 1762event error.io.pci.ta-u@PCIEXFN/PCIFN; 1763event error.io.pci.ape-u@PCIEXFN/PCIFN; 1764event error.io.pci.source-ape-u@PCIFN; 1765event error.io.pci.target-ma-d@PCIFN; 1766event error.io.pci.target-rta-d@PCIFN; 1767event error.io.pci.badreq-pw-u@PCIEXFN/PCIFN; 1768event error.io.pci.badreq-drw-u@PCIEXFN/PCIFN; 1769event error.io.pci.source-perr-u@PCIFN; 1770event error.io.pci.source-dpdata-u@PCIFN; 1771event error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN; 1772event error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN; 1773event error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN; 1774event error.io.pci.perr-pw-u@PCIEXFN/PCIFN; 1775event error.io.pci.perr-dw-u@PCIEXFN/PCIFN; 1776event error.io.pci.perr-dr-u@PCIEXFN/PCIFN; 1777event error.io.pci.serr-u@PCIEXFN/PCIFN; 1778event error.io.pcix.scpe-u@PCIEXFN/PCIFN; 1779event error.io.pcix.source-scpe-u@PCIFN; 1780event error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN; 1781event error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN; 1782event error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN; 1783event error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1784event error.io.pcix.uscmd@PCIEXFN; 1785 1786event ereport.io.pcix.sec-spl-dis@PCIEXFN{within(5s)}; 1787event ereport.io.pciex.bdg.uscmd@PCIEXFN{within(5s)}; 1788event ereport.io.pciex.bdg.sec-perr@PCIEXFN{within(5s)}; 1789event ereport.io.pciex.bdg.sec-uadr@PCIEXFN{within(5s)}; 1790event ereport.io.pciex.bdg.sec-uat@PCIEXFN{within(5s)}; 1791event ereport.io.pciex.bdg.sec-serr@PCIEXFN{within(5s)}; 1792event ereport.io.pciex.bdg.sec-tex@PCIEXFN{within(5s)}; 1793event ereport.io.pciex.bdg.sec-rma@PCIEXFN{within(5s)}; 1794event ereport.io.pciex.bdg.sec-rta@PCIEXFN{within(5s)}; 1795event ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN{within(5s)}; 1796event ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN{within(5s)}; 1797event ereport.io.pci.dto@PCIEXFN{within(5s)}; 1798event ereport.io.pci.sec-rta@PCIEXFN{within(5s)}; 1799event ereport.io.pci.sec-ma@PCIEXFN{within(5s)}; 1800 1801/* 1802 * ma-u will only propagate on to pciex bus for non-posted accesses. It 1803 * is then represented as an unsupported request. 1804 */ 1805prop error.io.pci.ma-u@PCIEXFN/PCIFN (0)-> 1806 ereport.io.pciex.tl.ur@PCIEXFN, 1807 error.io.pciex.ur-u@PCIEXFN; 1808 1809prop error.io.pci.ma-u@PCIEXFN/PCIFN (2)-> 1810 ereport.io.pci.sec-ma@PCIEXFN, 1811 error.io.pciex.nonfatal@PCIEXFN; 1812 1813prop error.io.pci.target-ma-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1814 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1815 ereport.io.pciex.bdg.sec-rma@PCIEXFN; 1816 1817/* 1818 * ta-u will only propagate on to pciex bus for non-posted accesses. It is 1819 * then represented as a completer abort. 1820 */ 1821prop error.io.pci.ta-u@PCIEXFN/PCIFN (0)-> 1822 ereport.io.pci.sta@PCIEXFN, 1823 ereport.io.pciex.tl.ca@PCIEXFN, 1824 error.io.pciex.ca-u@PCIEXFN; 1825 1826prop error.io.pci.ta-u@PCIEXFN/PCIFN (2)-> 1827 ereport.io.pci.sec-rta@PCIEXFN, 1828 error.io.pciex.nonfatal@PCIEXFN; 1829 1830prop error.io.pci.target-rta-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1831 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1832 ereport.io.pciex.bdg.sec-rta@PCIEXFN; 1833 1834/* 1835 * PERR# on a delayed write is represented as an unsupported request 1836 */ 1837prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (1)-> 1838 ereport.io.pci.sec-mdpe@PCIEXFN; 1839 1840prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (0)-> 1841 error.io.pciex.flt-ur-u@PCIEXFN; 1842 1843prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (1)-> 1844 ereport.io.pci.sec-mdpe@PCIEXFN; 1845 1846prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (0)-> 1847 error.io.pciex.nonfatal@PCIEXFN; 1848 1849prop error.io.pci.perr-dr-u@PCIEXFN/PCIFN (1)-> 1850 error.io.pciex.nonfatal@PCIEXFN; 1851 1852prop error.io.pci.source-perr-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1853 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1854 ereport.io.pciex.bdg.sec-perr@PCIEXFN; 1855 1856/* 1857 * If the bridge receives data with bad ecc/parity from pci/pci-x, it will 1858 * propagate onto pci express as a poisoned tlp 1859 */ 1860prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (2)-> 1861 ereport.io.pci.sec-dpe@PCIEXFN, 1862 error.io.pciex.poiscomp-u@PCIEXFN; 1863 1864prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (0)-> 1865 error.io.pciex.nonfatal@PCIEXFN; 1866 1867prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (1)-> 1868 ereport.io.pci.sec-mdpe@PCIEXFN, 1869 ereport.io.pci.mdpe@PCIEXFN; 1870 1871prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (1)-> 1872 ereport.io.pci.sec-dpe@PCIEXFN; 1873 1874prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (0)-> 1875 error.io.pciex.nonfatal@PCIEXFN, 1876 error.io.pciex.poisreq-u@PCIEXFN, 1877 ereport.io.pci.ma@PCIEXFN, 1878 ereport.io.pci.sec-sta@PCIEXFN, 1879 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1880 1881prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (2)-> 1882 ereport.io.pci.sec-dpe@PCIEXFN, 1883 error.io.pciex.poisreq-u@PCIEXFN; 1884 1885prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (0)-> 1886 error.io.pciex.nonfatal@PCIEXFN, 1887 ereport.io.pci.ma@PCIEXFN; 1888 1889prop error.io.pci.source-dpdata-u@PCIFN { is_under(pciexrc, PCIFN) } (0)-> 1890 ereport.io.pciex.tl.ptlp@pciexrc, 1891 ereport.io.pciex.tl.ur@pciexrc; 1892 1893prop error.io.pci.source-dpdata-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) 1894 && SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1895 ereport.io.pciex.bdg.sec-ude@PCIEXFN; 1896 1897/* 1898 * If the bridge sees an address or attribute parity error it is considered 1899 * a fatal error. 1900 */ 1901prop error.io.pci.ape-u@PCIEXFN/PCIFN (2)-> 1902 ereport.io.pci.sec-dpe@PCIEXFN, 1903 error.io.pciex.fatal@PCIEXFN; 1904 1905prop error.io.pci.source-ape-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1906 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1907 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1908 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1909 1910prop error.io.pci.ape-u@PCIEXFN/PCIFN (0)-> 1911 ereport.io.pci.sec-rserr@PCIEXFN, 1912 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1913 ereport.io.pci.sec-sta@PCIEXFN; 1914 1915/* 1916 * If the bridge sees a split completion error (pci-x only) it could 1917 * result in a number of things 1918 * - unrecovered split completion message data error (uscmd). This would 1919 * happen on a pio write. A completer abort is returned to the initiator. 1920 * - for various faults in the split completion (eg address parity error) 1921 * we will respond with a target abort (which the child device will treat 1922 * as a split completion ta) 1923 * - for other faults we can't tell who send the split completion and so 1924 * just drop the request (which the child device sees as a split 1925 * completion ma) 1926 */ 1927prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (0)-> 1928 ereport.io.pci.sec-dpe@PCIEXFN, 1929 ereport.io.pci.sec-rserr@PCIEXFN, 1930 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1931 ereport.io.pci.sec-sta@PCIEXFN, 1932 error.io.pciex.fatal@PCIEXFN; 1933 1934prop error.io.pcix.source-scpe-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1935 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1936 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1937 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1938 1939prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (1)-> 1940 error.io.pcix.uscmd@PCIEXFN, 1941 error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN, 1942 error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1943 1944prop error.io.pcix.uscmd@PCIEXFN (4)-> 1945 error.io.pciex.fatal@PCIEXFN, 1946 ereport.io.pci.sta@PCIEXFN, 1947 ereport.io.pciex.tl.ca@PCIEXFN, 1948 ereport.io.pciex.bdg.uscmd@PCIEXFN; 1949 1950prop error.io.pcix.uscmd@PCIEXFN (0)-> 1951 error.io.pciex.ca-u@PCIEXFN; 1952 1953/* 1954 * Similarly a child device may have responded with a master abort or 1955 * target abort to one of our split competions. The hardware just logs these. 1956 */ 1957prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (3)-> 1958 error.io.pciex.nonfatal@PCIEXFN, 1959 ereport.io.pcix.sec-spl-dis@PCIEXFN, 1960 ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN; 1961 1962prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (0)-> 1963 ereport.io.pci.sec-ma@PCIEXFN; 1964 1965prop error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN (4)-> 1966 error.io.pciex.nonfatal@PCIEXFN, 1967 ereport.io.pcix.sec-spl-dis@PCIEXFN, 1968 ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN, 1969 ereport.io.pci.sec-rta@PCIEXFN; 1970 1971/* 1972 * SERR# is considered fatal 1973 */ 1974prop error.io.pci.serr-u@PCIEXFN/PCIFN (3)-> 1975 error.io.pciex.fatal@PCIEXFN, 1976 ereport.io.pci.sec-rserr@PCIEXFN, 1977 ereport.io.pciex.bdg.sec-serr@PCIEXFN; 1978 1979/* 1980 * Retry time-out is nonfatal. The initial requester has stopped retrying so 1981 * there's nothing else the hardware can do but flag the error. 1982 */ 1983prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (2)-> 1984 error.io.pciex.nonfatal@PCIEXFN, 1985 ereport.io.pciex.bdg.sec-tex@PCIEXFN; 1986 1987prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (0)-> 1988 ereport.io.pci.sta@PCIEXFN, 1989 ereport.io.pci.dto@PCIEXFN, 1990 error.io.pciex.ca-u@PCIEXFN; 1991 1992/* 1993 * A bad dma request (eg with invalid address) propagates onto pci express 1994 * as a bad dma request. The end result may be a master abort or target abort 1995 * (depending on whether the child is pci-x or pci). 1996 */ 1997prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN (0)-> 1998 ereport.io.pci.ma@PCIEXFN, 1999 ereport.io.pci.rta@PCIEXFN, 2000 error.io.pciex.badreq-u@PCIEXFN, 2001 ereport.io.pci.sec-sta@PCIEXFN; 2002 2003prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { 2004 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 2005 ereport.io.pciex.tl.ur@pciexrc, 2006 ereport.io.pciex.tl.ca@pciexrc; 2007 2008prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 2009 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 2010 ereport.io.pciex.tl.ur@PCIEXFN1, 2011 ereport.io.pciex.tl.ca@PCIEXFN1, 2012 ereport.io.pci.sec-sta@PCIEXFN1, 2013 error.io.pciex.nonfatal@PCIEXFN1; 2014 2015prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN (0)-> 2016 ereport.io.pci.ma@PCIEXFN, 2017 ereport.io.pci.rta@PCIEXFN, 2018 error.io.pciex.badreq-u@PCIEXFN, 2019 ereport.io.pci.sec-sta@PCIEXFN; 2020 2021prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { 2022 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 2023 ereport.io.pciex.tl.ur@pciexrc, 2024 ereport.io.pciex.tl.ca@pciexrc; 2025 2026prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 2027 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 2028 ereport.io.pciex.tl.ur@PCIEXFN1, 2029 ereport.io.pciex.tl.ca@PCIEXFN1, 2030 ereport.io.pci.sec-sta@PCIEXFN1, 2031 error.io.pciex.nonfatal@PCIEXFN1; 2032 2033/* 2034 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2035 * target- propagations 2036 * 2037 * A Root Complex driver may generate "target-" ereports when knowledge of the 2038 * physical address associated with a fault allows the target device to be 2039 * determined. This is not a requirement of the Diagnosis Engine, but can be 2040 * valuable when available. 2041 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2042 */ 2043event error.io.pci.target-ma-d@PCIEXFN/PCIFN; 2044event error.io.pci.target-rta-d@PCIEXFN/PCIFN; 2045event ereport.io.pci.target-rta@PCIEXFN{within(5s)}; 2046event ereport.io.pci.target-ma@PCIEXFN{within(5s)}; 2047 2048prop error.io.pci.target-ma-d@PCIEXFN (0)-> 2049 ereport.io.pci.target-ma@PCIEXFN, 2050 ereport.io.pci.target-ma@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 2051 error.io.pci.target-ma-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }; 2052 2053prop error.io.pci.target-rta-d@PCIEXFN (0)-> 2054 ereport.io.pci.target-rta@PCIEXFN, 2055 ereport.io.pci.target-rta@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 2056 error.io.pci.target-rta-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN,PCIEXFNHZ) }; 2057 2058/* 2059 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2060 * stub unused pciex-pci bridge ereports 2061 * - ignore usc/sec-unex-spl 2062 * - ignore sec-spl-or/sec-spl-dly as these aren't really faults (tuning info) 2063 * - ignore ecc.ue ereports (we get everything we need from dpe/mdpe) 2064 * - ignore ecc.ce ereports for now (could do serd on these) 2065 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2066 */ 2067 2068event ereport.io.pciex.bdg.usc@PCIEXFN{within(5s)}; 2069event ereport.io.pcix.sec-unex-spl@PCIEXFN{within(5s)}; 2070event ereport.io.pcix.sec-spl-or@PCIEXFN{within(5s)}; 2071event ereport.io.pcix.sec-spl-dly@PCIEXFN{within(5s)}; 2072event ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN{within(5s)}; 2073event ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN{within(5s)}; 2074event ereport.io.pcix.sec-ecc.ce-data@PCIEXFN{within(5s)}; 2075event ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN{within(5s)}; 2076event ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN{within(5s)}; 2077event ereport.io.pcix.sec-ecc.ue-data@PCIEXFN{within(5s)}; 2078event ereport.io.pcix.sec-s-ce@PCIEXFN{within(5s)}; 2079event ereport.io.pcix.sec-s-ue@PCIEXFN{within(5s)}; 2080 2081event upset.io.pciex.discard-bdg@PCIEXFN; 2082 2083prop upset.io.pciex.discard-bdg@PCIEXFN (1)-> 2084 ereport.io.pciex.bdg.usc@PCIEXFN, 2085 ereport.io.pcix.sec-unex-spl@PCIEXFN, 2086 ereport.io.pcix.sec-spl-or@PCIEXFN, 2087 ereport.io.pcix.sec-spl-dly@PCIEXFN, 2088 ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN, 2089 ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN, 2090 ereport.io.pcix.sec-ecc.ce-data@PCIEXFN, 2091 ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN, 2092 ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN, 2093 ereport.io.pcix.sec-ecc.ue-data@PCIEXFN, 2094 ereport.io.pcix.sec-s-ce@PCIEXFN, 2095 ereport.io.pcix.sec-s-ue@PCIEXFN; 2096