xref: /titanic_52/usr/src/cmd/fm/dicts/INTEL.dict (revision 80feccabd0bc0fca1df2b60bfa50449d9a6e3e09)
1#
2# Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
3# Use is subject to license terms.
4#
5# CDDL HEADER START
6#
7# The contents of this file are subject to the terms of the
8# Common Development and Distribution License (the "License").
9# You may not use this file except in compliance with the License.
10#
11# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
12# or http://www.opensolaris.org/os/licensing.
13# See the License for the specific language governing permissions
14# and limitations under the License.
15#
16# When distributing Covered Code, include this CDDL HEADER in each
17# file and include the License file at usr/src/OPENSOLARIS.LICENSE.
18# If applicable, add the following below this CDDL HEADER, with the
19# fields enclosed by brackets "[]" replaced with your own identifying
20# information: Portions Copyright [yyyy] [name of copyright owner]
21#
22# CDDL HEADER END
23#
24#ident	"%Z%%M%	%I%	%E% SMI"
25#
26# DO NOT EDIT -- this file is generated by the Event Registry.
27#
28
29FMDICT: name=INTEL version=1 maxkey=1 dictid=0x494e
30
31fault.cpu.intel.internal=1
32fault.cpu.intel.l0cache=2
33fault.cpu.intel.l1cache=3
34fault.cpu.intel.l2cache=4
35fault.cpu.intel.cache=5
36fault.cpu.intel.l0dtlb=6
37fault.cpu.intel.l1dtlb=7
38fault.cpu.intel.l2dtlb=8
39fault.cpu.intel.dtlb=9
40fault.cpu.intel.l0itlb=10
41fault.cpu.intel.l1itlb=11
42fault.cpu.intel.l2itlb=12
43fault.cpu.intel.itlb=13
44fault.cpu.intel.l0tlb=14
45fault.cpu.intel.l1tlb=15
46fault.cpu.intel.l2tlb=16
47fault.cpu.intel.tlb=17
48fault.cpu.intel.l0dcache=18
49fault.cpu.intel.l1dcache=19
50fault.cpu.intel.l2dcache=20
51fault.cpu.intel.dcache=21
52fault.cpu.intel.l0icache=22
53fault.cpu.intel.l1icache=23
54fault.cpu.intel.l2icache=24
55fault.cpu.intel.icache=25
56fault.cpu.intel.bus_interconnect=26
57fault.cpu.intel.bus_interconnect_memory=27
58fault.cpu.intel.bus_interconnect_io=28
59fault.cpu.intel.nb.fsb=29
60fault.memory.intel.fbd.berr=30
61fault.memory.intel.fbd.alert=31
62fault.memory.intel.fbd.crc=32
63fault.memory.intel.fbd.ch=33
64fault.memory.intel.fbd.reset_timeout=34
65fault.memory.intel.fbd.otf=35
66fault.cpu.intel.nb.ie=36
67fault.cpu.intel.nb.dma=37
68fault.memory.intel.fbd.mem_ds=38
69fault.memory.intel.page_ce=39
70fault.memory.intel.page_ue=40
71fault.memory.intel.dimm_ce=41
72fault.memory.intel.dimm_ue=42
73