xref: /titanic_52/usr/src/boot/lib/libstand/powerpc/syncicache.c (revision 4a5d661a82b942b6538acd26209d959ce98b593a)
1 /*-
2  * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
3  * Copyright (C) 1995-1997, 1999 TooLs GmbH.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by TooLs GmbH.
17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $
32  */
33 
34 #ifndef lint
35 static const char rcsid[] =
36   "$FreeBSD$";
37 #endif /* not lint */
38 
39 #include <sys/param.h>
40 #if	defined(_KERNEL) || defined(_STANDALONE)
41 #include <sys/time.h>
42 #include <sys/proc.h>
43 #include <vm/vm.h>
44 #endif
45 #include <sys/sysctl.h>
46 
47 #include <machine/cpu.h>
48 #include <machine/md_var.h>
49 
50 #ifdef _STANDALONE
51 int cacheline_size = 32;
52 #endif
53 
54 #if	!defined(_KERNEL) && !defined(_STANDALONE)
55 #include <stdlib.h>
56 
57 int cacheline_size = 0;
58 
59 static void getcachelinesize(void);
60 
61 static void
62 getcachelinesize()
63 {
64 	static int	cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
65 	int		clen;
66 
67 	clen = sizeof(cacheline_size);
68 
69 	if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]),
70 	    &cacheline_size, &clen, NULL, 0) < 0 || !cacheline_size) {
71 		abort();
72 	}
73 }
74 #endif
75 
76 void
77 __syncicache(void *from, int len)
78 {
79 	int	l, off;
80 	char	*p;
81 
82 #if	!defined(_KERNEL) && !defined(_STANDALONE)
83 	if (!cacheline_size)
84 		getcachelinesize();
85 #endif
86 
87 	off = (u_int)from & (cacheline_size - 1);
88 	l = len += off;
89 	p = (char *)from - off;
90 
91 	do {
92 		__asm __volatile ("dcbst 0,%0" :: "r"(p));
93 		p += cacheline_size;
94 	} while ((l -= cacheline_size) > 0);
95 	__asm __volatile ("sync");
96 	p = (char *)from - off;
97 	do {
98 		__asm __volatile ("icbi 0,%0" :: "r"(p));
99 		p += cacheline_size;
100 	} while ((len -= cacheline_size) > 0);
101 	__asm __volatile ("sync; isync");
102 }
103 
104