1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ 27 /* All Rights Reserved */ 28 29 /* 30 * Portions of this source code were derived from Berkeley 4.3 BSD 31 * under license from the Regents of the University of California. 32 */ 33 34 #pragma ident "%Z%%M% %I% %E% SMI" 35 36 /* 37 * UNIX machine dependent virtual memory support. 38 */ 39 40 #include <sys/vm.h> 41 #include <sys/exec.h> 42 #include <sys/cmn_err.h> 43 #include <sys/cpu_module.h> 44 #include <sys/cpu.h> 45 #include <sys/elf_SPARC.h> 46 #include <sys/archsystm.h> 47 #include <vm/hat_sfmmu.h> 48 #include <sys/memnode.h> 49 #include <sys/mem_cage.h> 50 #include <vm/vm_dep.h> 51 #include <sys/error.h> 52 #include <sys/machsystm.h> 53 #include <vm/seg_kmem.h> 54 #include <sys/stack.h> 55 #include <sys/atomic.h> 56 #include <sys/promif.h> 57 58 uint_t page_colors = 0; 59 uint_t page_colors_mask = 0; 60 uint_t page_coloring_shift = 0; 61 int consistent_coloring; 62 int update_proc_pgcolorbase_after_fork = 1; 63 64 uint_t mmu_page_sizes = MMU_PAGE_SIZES; 65 uint_t max_mmu_page_sizes = MMU_PAGE_SIZES; 66 uint_t mmu_hashcnt = MAX_HASHCNT; 67 uint_t max_mmu_hashcnt = MAX_HASHCNT; 68 size_t mmu_ism_pagesize = DEFAULT_ISM_PAGESIZE; 69 70 /* 71 * A bitmask of the page sizes supported by hardware based upon szc. 72 * The base pagesize (p_szc == 0) must always be supported by the hardware. 73 */ 74 int mmu_exported_pagesize_mask; 75 uint_t mmu_exported_page_sizes; 76 77 uint_t szc_2_userszc[MMU_PAGE_SIZES]; 78 uint_t userszc_2_szc[MMU_PAGE_SIZES]; 79 80 extern uint_t vac_colors_mask; 81 extern int vac_shift; 82 83 hw_pagesize_t hw_page_array[] = { 84 {MMU_PAGESIZE, MMU_PAGESHIFT, 0, MMU_PAGESIZE >> MMU_PAGESHIFT}, 85 {MMU_PAGESIZE64K, MMU_PAGESHIFT64K, 0, 86 MMU_PAGESIZE64K >> MMU_PAGESHIFT}, 87 {MMU_PAGESIZE512K, MMU_PAGESHIFT512K, 0, 88 MMU_PAGESIZE512K >> MMU_PAGESHIFT}, 89 {MMU_PAGESIZE4M, MMU_PAGESHIFT4M, 0, MMU_PAGESIZE4M >> MMU_PAGESHIFT}, 90 {MMU_PAGESIZE32M, MMU_PAGESHIFT32M, 0, 91 MMU_PAGESIZE32M >> MMU_PAGESHIFT}, 92 {MMU_PAGESIZE256M, MMU_PAGESHIFT256M, 0, 93 MMU_PAGESIZE256M >> MMU_PAGESHIFT}, 94 {0, 0, 0, 0} 95 }; 96 97 /* 98 * Maximum page size used to map 64-bit memory segment kmem64_base..kmem64_end 99 */ 100 int max_bootlp_tteszc = TTE256M; 101 102 /* 103 * Maximum and default segment size tunables for user heap, stack, private 104 * and shared anonymous memory, and user text and initialized data. 105 */ 106 size_t max_uheap_lpsize = MMU_PAGESIZE64K; 107 size_t default_uheap_lpsize = MMU_PAGESIZE64K; 108 size_t max_ustack_lpsize = MMU_PAGESIZE64K; 109 size_t default_ustack_lpsize = MMU_PAGESIZE64K; 110 size_t max_privmap_lpsize = MMU_PAGESIZE64K; 111 size_t max_uidata_lpsize = MMU_PAGESIZE64K; 112 size_t max_utext_lpsize = MMU_PAGESIZE4M; 113 size_t max_shm_lpsize = MMU_PAGESIZE4M; 114 115 /* 116 * Contiguous memory allocator data structures and variables. 117 * 118 * The sun4v kernel must provide a means to allocate physically 119 * contiguous, non-relocatable memory. The contig_mem_arena 120 * and contig_mem_slab_arena exist for this purpose. Allocations 121 * that require physically contiguous non-relocatable memory should 122 * be made using contig_mem_alloc() or contig_mem_alloc_align() 123 * which return memory from contig_mem_arena or contig_mem_reloc_arena. 124 * These arenas import memory from the contig_mem_slab_arena one 125 * contiguous chunk at a time. 126 * 127 * When importing slabs, an attempt is made to allocate a large page 128 * to use as backing. As a result of the non-relocatable requirement, 129 * slabs are allocated from the kernel cage freelists. If the cage does 130 * not contain any free contiguous chunks large enough to satisfy the 131 * slab allocation, the slab size will be downsized and the operation 132 * retried. Large slab sizes are tried first to minimize cage 133 * fragmentation. If the slab allocation is unsuccessful still, the slab 134 * is allocated from outside the kernel cage. This is undesirable because, 135 * until slabs are freed, it results in non-relocatable chunks scattered 136 * throughout physical memory. 137 * 138 * Allocations from the contig_mem_arena are backed by slabs from the 139 * cage. Allocations from the contig_mem_reloc_arena are backed by 140 * slabs allocated outside the cage. Slabs are left share locked while 141 * in use to prevent non-cage slabs from being relocated. 142 * 143 * Since there is no guarantee that large pages will be available in 144 * the kernel cage, contiguous memory is reserved and added to the 145 * contig_mem_arena at boot time, making it available for later 146 * contiguous memory allocations. This reserve will be used to satisfy 147 * contig_mem allocations first and it is only when the reserve is 148 * completely allocated that new slabs will need to be imported. 149 */ 150 static vmem_t *contig_mem_slab_arena; 151 static vmem_t *contig_mem_arena; 152 static vmem_t *contig_mem_reloc_arena; 153 static kmutex_t contig_mem_lock; 154 #define CONTIG_MEM_ARENA_QUANTUM 64 155 #define CONTIG_MEM_SLAB_ARENA_QUANTUM MMU_PAGESIZE64K 156 157 /* contig_mem_arena import slab sizes, in decreasing size order */ 158 static size_t contig_mem_import_sizes[] = { 159 MMU_PAGESIZE4M, 160 MMU_PAGESIZE512K, 161 MMU_PAGESIZE64K 162 }; 163 #define NUM_IMPORT_SIZES \ 164 (sizeof (contig_mem_import_sizes) / sizeof (size_t)) 165 static size_t contig_mem_import_size_max = MMU_PAGESIZE4M; 166 size_t contig_mem_slab_size = MMU_PAGESIZE4M; 167 168 /* Boot-time allocated buffer to pre-populate the contig_mem_arena */ 169 static size_t contig_mem_prealloc_size; 170 static void *contig_mem_prealloc_buf; 171 172 /* 173 * map_addr_proc() is the routine called when the system is to 174 * choose an address for the user. We will pick an address 175 * range which is just below the current stack limit. The 176 * algorithm used for cache consistency on machines with virtual 177 * address caches is such that offset 0 in the vnode is always 178 * on a shm_alignment'ed aligned address. Unfortunately, this 179 * means that vnodes which are demand paged will not be mapped 180 * cache consistently with the executable images. When the 181 * cache alignment for a given object is inconsistent, the 182 * lower level code must manage the translations so that this 183 * is not seen here (at the cost of efficiency, of course). 184 * 185 * addrp is a value/result parameter. 186 * On input it is a hint from the user to be used in a completely 187 * machine dependent fashion. For MAP_ALIGN, addrp contains the 188 * minimal alignment. 189 * 190 * On output it is NULL if no address can be found in the current 191 * processes address space or else an address that is currently 192 * not mapped for len bytes with a page of red zone on either side. 193 * If vacalign is true, then the selected address will obey the alignment 194 * constraints of a vac machine based on the given off value. 195 */ 196 /*ARGSUSED3*/ 197 void 198 map_addr_proc(caddr_t *addrp, size_t len, offset_t off, int vacalign, 199 caddr_t userlimit, struct proc *p, uint_t flags) 200 { 201 struct as *as = p->p_as; 202 caddr_t addr; 203 caddr_t base; 204 size_t slen; 205 uintptr_t align_amount; 206 int allow_largepage_alignment = 1; 207 208 base = p->p_brkbase; 209 if (userlimit < as->a_userlimit) { 210 /* 211 * This happens when a program wants to map something in 212 * a range that's accessible to a program in a smaller 213 * address space. For example, a 64-bit program might 214 * be calling mmap32(2) to guarantee that the returned 215 * address is below 4Gbytes. 216 */ 217 ASSERT(userlimit > base); 218 slen = userlimit - base; 219 } else { 220 slen = p->p_usrstack - base - (((size_t)rctl_enforced_value( 221 rctlproc_legacy[RLIMIT_STACK], p->p_rctls, p) + PAGEOFFSET) 222 & PAGEMASK); 223 } 224 len = (len + PAGEOFFSET) & PAGEMASK; 225 226 /* 227 * Redzone for each side of the request. This is done to leave 228 * one page unmapped between segments. This is not required, but 229 * it's useful for the user because if their program strays across 230 * a segment boundary, it will catch a fault immediately making 231 * debugging a little easier. 232 */ 233 len += (2 * PAGESIZE); 234 235 /* 236 * If the request is larger than the size of a particular 237 * mmu level, then we use that level to map the request. 238 * But this requires that both the virtual and the physical 239 * addresses be aligned with respect to that level, so we 240 * do the virtual bit of nastiness here. 241 * 242 * For 32-bit processes, only those which have specified 243 * MAP_ALIGN or an addr will be aligned on a page size > 4MB. Otherwise 244 * we can potentially waste up to 256MB of the 4G process address 245 * space just for alignment. 246 * 247 * XXXQ Should iterate trough hw_page_array here to catch 248 * all supported pagesizes 249 */ 250 if (p->p_model == DATAMODEL_ILP32 && ((flags & MAP_ALIGN) == 0 || 251 ((uintptr_t)*addrp) != 0)) { 252 allow_largepage_alignment = 0; 253 } 254 if ((mmu_page_sizes == max_mmu_page_sizes) && 255 allow_largepage_alignment && 256 (len >= MMU_PAGESIZE256M)) { /* 256MB mappings */ 257 align_amount = MMU_PAGESIZE256M; 258 } else if ((mmu_page_sizes == max_mmu_page_sizes) && 259 allow_largepage_alignment && 260 (len >= MMU_PAGESIZE32M)) { /* 32MB mappings */ 261 align_amount = MMU_PAGESIZE32M; 262 } else if (len >= MMU_PAGESIZE4M) { /* 4MB mappings */ 263 align_amount = MMU_PAGESIZE4M; 264 } else if (len >= MMU_PAGESIZE512K) { /* 512KB mappings */ 265 align_amount = MMU_PAGESIZE512K; 266 } else if (len >= MMU_PAGESIZE64K) { /* 64KB mappings */ 267 align_amount = MMU_PAGESIZE64K; 268 } else { 269 /* 270 * Align virtual addresses on a 64K boundary to ensure 271 * that ELF shared libraries are mapped with the appropriate 272 * alignment constraints by the run-time linker. 273 */ 274 align_amount = ELF_SPARC_MAXPGSZ; 275 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp != 0) && 276 ((uintptr_t)*addrp < align_amount)) 277 align_amount = (uintptr_t)*addrp; 278 } 279 280 /* 281 * 64-bit processes require 1024K alignment of ELF shared libraries. 282 */ 283 if (p->p_model == DATAMODEL_LP64) 284 align_amount = MAX(align_amount, ELF_SPARCV9_MAXPGSZ); 285 #ifdef VAC 286 if (vac && vacalign && (align_amount < shm_alignment)) 287 align_amount = shm_alignment; 288 #endif 289 290 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp > align_amount)) { 291 align_amount = (uintptr_t)*addrp; 292 } 293 len += align_amount; 294 295 /* 296 * Look for a large enough hole starting below the stack limit. 297 * After finding it, use the upper part. Addition of PAGESIZE is 298 * for the redzone as described above. 299 */ 300 as_purge(as); 301 if (as_gap(as, len, &base, &slen, AH_HI, NULL) == 0) { 302 caddr_t as_addr; 303 304 addr = base + slen - len + PAGESIZE; 305 as_addr = addr; 306 /* 307 * Round address DOWN to the alignment amount, 308 * add the offset, and if this address is less 309 * than the original address, add alignment amount. 310 */ 311 addr = (caddr_t)((uintptr_t)addr & (~(align_amount - 1l))); 312 addr += (long)(off & (align_amount - 1l)); 313 if (addr < as_addr) { 314 addr += align_amount; 315 } 316 317 ASSERT(addr <= (as_addr + align_amount)); 318 ASSERT(((uintptr_t)addr & (align_amount - 1l)) == 319 ((uintptr_t)(off & (align_amount - 1l)))); 320 *addrp = addr; 321 322 } else { 323 *addrp = NULL; /* no more virtual space */ 324 } 325 } 326 327 /* 328 * Platform-dependent page scrub call. 329 * We call hypervisor to scrub the page. 330 */ 331 void 332 pagescrub(page_t *pp, uint_t off, uint_t len) 333 { 334 uint64_t pa, length; 335 336 pa = (uint64_t)(pp->p_pagenum << MMU_PAGESHIFT + off); 337 length = (uint64_t)len; 338 339 (void) mem_scrub(pa, length); 340 } 341 342 void 343 sync_data_memory(caddr_t va, size_t len) 344 { 345 /* Call memory sync function */ 346 (void) mem_sync(va, len); 347 } 348 349 size_t 350 mmu_get_kernel_lpsize(size_t lpsize) 351 { 352 extern int mmu_exported_pagesize_mask; 353 uint_t tte; 354 355 if (lpsize == 0) { 356 /* no setting for segkmem_lpsize in /etc/system: use default */ 357 if (mmu_exported_pagesize_mask & (1 << TTE256M)) { 358 lpsize = MMU_PAGESIZE256M; 359 } else if (mmu_exported_pagesize_mask & (1 << TTE4M)) { 360 lpsize = MMU_PAGESIZE4M; 361 } else if (mmu_exported_pagesize_mask & (1 << TTE64K)) { 362 lpsize = MMU_PAGESIZE64K; 363 } else { 364 lpsize = MMU_PAGESIZE; 365 } 366 367 return (lpsize); 368 } 369 370 for (tte = TTE8K; tte <= TTE256M; tte++) { 371 372 if ((mmu_exported_pagesize_mask & (1 << tte)) == 0) 373 continue; 374 375 if (lpsize == TTEBYTES(tte)) 376 return (lpsize); 377 } 378 379 lpsize = TTEBYTES(TTE8K); 380 return (lpsize); 381 } 382 383 void 384 mmu_init_kcontext() 385 { 386 } 387 388 /*ARGSUSED*/ 389 void 390 mmu_init_kernel_pgsz(struct hat *hat) 391 { 392 } 393 394 static void * 395 contig_mem_span_alloc(vmem_t *vmp, size_t size, int vmflag) 396 { 397 page_t *ppl; 398 page_t *rootpp; 399 caddr_t addr = NULL; 400 pgcnt_t npages = btopr(size); 401 page_t **ppa; 402 int pgflags; 403 spgcnt_t i = 0; 404 405 406 ASSERT(size <= contig_mem_import_size_max); 407 ASSERT((size & (size - 1)) == 0); 408 409 if ((addr = vmem_xalloc(vmp, size, size, 0, 0, 410 NULL, NULL, vmflag)) == NULL) { 411 return (NULL); 412 } 413 414 /* The address should be slab-size aligned. */ 415 ASSERT(((uintptr_t)addr & (size - 1)) == 0); 416 417 if (page_resv(npages, vmflag & VM_KMFLAGS) == 0) { 418 vmem_xfree(vmp, addr, size); 419 return (NULL); 420 } 421 422 pgflags = PG_EXCL; 423 if (vmflag & VM_NORELOC) 424 pgflags |= PG_NORELOC; 425 426 ppl = page_create_va_large(&kvp, (u_offset_t)(uintptr_t)addr, size, 427 pgflags, &kvseg, addr, NULL); 428 429 if (ppl == NULL) { 430 vmem_xfree(vmp, addr, size); 431 page_unresv(npages); 432 return (NULL); 433 } 434 435 rootpp = ppl; 436 ppa = kmem_zalloc(npages * sizeof (page_t *), KM_SLEEP); 437 while (ppl != NULL) { 438 page_t *pp = ppl; 439 ppa[i++] = pp; 440 page_sub(&ppl, pp); 441 ASSERT(page_iolock_assert(pp)); 442 ASSERT(PAGE_EXCL(pp)); 443 page_io_unlock(pp); 444 } 445 446 /* 447 * Load the locked entry. It's OK to preload the entry into 448 * the TSB since we now support large mappings in the kernel TSB. 449 */ 450 hat_memload_array(kas.a_hat, (caddr_t)rootpp->p_offset, size, 451 ppa, (PROT_ALL & ~PROT_USER) | HAT_NOSYNC, HAT_LOAD_LOCK); 452 453 ASSERT(i == page_get_pagecnt(ppa[0]->p_szc)); 454 for (--i; i >= 0; --i) { 455 ASSERT(ppa[i]->p_szc == ppa[0]->p_szc); 456 ASSERT(page_pptonum(ppa[i]) == page_pptonum(ppa[0]) + i); 457 (void) page_pp_lock(ppa[i], 0, 1); 458 /* 459 * Leave the page share locked. For non-cage pages, 460 * this would prevent memory DR if it were supported 461 * on sun4v. 462 */ 463 page_downgrade(ppa[i]); 464 } 465 466 kmem_free(ppa, npages * sizeof (page_t *)); 467 return (addr); 468 } 469 470 /* 471 * Allocates a slab by first trying to use the largest slab size 472 * in contig_mem_import_sizes and then falling back to smaller slab 473 * sizes still large enough for the allocation. The sizep argument 474 * is a pointer to the requested size. When a slab is successfully 475 * allocated, the slab size, which must be >= *sizep and <= 476 * contig_mem_import_size_max, is returned in the *sizep argument. 477 * Returns the virtual address of the new slab. 478 */ 479 static void * 480 span_alloc_downsize(vmem_t *vmp, size_t *sizep, size_t align, int vmflag) 481 { 482 int i; 483 484 ASSERT(*sizep <= contig_mem_import_size_max); 485 486 for (i = 0; i < NUM_IMPORT_SIZES; i++) { 487 size_t page_size = contig_mem_import_sizes[i]; 488 489 /* 490 * Check that the alignment is also less than the 491 * import (large page) size. In the case where the 492 * alignment is larger than the size, a large page 493 * large enough for the allocation is not necessarily 494 * physical-address aligned to satisfy the requested 495 * alignment. Since alignment is required to be a 496 * power-of-2, any large page >= size && >= align will 497 * suffice. 498 */ 499 if (*sizep <= page_size && align <= page_size) { 500 void *addr; 501 addr = contig_mem_span_alloc(vmp, page_size, vmflag); 502 if (addr == NULL) 503 continue; 504 *sizep = page_size; 505 return (addr); 506 } 507 return (NULL); 508 } 509 510 return (NULL); 511 } 512 513 static void * 514 contig_mem_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align, int vmflag) 515 { 516 return (span_alloc_downsize(vmp, sizep, align, vmflag | VM_NORELOC)); 517 } 518 519 static void * 520 contig_mem_reloc_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align, 521 int vmflag) 522 { 523 ASSERT((vmflag & VM_NORELOC) == 0); 524 return (span_alloc_downsize(vmp, sizep, align, vmflag)); 525 } 526 527 /* 528 * Free a span, which is always exactly one large page. 529 */ 530 static void 531 contig_mem_span_free(vmem_t *vmp, void *inaddr, size_t size) 532 { 533 page_t *pp; 534 caddr_t addr = inaddr; 535 caddr_t eaddr; 536 pgcnt_t npages = btopr(size); 537 page_t *rootpp = NULL; 538 539 ASSERT(size <= contig_mem_import_size_max); 540 /* All slabs should be size aligned */ 541 ASSERT(((uintptr_t)addr & (size - 1)) == 0); 542 543 hat_unload(kas.a_hat, addr, size, HAT_UNLOAD_UNLOCK); 544 545 for (eaddr = addr + size; addr < eaddr; addr += PAGESIZE) { 546 pp = page_find(&kvp, (u_offset_t)(uintptr_t)addr); 547 if (pp == NULL) { 548 panic("contig_mem_span_free: page not found"); 549 } 550 if (!page_tryupgrade(pp)) { 551 page_unlock(pp); 552 pp = page_lookup(&kvp, 553 (u_offset_t)(uintptr_t)addr, SE_EXCL); 554 if (pp == NULL) 555 panic("contig_mem_span_free: page not found"); 556 } 557 558 ASSERT(PAGE_EXCL(pp)); 559 ASSERT(size == page_get_pagesize(pp->p_szc)); 560 ASSERT(rootpp == NULL || rootpp->p_szc == pp->p_szc); 561 ASSERT(rootpp == NULL || (page_pptonum(rootpp) + 562 (pgcnt_t)btop(addr - (caddr_t)inaddr) == page_pptonum(pp))); 563 564 page_pp_unlock(pp, 0, 1); 565 566 if (rootpp == NULL) 567 rootpp = pp; 568 } 569 page_destroy_pages(rootpp); 570 page_unresv(npages); 571 572 if (vmp != NULL) 573 vmem_xfree(vmp, inaddr, size); 574 } 575 576 static void * 577 contig_vmem_xalloc_aligned_wrapper(vmem_t *vmp, size_t *sizep, size_t align, 578 int vmflag) 579 { 580 ASSERT((align & (align - 1)) == 0); 581 return (vmem_xalloc(vmp, *sizep, align, 0, 0, NULL, NULL, vmflag)); 582 } 583 584 /* 585 * contig_mem_alloc, contig_mem_alloc_align 586 * 587 * Caution: contig_mem_alloc and contig_mem_alloc_align should be 588 * used only when physically contiguous non-relocatable memory is 589 * required. Furthermore, use of these allocation routines should be 590 * minimized as well as should the allocation size. As described in the 591 * contig_mem_arena comment block above, slab allocations fall back to 592 * being outside of the cage. Therefore, overuse of these allocation 593 * routines can lead to non-relocatable large pages being allocated 594 * outside the cage. Such pages prevent the allocation of a larger page 595 * occupying overlapping pages. This can impact performance for 596 * applications that utilize e.g. 256M large pages. 597 */ 598 599 /* 600 * Allocates size aligned contiguous memory up to contig_mem_import_size_max. 601 * Size must be a power of 2. 602 */ 603 void * 604 contig_mem_alloc(size_t size) 605 { 606 ASSERT((size & (size - 1)) == 0); 607 return (contig_mem_alloc_align(size, size)); 608 } 609 610 /* 611 * contig_mem_alloc_align allocates real contiguous memory with the specified 612 * alignment up to contig_mem_import_size_max. The alignment must be a 613 * power of 2 and no greater than contig_mem_import_size_max. We assert 614 * the aligment is a power of 2. For non-debug, vmem_xalloc will panic 615 * for non power of 2 alignments. 616 */ 617 void * 618 contig_mem_alloc_align(size_t size, size_t align) 619 { 620 void *buf; 621 622 ASSERT(size <= contig_mem_import_size_max); 623 ASSERT(align <= contig_mem_import_size_max); 624 ASSERT((align & (align - 1)) == 0); 625 626 if (align < CONTIG_MEM_ARENA_QUANTUM) 627 align = CONTIG_MEM_ARENA_QUANTUM; 628 629 /* 630 * We take the lock here to serialize span allocations. 631 * We do not lose concurrency for the common case, since 632 * allocations that don't require new span allocations 633 * are serialized by vmem_xalloc. Serializing span 634 * allocations also prevents us from trying to allocate 635 * more spans that necessary. 636 */ 637 mutex_enter(&contig_mem_lock); 638 639 buf = vmem_xalloc(contig_mem_arena, size, align, 0, 0, 640 NULL, NULL, VM_NOSLEEP | VM_NORELOC); 641 642 if ((buf == NULL) && (size <= MMU_PAGESIZE)) { 643 mutex_exit(&contig_mem_lock); 644 return (vmem_xalloc(static_alloc_arena, size, align, 0, 0, 645 NULL, NULL, VM_NOSLEEP)); 646 } 647 648 if (buf == NULL) { 649 buf = vmem_xalloc(contig_mem_reloc_arena, size, align, 0, 0, 650 NULL, NULL, VM_NOSLEEP); 651 } 652 653 mutex_exit(&contig_mem_lock); 654 655 return (buf); 656 } 657 658 void 659 contig_mem_free(void *vaddr, size_t size) 660 { 661 if (vmem_contains(contig_mem_arena, vaddr, size)) { 662 vmem_xfree(contig_mem_arena, vaddr, size); 663 } else if (size > MMU_PAGESIZE) { 664 vmem_xfree(contig_mem_reloc_arena, vaddr, size); 665 } else { 666 vmem_xfree(static_alloc_arena, vaddr, size); 667 } 668 } 669 670 /* 671 * We create a set of stacked vmem arenas to enable us to 672 * allocate large >PAGESIZE chucks of contiguous Real Address space. 673 * The vmem_xcreate interface is used to create the contig_mem_arena 674 * allowing the import routine to downsize the requested slab size 675 * and return a smaller slab. 676 */ 677 void 678 contig_mem_init(void) 679 { 680 mutex_init(&contig_mem_lock, NULL, MUTEX_DEFAULT, NULL); 681 682 contig_mem_slab_arena = vmem_xcreate("contig_mem_slab_arena", NULL, 0, 683 CONTIG_MEM_SLAB_ARENA_QUANTUM, contig_vmem_xalloc_aligned_wrapper, 684 vmem_xfree, heap_arena, 0, VM_SLEEP | VMC_XALIGN); 685 686 contig_mem_arena = vmem_xcreate("contig_mem_arena", NULL, 0, 687 CONTIG_MEM_ARENA_QUANTUM, contig_mem_span_xalloc, 688 contig_mem_span_free, contig_mem_slab_arena, 0, 689 VM_SLEEP | VM_BESTFIT | VMC_XALIGN); 690 691 contig_mem_reloc_arena = vmem_xcreate("contig_mem_reloc_arena", NULL, 0, 692 CONTIG_MEM_ARENA_QUANTUM, contig_mem_reloc_span_xalloc, 693 contig_mem_span_free, contig_mem_slab_arena, 0, 694 VM_SLEEP | VM_BESTFIT | VMC_XALIGN); 695 696 if (vmem_add(contig_mem_arena, contig_mem_prealloc_buf, 697 contig_mem_prealloc_size, VM_SLEEP) == NULL) 698 cmn_err(CE_PANIC, "Failed to pre-populate contig_mem_arena"); 699 } 700 701 /* 702 * In calculating how much memory to pre-allocate, we include a small 703 * amount per-CPU to account for per-CPU buffers in line with measured 704 * values for different size systems. contig_mem_prealloc_base_size is 705 * a cpu specific amount to be pre-allocated before considering per-CPU 706 * requirements and memory size. We always pre-allocate a minimum amount 707 * of memory determined by PREALLOC_MIN. Beyond that, we take the minimum 708 * of contig_mem_prealloc_base_size and a small percentage of physical 709 * memory to prevent allocating too much on smaller systems. 710 * contig_mem_prealloc_base_size is global, allowing for the CPU module 711 * to increase its value if necessary. 712 */ 713 #define PREALLOC_PER_CPU (256 * 1024) /* 256K */ 714 #define PREALLOC_PERCENT (4) /* 4% */ 715 #define PREALLOC_MIN (16 * 1024 * 1024) /* 16M */ 716 size_t contig_mem_prealloc_base_size = 0; 717 718 /* 719 * Called at boot-time allowing pre-allocation of contiguous memory. 720 * The argument 'alloc_base' is the requested base address for the 721 * allocation and originates in startup_memlist. 722 */ 723 caddr_t 724 contig_mem_prealloc(caddr_t alloc_base, pgcnt_t npages) 725 { 726 contig_mem_prealloc_size = MIN((PREALLOC_PER_CPU * ncpu_guest_max) + 727 contig_mem_prealloc_base_size, 728 (ptob(npages) * PREALLOC_PERCENT) / 100); 729 contig_mem_prealloc_size = MAX(contig_mem_prealloc_size, PREALLOC_MIN); 730 contig_mem_prealloc_size = P2ROUNDUP(contig_mem_prealloc_size, 731 MMU_PAGESIZE4M); 732 733 alloc_base = (caddr_t)roundup((uintptr_t)alloc_base, MMU_PAGESIZE4M); 734 if (prom_alloc(alloc_base, contig_mem_prealloc_size, 735 MMU_PAGESIZE4M) != alloc_base) 736 prom_panic("can't allocate contig mem"); 737 738 contig_mem_prealloc_buf = alloc_base; 739 alloc_base += contig_mem_prealloc_size; 740 741 return (alloc_base); 742 } 743 744 static uint_t sp_color_stride = 16; 745 static uint_t sp_color_mask = 0x1f; 746 static uint_t sp_current_color = (uint_t)-1; 747 748 size_t 749 exec_get_spslew(void) 750 { 751 uint_t spcolor = atomic_inc_32_nv(&sp_current_color); 752 return ((size_t)((spcolor & sp_color_mask) * SA(sp_color_stride))); 753 } 754