xref: /titanic_51/usr/src/uts/sun4v/vm/mach_vm_dep.c (revision 7257d1b4d25bfac0c802847390e98a464fd787ac)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
27 /*	All Rights Reserved   */
28 
29 /*
30  * Portions of this source code were derived from Berkeley 4.3 BSD
31  * under license from the Regents of the University of California.
32  */
33 
34 #pragma ident	"%Z%%M%	%I%	%E% SMI"
35 
36 /*
37  * UNIX machine dependent virtual memory support.
38  */
39 
40 #include <sys/vm.h>
41 #include <sys/exec.h>
42 #include <sys/cmn_err.h>
43 #include <sys/cpu_module.h>
44 #include <sys/cpu.h>
45 #include <sys/elf_SPARC.h>
46 #include <sys/archsystm.h>
47 #include <vm/hat_sfmmu.h>
48 #include <sys/memnode.h>
49 #include <sys/mem_cage.h>
50 #include <vm/vm_dep.h>
51 #include <sys/error.h>
52 #include <sys/machsystm.h>
53 #include <vm/seg_kmem.h>
54 #include <sys/stack.h>
55 #include <sys/atomic.h>
56 #include <sys/promif.h>
57 
58 uint_t page_colors = 0;
59 uint_t page_colors_mask = 0;
60 uint_t page_coloring_shift = 0;
61 int consistent_coloring;
62 int update_proc_pgcolorbase_after_fork = 1;
63 
64 uint_t mmu_page_sizes = MMU_PAGE_SIZES;
65 uint_t max_mmu_page_sizes = MMU_PAGE_SIZES;
66 uint_t mmu_hashcnt = MAX_HASHCNT;
67 uint_t max_mmu_hashcnt = MAX_HASHCNT;
68 size_t mmu_ism_pagesize = DEFAULT_ISM_PAGESIZE;
69 
70 /*
71  * A bitmask of the page sizes supported by hardware based upon szc.
72  * The base pagesize (p_szc == 0) must always be supported by the hardware.
73  */
74 int mmu_exported_pagesize_mask;
75 uint_t mmu_exported_page_sizes;
76 
77 uint_t szc_2_userszc[MMU_PAGE_SIZES];
78 uint_t userszc_2_szc[MMU_PAGE_SIZES];
79 
80 extern uint_t vac_colors_mask;
81 extern int vac_shift;
82 
83 hw_pagesize_t hw_page_array[] = {
84 	{MMU_PAGESIZE, MMU_PAGESHIFT, 0, MMU_PAGESIZE >> MMU_PAGESHIFT},
85 	{MMU_PAGESIZE64K, MMU_PAGESHIFT64K, 0,
86 	    MMU_PAGESIZE64K >> MMU_PAGESHIFT},
87 	{MMU_PAGESIZE512K, MMU_PAGESHIFT512K, 0,
88 	    MMU_PAGESIZE512K >> MMU_PAGESHIFT},
89 	{MMU_PAGESIZE4M, MMU_PAGESHIFT4M, 0, MMU_PAGESIZE4M >> MMU_PAGESHIFT},
90 	{MMU_PAGESIZE32M, MMU_PAGESHIFT32M, 0,
91 	    MMU_PAGESIZE32M >> MMU_PAGESHIFT},
92 	{MMU_PAGESIZE256M, MMU_PAGESHIFT256M, 0,
93 	    MMU_PAGESIZE256M >> MMU_PAGESHIFT},
94 	{0, 0, 0, 0}
95 };
96 
97 /*
98  * Maximum page size used to map 64-bit memory segment kmem64_base..kmem64_end
99  */
100 int	max_bootlp_tteszc = TTE256M;
101 
102 /*
103  * Maximum and default segment size tunables for user heap, stack, private
104  * and shared anonymous memory, and user text and initialized data.
105  */
106 size_t max_uheap_lpsize = MMU_PAGESIZE64K;
107 size_t default_uheap_lpsize = MMU_PAGESIZE64K;
108 size_t max_ustack_lpsize = MMU_PAGESIZE64K;
109 size_t default_ustack_lpsize = MMU_PAGESIZE64K;
110 size_t max_privmap_lpsize = MMU_PAGESIZE64K;
111 size_t max_uidata_lpsize = MMU_PAGESIZE64K;
112 size_t max_utext_lpsize = MMU_PAGESIZE4M;
113 size_t max_shm_lpsize = MMU_PAGESIZE4M;
114 
115 /*
116  * Contiguous memory allocator data structures and variables.
117  *
118  * The sun4v kernel must provide a means to allocate physically
119  * contiguous, non-relocatable memory. The contig_mem_arena
120  * and contig_mem_slab_arena exist for this purpose. Allocations
121  * that require physically contiguous non-relocatable memory should
122  * be made using contig_mem_alloc() or contig_mem_alloc_align()
123  * which return memory from contig_mem_arena or contig_mem_reloc_arena.
124  * These arenas import memory from the contig_mem_slab_arena one
125  * contiguous chunk at a time.
126  *
127  * When importing slabs, an attempt is made to allocate a large page
128  * to use as backing. As a result of the non-relocatable requirement,
129  * slabs are allocated from the kernel cage freelists. If the cage does
130  * not contain any free contiguous chunks large enough to satisfy the
131  * slab allocation, the slab size will be downsized and the operation
132  * retried. Large slab sizes are tried first to minimize cage
133  * fragmentation. If the slab allocation is unsuccessful still, the slab
134  * is allocated from outside the kernel cage. This is undesirable because,
135  * until slabs are freed, it results in non-relocatable chunks scattered
136  * throughout physical memory.
137  *
138  * Allocations from the contig_mem_arena are backed by slabs from the
139  * cage. Allocations from the contig_mem_reloc_arena are backed by
140  * slabs allocated outside the cage. Slabs are left share locked while
141  * in use to prevent non-cage slabs from being relocated.
142  *
143  * Since there is no guarantee that large pages will be available in
144  * the kernel cage, contiguous memory is reserved and added to the
145  * contig_mem_arena at boot time, making it available for later
146  * contiguous memory allocations. This reserve will be used to satisfy
147  * contig_mem allocations first and it is only when the reserve is
148  * completely allocated that new slabs will need to be imported.
149  */
150 static	vmem_t		*contig_mem_slab_arena;
151 static	vmem_t		*contig_mem_arena;
152 static	vmem_t		*contig_mem_reloc_arena;
153 static	kmutex_t	contig_mem_lock;
154 #define	CONTIG_MEM_ARENA_QUANTUM	64
155 #define	CONTIG_MEM_SLAB_ARENA_QUANTUM	MMU_PAGESIZE64K
156 
157 /* contig_mem_arena import slab sizes, in decreasing size order */
158 static size_t contig_mem_import_sizes[] = {
159 	MMU_PAGESIZE4M,
160 	MMU_PAGESIZE512K,
161 	MMU_PAGESIZE64K
162 };
163 #define	NUM_IMPORT_SIZES	\
164 	(sizeof (contig_mem_import_sizes) / sizeof (size_t))
165 static size_t contig_mem_import_size_max	= MMU_PAGESIZE4M;
166 size_t contig_mem_slab_size			= MMU_PAGESIZE4M;
167 
168 /* Boot-time allocated buffer to pre-populate the contig_mem_arena */
169 static size_t contig_mem_prealloc_size;
170 static void *contig_mem_prealloc_buf;
171 
172 /*
173  * map_addr_proc() is the routine called when the system is to
174  * choose an address for the user.  We will pick an address
175  * range which is just below the current stack limit.  The
176  * algorithm used for cache consistency on machines with virtual
177  * address caches is such that offset 0 in the vnode is always
178  * on a shm_alignment'ed aligned address.  Unfortunately, this
179  * means that vnodes which are demand paged will not be mapped
180  * cache consistently with the executable images.  When the
181  * cache alignment for a given object is inconsistent, the
182  * lower level code must manage the translations so that this
183  * is not seen here (at the cost of efficiency, of course).
184  *
185  * Every mapping will have a redzone of a single page on either side of
186  * the request. This is done to leave one page unmapped between segments.
187  * This is not required, but it's useful for the user because if their
188  * program strays across a segment boundary, it will catch a fault
189  * immediately making debugging a little easier.  Currently the redzone
190  * is mandatory.
191  *
192  * addrp is a value/result parameter.
193  *	On input it is a hint from the user to be used in a completely
194  *	machine dependent fashion.  For MAP_ALIGN, addrp contains the
195  *	minimal alignment, which must be some "power of two" multiple of
196  *	pagesize.
197  *
198  *	On output it is NULL if no address can be found in the current
199  *	processes address space or else an address that is currently
200  *	not mapped for len bytes with a page of red zone on either side.
201  *	If vacalign is true, then the selected address will obey the alignment
202  *	constraints of a vac machine based on the given off value.
203  */
204 /*ARGSUSED3*/
205 void
206 map_addr_proc(caddr_t *addrp, size_t len, offset_t off, int vacalign,
207     caddr_t userlimit, struct proc *p, uint_t flags)
208 {
209 	struct as *as = p->p_as;
210 	caddr_t addr;
211 	caddr_t base;
212 	size_t slen;
213 	uintptr_t align_amount;
214 	int allow_largepage_alignment = 1;
215 
216 	base = p->p_brkbase;
217 	if (userlimit < as->a_userlimit) {
218 		/*
219 		 * This happens when a program wants to map something in
220 		 * a range that's accessible to a program in a smaller
221 		 * address space.  For example, a 64-bit program might
222 		 * be calling mmap32(2) to guarantee that the returned
223 		 * address is below 4Gbytes.
224 		 */
225 		ASSERT(userlimit > base);
226 		slen = userlimit - base;
227 	} else {
228 		slen = p->p_usrstack - base - (((size_t)rctl_enforced_value(
229 		    rctlproc_legacy[RLIMIT_STACK], p->p_rctls, p) + PAGEOFFSET)
230 		    & PAGEMASK);
231 	}
232 	/* Make len be a multiple of PAGESIZE */
233 	len = (len + PAGEOFFSET) & PAGEMASK;
234 
235 	/*
236 	 *  If the request is larger than the size of a particular
237 	 *  mmu level, then we use that level to map the request.
238 	 *  But this requires that both the virtual and the physical
239 	 *  addresses be aligned with respect to that level, so we
240 	 *  do the virtual bit of nastiness here.
241 	 *
242 	 *  For 32-bit processes, only those which have specified
243 	 *  MAP_ALIGN or an addr will be aligned on a page size > 4MB. Otherwise
244 	 *  we can potentially waste up to 256MB of the 4G process address
245 	 *  space just for alignment.
246 	 *
247 	 * XXXQ Should iterate trough hw_page_array here to catch
248 	 * all supported pagesizes
249 	 */
250 	if (p->p_model == DATAMODEL_ILP32 && ((flags & MAP_ALIGN) == 0 ||
251 	    ((uintptr_t)*addrp) != 0)) {
252 		allow_largepage_alignment = 0;
253 	}
254 	if ((mmu_page_sizes == max_mmu_page_sizes) &&
255 	    allow_largepage_alignment &&
256 	    (len >= MMU_PAGESIZE256M)) {	/* 256MB mappings */
257 		align_amount = MMU_PAGESIZE256M;
258 	} else if ((mmu_page_sizes == max_mmu_page_sizes) &&
259 	    allow_largepage_alignment &&
260 	    (len >= MMU_PAGESIZE32M)) {	/* 32MB mappings */
261 		align_amount = MMU_PAGESIZE32M;
262 	} else if (len >= MMU_PAGESIZE4M) {  /* 4MB mappings */
263 		align_amount = MMU_PAGESIZE4M;
264 	} else if (len >= MMU_PAGESIZE512K) { /* 512KB mappings */
265 		align_amount = MMU_PAGESIZE512K;
266 	} else if (len >= MMU_PAGESIZE64K) { /* 64KB mappings */
267 		align_amount = MMU_PAGESIZE64K;
268 	} else  {
269 		/*
270 		 * Align virtual addresses on a 64K boundary to ensure
271 		 * that ELF shared libraries are mapped with the appropriate
272 		 * alignment constraints by the run-time linker.
273 		 */
274 		align_amount = ELF_SPARC_MAXPGSZ;
275 		if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp != 0) &&
276 		    ((uintptr_t)*addrp < align_amount))
277 			align_amount = (uintptr_t)*addrp;
278 	}
279 
280 	/*
281 	 * 64-bit processes require 1024K alignment of ELF shared libraries.
282 	 */
283 	if (p->p_model == DATAMODEL_LP64)
284 		align_amount = MAX(align_amount, ELF_SPARCV9_MAXPGSZ);
285 #ifdef VAC
286 	if (vac && vacalign && (align_amount < shm_alignment))
287 		align_amount = shm_alignment;
288 #endif
289 
290 	if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp > align_amount)) {
291 		align_amount = (uintptr_t)*addrp;
292 	}
293 
294 	ASSERT(ISP2(align_amount));
295 	ASSERT(align_amount == 0 || align_amount >= PAGESIZE);
296 
297 	/*
298 	 * Look for a large enough hole starting below the stack limit.
299 	 * After finding it, use the upper part.
300 	 */
301 	as_purge(as);
302 	off = off & (align_amount - 1);
303 	if (as_gap_aligned(as, len, &base, &slen, AH_HI, NULL, align_amount,
304 	    PAGESIZE, off) == 0) {
305 		caddr_t as_addr;
306 
307 		/*
308 		 * addr is the highest possible address to use since we have
309 		 * a PAGESIZE redzone at the beginning and end.
310 		 */
311 		addr = base + slen - (PAGESIZE + len);
312 		as_addr = addr;
313 		/*
314 		 * Round address DOWN to the alignment amount and
315 		 * add the offset in.
316 		 * If addr is greater than as_addr, len would not be large
317 		 * enough to include the redzone, so we must adjust down
318 		 * by the alignment amount.
319 		 */
320 		addr = (caddr_t)((uintptr_t)addr & (~(align_amount - 1l)));
321 		addr += (long)off;
322 		if (addr > as_addr) {
323 			addr -= align_amount;
324 		}
325 
326 		ASSERT(addr > base);
327 		ASSERT(addr + len < base + slen);
328 		ASSERT(((uintptr_t)addr & (align_amount - 1l)) ==
329 		    ((uintptr_t)(off)));
330 		*addrp = addr;
331 
332 	} else {
333 		*addrp = NULL;	/* no more virtual space */
334 	}
335 }
336 
337 /*
338  * Platform-dependent page scrub call.
339  * We call hypervisor to scrub the page.
340  */
341 void
342 pagescrub(page_t *pp, uint_t off, uint_t len)
343 {
344 	uint64_t pa, length;
345 
346 	pa = (uint64_t)(pp->p_pagenum << MMU_PAGESHIFT + off);
347 	length = (uint64_t)len;
348 
349 	(void) mem_scrub(pa, length);
350 }
351 
352 void
353 sync_data_memory(caddr_t va, size_t len)
354 {
355 	/* Call memory sync function */
356 	(void) mem_sync(va, len);
357 }
358 
359 size_t
360 mmu_get_kernel_lpsize(size_t lpsize)
361 {
362 	extern int mmu_exported_pagesize_mask;
363 	uint_t tte;
364 
365 	if (lpsize == 0) {
366 		/* no setting for segkmem_lpsize in /etc/system: use default */
367 		if (mmu_exported_pagesize_mask & (1 << TTE256M)) {
368 			lpsize = MMU_PAGESIZE256M;
369 		} else if (mmu_exported_pagesize_mask & (1 << TTE4M)) {
370 			lpsize = MMU_PAGESIZE4M;
371 		} else if (mmu_exported_pagesize_mask & (1 << TTE64K)) {
372 			lpsize = MMU_PAGESIZE64K;
373 		} else {
374 			lpsize = MMU_PAGESIZE;
375 		}
376 
377 		return (lpsize);
378 	}
379 
380 	for (tte = TTE8K; tte <= TTE256M; tte++) {
381 
382 		if ((mmu_exported_pagesize_mask & (1 << tte)) == 0)
383 			continue;
384 
385 		if (lpsize == TTEBYTES(tte))
386 			return (lpsize);
387 	}
388 
389 	lpsize = TTEBYTES(TTE8K);
390 	return (lpsize);
391 }
392 
393 void
394 mmu_init_kcontext()
395 {
396 }
397 
398 /*ARGSUSED*/
399 void
400 mmu_init_kernel_pgsz(struct hat *hat)
401 {
402 }
403 
404 static void *
405 contig_mem_span_alloc(vmem_t *vmp, size_t size, int vmflag)
406 {
407 	page_t *ppl;
408 	page_t *rootpp;
409 	caddr_t addr = NULL;
410 	pgcnt_t npages = btopr(size);
411 	page_t **ppa;
412 	int pgflags;
413 	spgcnt_t i = 0;
414 
415 
416 	ASSERT(size <= contig_mem_import_size_max);
417 	ASSERT((size & (size - 1)) == 0);
418 
419 	if ((addr = vmem_xalloc(vmp, size, size, 0, 0,
420 	    NULL, NULL, vmflag)) == NULL) {
421 		return (NULL);
422 	}
423 
424 	/* The address should be slab-size aligned. */
425 	ASSERT(((uintptr_t)addr & (size - 1)) == 0);
426 
427 	if (page_resv(npages, vmflag & VM_KMFLAGS) == 0) {
428 		vmem_xfree(vmp, addr, size);
429 		return (NULL);
430 	}
431 
432 	pgflags = PG_EXCL;
433 	if (vmflag & VM_NORELOC)
434 		pgflags |= PG_NORELOC;
435 
436 	ppl = page_create_va_large(&kvp, (u_offset_t)(uintptr_t)addr, size,
437 	    pgflags, &kvseg, addr, NULL);
438 
439 	if (ppl == NULL) {
440 		vmem_xfree(vmp, addr, size);
441 		page_unresv(npages);
442 		return (NULL);
443 	}
444 
445 	rootpp = ppl;
446 	ppa = kmem_zalloc(npages * sizeof (page_t *), KM_SLEEP);
447 	while (ppl != NULL) {
448 		page_t *pp = ppl;
449 		ppa[i++] = pp;
450 		page_sub(&ppl, pp);
451 		ASSERT(page_iolock_assert(pp));
452 		ASSERT(PAGE_EXCL(pp));
453 		page_io_unlock(pp);
454 	}
455 
456 	/*
457 	 * Load the locked entry.  It's OK to preload the entry into
458 	 * the TSB since we now support large mappings in the kernel TSB.
459 	 */
460 	hat_memload_array(kas.a_hat, (caddr_t)rootpp->p_offset, size,
461 	    ppa, (PROT_ALL & ~PROT_USER) | HAT_NOSYNC, HAT_LOAD_LOCK);
462 
463 	ASSERT(i == page_get_pagecnt(ppa[0]->p_szc));
464 	for (--i; i >= 0; --i) {
465 		ASSERT(ppa[i]->p_szc == ppa[0]->p_szc);
466 		ASSERT(page_pptonum(ppa[i]) == page_pptonum(ppa[0]) + i);
467 		(void) page_pp_lock(ppa[i], 0, 1);
468 		/*
469 		 * Leave the page share locked. For non-cage pages,
470 		 * this would prevent memory DR if it were supported
471 		 * on sun4v.
472 		 */
473 		page_downgrade(ppa[i]);
474 	}
475 
476 	kmem_free(ppa, npages * sizeof (page_t *));
477 	return (addr);
478 }
479 
480 /*
481  * Allocates a slab by first trying to use the largest slab size
482  * in contig_mem_import_sizes and then falling back to smaller slab
483  * sizes still large enough for the allocation. The sizep argument
484  * is a pointer to the requested size. When a slab is successfully
485  * allocated, the slab size, which must be >= *sizep and <=
486  * contig_mem_import_size_max, is returned in the *sizep argument.
487  * Returns the virtual address of the new slab.
488  */
489 static void *
490 span_alloc_downsize(vmem_t *vmp, size_t *sizep, size_t align, int vmflag)
491 {
492 	int i;
493 
494 	ASSERT(*sizep <= contig_mem_import_size_max);
495 
496 	for (i = 0; i < NUM_IMPORT_SIZES; i++) {
497 		size_t page_size = contig_mem_import_sizes[i];
498 
499 		/*
500 		 * Check that the alignment is also less than the
501 		 * import (large page) size. In the case where the
502 		 * alignment is larger than the size, a large page
503 		 * large enough for the allocation is not necessarily
504 		 * physical-address aligned to satisfy the requested
505 		 * alignment. Since alignment is required to be a
506 		 * power-of-2, any large page >= size && >= align will
507 		 * suffice.
508 		 */
509 		if (*sizep <= page_size && align <= page_size) {
510 			void *addr;
511 			addr = contig_mem_span_alloc(vmp, page_size, vmflag);
512 			if (addr == NULL)
513 				continue;
514 			*sizep = page_size;
515 			return (addr);
516 		}
517 		return (NULL);
518 	}
519 
520 	return (NULL);
521 }
522 
523 static void *
524 contig_mem_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align, int vmflag)
525 {
526 	return (span_alloc_downsize(vmp, sizep, align, vmflag | VM_NORELOC));
527 }
528 
529 static void *
530 contig_mem_reloc_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align,
531     int vmflag)
532 {
533 	ASSERT((vmflag & VM_NORELOC) == 0);
534 	return (span_alloc_downsize(vmp, sizep, align, vmflag));
535 }
536 
537 /*
538  * Free a span, which is always exactly one large page.
539  */
540 static void
541 contig_mem_span_free(vmem_t *vmp, void *inaddr, size_t size)
542 {
543 	page_t *pp;
544 	caddr_t addr = inaddr;
545 	caddr_t eaddr;
546 	pgcnt_t npages = btopr(size);
547 	page_t *rootpp = NULL;
548 
549 	ASSERT(size <= contig_mem_import_size_max);
550 	/* All slabs should be size aligned */
551 	ASSERT(((uintptr_t)addr & (size - 1)) == 0);
552 
553 	hat_unload(kas.a_hat, addr, size, HAT_UNLOAD_UNLOCK);
554 
555 	for (eaddr = addr + size; addr < eaddr; addr += PAGESIZE) {
556 		pp = page_find(&kvp, (u_offset_t)(uintptr_t)addr);
557 		if (pp == NULL) {
558 			panic("contig_mem_span_free: page not found");
559 		}
560 		if (!page_tryupgrade(pp)) {
561 			page_unlock(pp);
562 			pp = page_lookup(&kvp,
563 			    (u_offset_t)(uintptr_t)addr, SE_EXCL);
564 			if (pp == NULL)
565 				panic("contig_mem_span_free: page not found");
566 		}
567 
568 		ASSERT(PAGE_EXCL(pp));
569 		ASSERT(size == page_get_pagesize(pp->p_szc));
570 		ASSERT(rootpp == NULL || rootpp->p_szc == pp->p_szc);
571 		ASSERT(rootpp == NULL || (page_pptonum(rootpp) +
572 		    (pgcnt_t)btop(addr - (caddr_t)inaddr) == page_pptonum(pp)));
573 
574 		page_pp_unlock(pp, 0, 1);
575 
576 		if (rootpp == NULL)
577 			rootpp = pp;
578 	}
579 	page_destroy_pages(rootpp);
580 	page_unresv(npages);
581 
582 	if (vmp != NULL)
583 		vmem_xfree(vmp, inaddr, size);
584 }
585 
586 static void *
587 contig_vmem_xalloc_aligned_wrapper(vmem_t *vmp, size_t *sizep, size_t align,
588     int vmflag)
589 {
590 	ASSERT((align & (align - 1)) == 0);
591 	return (vmem_xalloc(vmp, *sizep, align, 0, 0, NULL, NULL, vmflag));
592 }
593 
594 /*
595  * contig_mem_alloc, contig_mem_alloc_align
596  *
597  * Caution: contig_mem_alloc and contig_mem_alloc_align should be
598  * used only when physically contiguous non-relocatable memory is
599  * required. Furthermore, use of these allocation routines should be
600  * minimized as well as should the allocation size. As described in the
601  * contig_mem_arena comment block above, slab allocations fall back to
602  * being outside of the cage. Therefore, overuse of these allocation
603  * routines can lead to non-relocatable large pages being allocated
604  * outside the cage. Such pages prevent the allocation of a larger page
605  * occupying overlapping pages. This can impact performance for
606  * applications that utilize e.g. 256M large pages.
607  */
608 
609 /*
610  * Allocates size aligned contiguous memory up to contig_mem_import_size_max.
611  * Size must be a power of 2.
612  */
613 void *
614 contig_mem_alloc(size_t size)
615 {
616 	ASSERT((size & (size - 1)) == 0);
617 	return (contig_mem_alloc_align(size, size));
618 }
619 
620 /*
621  * contig_mem_alloc_align allocates real contiguous memory with the specified
622  * alignment up to contig_mem_import_size_max. The alignment must be a
623  * power of 2 and no greater than contig_mem_import_size_max. We assert
624  * the aligment is a power of 2. For non-debug, vmem_xalloc will panic
625  * for non power of 2 alignments.
626  */
627 void *
628 contig_mem_alloc_align(size_t size, size_t align)
629 {
630 	void *buf;
631 
632 	ASSERT(size <= contig_mem_import_size_max);
633 	ASSERT(align <= contig_mem_import_size_max);
634 	ASSERT((align & (align - 1)) == 0);
635 
636 	if (align < CONTIG_MEM_ARENA_QUANTUM)
637 		align = CONTIG_MEM_ARENA_QUANTUM;
638 
639 	/*
640 	 * We take the lock here to serialize span allocations.
641 	 * We do not lose concurrency for the common case, since
642 	 * allocations that don't require new span allocations
643 	 * are serialized by vmem_xalloc. Serializing span
644 	 * allocations also prevents us from trying to allocate
645 	 * more spans that necessary.
646 	 */
647 	mutex_enter(&contig_mem_lock);
648 
649 	buf = vmem_xalloc(contig_mem_arena, size, align, 0, 0,
650 	    NULL, NULL, VM_NOSLEEP | VM_NORELOC);
651 
652 	if ((buf == NULL) && (size <= MMU_PAGESIZE)) {
653 		mutex_exit(&contig_mem_lock);
654 		return (vmem_xalloc(static_alloc_arena, size, align, 0, 0,
655 		    NULL, NULL, VM_NOSLEEP));
656 	}
657 
658 	if (buf == NULL) {
659 		buf = vmem_xalloc(contig_mem_reloc_arena, size, align, 0, 0,
660 		    NULL, NULL, VM_NOSLEEP);
661 	}
662 
663 	mutex_exit(&contig_mem_lock);
664 
665 	return (buf);
666 }
667 
668 void
669 contig_mem_free(void *vaddr, size_t size)
670 {
671 	if (vmem_contains(contig_mem_arena, vaddr, size)) {
672 		vmem_xfree(contig_mem_arena, vaddr, size);
673 	} else if (size > MMU_PAGESIZE) {
674 		vmem_xfree(contig_mem_reloc_arena, vaddr, size);
675 	} else {
676 		vmem_xfree(static_alloc_arena, vaddr, size);
677 	}
678 }
679 
680 /*
681  * We create a set of stacked vmem arenas to enable us to
682  * allocate large >PAGESIZE chucks of contiguous Real Address space.
683  * The vmem_xcreate interface is used to create the contig_mem_arena
684  * allowing the import routine to downsize the requested slab size
685  * and return a smaller slab.
686  */
687 void
688 contig_mem_init(void)
689 {
690 	mutex_init(&contig_mem_lock, NULL, MUTEX_DEFAULT, NULL);
691 
692 	contig_mem_slab_arena = vmem_xcreate("contig_mem_slab_arena", NULL, 0,
693 	    CONTIG_MEM_SLAB_ARENA_QUANTUM, contig_vmem_xalloc_aligned_wrapper,
694 	    vmem_xfree, heap_arena, 0, VM_SLEEP | VMC_XALIGN);
695 
696 	contig_mem_arena = vmem_xcreate("contig_mem_arena", NULL, 0,
697 	    CONTIG_MEM_ARENA_QUANTUM, contig_mem_span_xalloc,
698 	    contig_mem_span_free, contig_mem_slab_arena, 0,
699 	    VM_SLEEP | VM_BESTFIT | VMC_XALIGN);
700 
701 	contig_mem_reloc_arena = vmem_xcreate("contig_mem_reloc_arena", NULL, 0,
702 	    CONTIG_MEM_ARENA_QUANTUM, contig_mem_reloc_span_xalloc,
703 	    contig_mem_span_free, contig_mem_slab_arena, 0,
704 	    VM_SLEEP | VM_BESTFIT | VMC_XALIGN);
705 
706 	if (contig_mem_prealloc_buf == NULL || vmem_add(contig_mem_arena,
707 	    contig_mem_prealloc_buf, contig_mem_prealloc_size, VM_SLEEP)
708 	    == NULL) {
709 		cmn_err(CE_WARN, "Failed to pre-populate contig_mem_arena");
710 	}
711 }
712 
713 /*
714  * In calculating how much memory to pre-allocate, we include a small
715  * amount per-CPU to account for per-CPU buffers in line with measured
716  * values for different size systems. contig_mem_prealloc_base_size is
717  * a cpu specific amount to be pre-allocated before considering per-CPU
718  * requirements and memory size. We always pre-allocate a minimum amount
719  * of memory determined by PREALLOC_MIN. Beyond that, we take the minimum
720  * of contig_mem_prealloc_base_size and a small percentage of physical
721  * memory to prevent allocating too much on smaller systems.
722  * contig_mem_prealloc_base_size is global, allowing for the CPU module
723  * to increase its value if necessary.
724  */
725 #define	PREALLOC_PER_CPU	(256 * 1024)		/* 256K */
726 #define	PREALLOC_PERCENT	(4)			/* 4% */
727 #define	PREALLOC_MIN		(16 * 1024 * 1024)	/* 16M */
728 size_t contig_mem_prealloc_base_size = 0;
729 
730 /*
731  * Called at boot-time allowing pre-allocation of contiguous memory.
732  * The argument 'alloc_base' is the requested base address for the
733  * allocation and originates in startup_memlist.
734  */
735 caddr_t
736 contig_mem_prealloc(caddr_t alloc_base, pgcnt_t npages)
737 {
738 	caddr_t	chunkp;
739 
740 	contig_mem_prealloc_size = MIN((PREALLOC_PER_CPU * ncpu_guest_max) +
741 	    contig_mem_prealloc_base_size,
742 	    (ptob(npages) * PREALLOC_PERCENT) / 100);
743 	contig_mem_prealloc_size = MAX(contig_mem_prealloc_size, PREALLOC_MIN);
744 	contig_mem_prealloc_size = P2ROUNDUP(contig_mem_prealloc_size,
745 	    MMU_PAGESIZE4M);
746 
747 	alloc_base = (caddr_t)roundup((uintptr_t)alloc_base, MMU_PAGESIZE4M);
748 	if (prom_alloc(alloc_base, contig_mem_prealloc_size,
749 	    MMU_PAGESIZE4M) != alloc_base) {
750 
751 		/*
752 		 * Failed.  This may mean the physical memory has holes in it
753 		 * and it will be more difficult to get large contiguous
754 		 * pieces of memory.  Since we only guarantee contiguous
755 		 * pieces of memory contig_mem_import_size_max or smaller,
756 		 * loop, getting contig_mem_import_size_max at a time, until
757 		 * failure or contig_mem_prealloc_size is reached.
758 		 */
759 		for (chunkp = alloc_base;
760 		    (chunkp - alloc_base) < contig_mem_prealloc_size;
761 		    chunkp += contig_mem_import_size_max) {
762 
763 			if (prom_alloc(chunkp, contig_mem_import_size_max,
764 			    MMU_PAGESIZE4M) != chunkp) {
765 				break;
766 			}
767 		}
768 		contig_mem_prealloc_size = chunkp - alloc_base;
769 		ASSERT(contig_mem_prealloc_size != 0);
770 	}
771 
772 	if (contig_mem_prealloc_size != 0) {
773 		contig_mem_prealloc_buf = alloc_base;
774 	} else {
775 		contig_mem_prealloc_buf = NULL;
776 	}
777 	alloc_base += contig_mem_prealloc_size;
778 
779 	return (alloc_base);
780 }
781 
782 static uint_t sp_color_stride = 16;
783 static uint_t sp_color_mask = 0x1f;
784 static uint_t sp_current_color = (uint_t)-1;
785 
786 size_t
787 exec_get_spslew(void)
788 {
789 	uint_t spcolor = atomic_inc_32_nv(&sp_current_color);
790 	return ((size_t)((spcolor & sp_color_mask) * SA(sp_color_stride)));
791 }
792