xref: /titanic_51/usr/src/uts/sun4v/sys/cpu_module.h (revision 575a742678105d588b7c8e1653b57a7e3d78440b)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
51ae08745Sheppo  * Common Development and Distribution License (the "License").
61ae08745Sheppo  * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate  *
87c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate  * and limitations under the License.
127c478bd9Sstevel@tonic-gate  *
137c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate  *
197c478bd9Sstevel@tonic-gate  * CDDL HEADER END
207c478bd9Sstevel@tonic-gate  */
21459190a5Srsmaeda 
227c478bd9Sstevel@tonic-gate /*
23*575a7426Spt157919  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
247c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
257c478bd9Sstevel@tonic-gate  */
267c478bd9Sstevel@tonic-gate 
277c478bd9Sstevel@tonic-gate #ifndef _SYS_CPU_MODULE_H
287c478bd9Sstevel@tonic-gate #define	_SYS_CPU_MODULE_H
297c478bd9Sstevel@tonic-gate 
307c478bd9Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
317c478bd9Sstevel@tonic-gate 
327c478bd9Sstevel@tonic-gate #include <sys/pte.h>
337c478bd9Sstevel@tonic-gate #include <sys/async.h>
347c478bd9Sstevel@tonic-gate #include <sys/x_call.h>
357c478bd9Sstevel@tonic-gate #include <sys/conf.h>
367c478bd9Sstevel@tonic-gate #include <sys/obpdefs.h>
371a7b528fSjc25722 #include <sys/mdesc.h>
387c478bd9Sstevel@tonic-gate 
397c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
407c478bd9Sstevel@tonic-gate extern "C" {
417c478bd9Sstevel@tonic-gate #endif
427c478bd9Sstevel@tonic-gate 
437c478bd9Sstevel@tonic-gate 
447c478bd9Sstevel@tonic-gate #ifdef _KERNEL
457c478bd9Sstevel@tonic-gate 
467c478bd9Sstevel@tonic-gate /*
477c478bd9Sstevel@tonic-gate  * The are functions that are expected of the cpu modules.
487c478bd9Sstevel@tonic-gate  */
497c478bd9Sstevel@tonic-gate 
507c478bd9Sstevel@tonic-gate extern struct module_ops *moduleops;
517c478bd9Sstevel@tonic-gate 
527c478bd9Sstevel@tonic-gate struct kdi;
537c478bd9Sstevel@tonic-gate 
547c478bd9Sstevel@tonic-gate /*
557c478bd9Sstevel@tonic-gate  * module initialization
567c478bd9Sstevel@tonic-gate  */
577c478bd9Sstevel@tonic-gate void	cpu_setup(void);
587c478bd9Sstevel@tonic-gate 
597c478bd9Sstevel@tonic-gate /*
607c478bd9Sstevel@tonic-gate  * set CPU implementation details
617c478bd9Sstevel@tonic-gate  *
627c478bd9Sstevel@tonic-gate  * mmu_init_mmu_page_sizes changes the mmu_page_sizes variable from
637c478bd9Sstevel@tonic-gate  *	The default 4 page sizes to 6 page sizes for Panther-only domains,
647c478bd9Sstevel@tonic-gate  *	and is called from fillsysinfo.c:check_cpus_set at early bootup time.
657c478bd9Sstevel@tonic-gate  */
667c478bd9Sstevel@tonic-gate struct cpu_node;
677c478bd9Sstevel@tonic-gate void	cpu_fiximp(struct cpu_node *cpunode);
68459190a5Srsmaeda void	cpu_map_exec_units(struct cpu *cp);
697c478bd9Sstevel@tonic-gate #pragma weak mmu_init_mmu_page_sizes
707c478bd9Sstevel@tonic-gate int	mmu_init_mmu_page_sizes(int cinfo);
717c478bd9Sstevel@tonic-gate 
727c478bd9Sstevel@tonic-gate /*
737c478bd9Sstevel@tonic-gate  * virtual demap flushes (tlbs & virtual tag caches)
747c478bd9Sstevel@tonic-gate  */
751e2e7a75Shuah void	vtag_flushpage(caddr_t addr, uint64_t sfmmup);
767c478bd9Sstevel@tonic-gate void	vtag_flushall(void);
771e2e7a75Shuah #pragma weak vtag_flushall_uctxs
781e2e7a75Shuah void    vtag_flushall_uctxs(void);
791e2e7a75Shuah void	vtag_flushpage_tl1(uint64_t addr,  uint64_t sfmmup);
801e2e7a75Shuah void	vtag_flush_pgcnt_tl1(uint64_t addr, uint64_t sfmmup_pgcnt);
817c478bd9Sstevel@tonic-gate void	vtag_flushall_tl1(uint64_t dummy1, uint64_t dummy2);
827c478bd9Sstevel@tonic-gate void	vtag_unmap_perm_tl1(uint64_t addr, uint64_t ctx);
837c478bd9Sstevel@tonic-gate 
847c478bd9Sstevel@tonic-gate /*
85fedab560Sae112802  * Calculate, set optimal dtlb pagesize, for ISM and mpss, to support
86fedab560Sae112802  * cpus with non-fully-associative dtlbs.
877c478bd9Sstevel@tonic-gate  */
88fedab560Sae112802 extern uchar_t *ctx_pgsz_array;
897c478bd9Sstevel@tonic-gate 
907c478bd9Sstevel@tonic-gate /*
917c478bd9Sstevel@tonic-gate  * flush instruction cache if needed
927c478bd9Sstevel@tonic-gate  */
937c478bd9Sstevel@tonic-gate void	flush_instr_mem(caddr_t addr, size_t len);
947c478bd9Sstevel@tonic-gate 
957c478bd9Sstevel@tonic-gate /*
967c478bd9Sstevel@tonic-gate  * Cpu-specific error and ecache handling routines
977c478bd9Sstevel@tonic-gate  */
987c478bd9Sstevel@tonic-gate #pragma weak itlb_parity_trap
997c478bd9Sstevel@tonic-gate void itlb_parity_trap(void);
1007c478bd9Sstevel@tonic-gate 
1017c478bd9Sstevel@tonic-gate #pragma weak dtlb_parity_trap
1027c478bd9Sstevel@tonic-gate void dtlb_parity_trap(void);
1037c478bd9Sstevel@tonic-gate 
1047c478bd9Sstevel@tonic-gate /*
1057c478bd9Sstevel@tonic-gate  * this symbol appears as a second label for vtag_flushall
1067c478bd9Sstevel@tonic-gate  * only for cpus that implement DEMAP_ALL_TYPE
1077c478bd9Sstevel@tonic-gate  */
1087c478bd9Sstevel@tonic-gate #pragma	weak demap_all
1097c478bd9Sstevel@tonic-gate 
1107c478bd9Sstevel@tonic-gate /*
1117c478bd9Sstevel@tonic-gate  * change cpu speed
1127c478bd9Sstevel@tonic-gate  */
1137c478bd9Sstevel@tonic-gate void	cpu_change_speed(uint64_t divisor, uint64_t arg2);
1147c478bd9Sstevel@tonic-gate 
1157c478bd9Sstevel@tonic-gate /*
1167c478bd9Sstevel@tonic-gate  * flush routine
1177c478bd9Sstevel@tonic-gate  */
1187c478bd9Sstevel@tonic-gate #pragma weak dtrace_flush_sec
1197c478bd9Sstevel@tonic-gate void	dtrace_flush_sec(uintptr_t);
1207c478bd9Sstevel@tonic-gate 
1217c478bd9Sstevel@tonic-gate /*
1227c478bd9Sstevel@tonic-gate  * Cpu private initialize/uninitialize, including ecache scrubber.
1237c478bd9Sstevel@tonic-gate  */
1247c478bd9Sstevel@tonic-gate void	cpu_init_private(struct cpu *);
1257c478bd9Sstevel@tonic-gate void	cpu_uninit_private(struct cpu *);
1267c478bd9Sstevel@tonic-gate 
1277c478bd9Sstevel@tonic-gate #pragma weak cpu_mp_init
1287c478bd9Sstevel@tonic-gate void    cpu_mp_init(void);
1297c478bd9Sstevel@tonic-gate 
1307c478bd9Sstevel@tonic-gate #pragma weak cpu_feature_init
1317c478bd9Sstevel@tonic-gate void    cpu_feature_init(void);
1327c478bd9Sstevel@tonic-gate 
1337c478bd9Sstevel@tonic-gate #pragma weak cpu_error_init
1347c478bd9Sstevel@tonic-gate void	cpu_error_init(int);
1357c478bd9Sstevel@tonic-gate 
1367c478bd9Sstevel@tonic-gate extern int kzero(void *addr, size_t count);
1377c478bd9Sstevel@tonic-gate extern void uzero(void *addr, size_t count);
1387c478bd9Sstevel@tonic-gate extern void bzero(void *addr, size_t count);
1397c478bd9Sstevel@tonic-gate 
140ce0352ebSgirish /*
141ce0352ebSgirish  * trapstat interface and cpu_trapstat_conf commands
142ce0352ebSgirish  */
143ce0352ebSgirish #define	CPU_TSTATCONF_INIT	1
144ce0352ebSgirish #define	CPU_TSTATCONF_FINI	2
145ce0352ebSgirish #define	CPU_TSTATCONF_ENABLE	3
146ce0352ebSgirish #define	CPU_TSTATCONF_DISABLE	4
147ce0352ebSgirish 
148ce0352ebSgirish int	cpu_trapstat_conf(int cmd);
149ce0352ebSgirish void	cpu_trapstat_data(void *buf, uint_t pgszs);
150ce8eb11aSdp78419 /* Used  by the fill_cpu() function */
15159ac0c16Sdavemq #define	NO_MAPPING_FOUND		0xffffffff
15259ac0c16Sdavemq #define	NO_EU_MAPPING_FOUND		NO_MAPPING_FOUND
15359ac0c16Sdavemq #define	NO_CHIP_MAPPING_FOUND		NO_MAPPING_FOUND
15459ac0c16Sdavemq #define	NO_CORE_MAPPING_FOUND		NO_MAPPING_FOUND
155ce8eb11aSdp78419 #define	NO_L2_CACHE_MAPPING_FOUND	NO_MAPPING_FOUND
1561ae08745Sheppo /*
1571ae08745Sheppo  * Default MMU pagesize mask for sun4v architecture.
1581ae08745Sheppo  */
1591ae08745Sheppo #define	DEFAULT_SUN4V_MMU_PAGESIZE_MASK	((1 << TTE8K) | (1 << TTE64K) \
1601ae08745Sheppo 					    | (1 << TTE4M))
1611ae08745Sheppo 
1621ae08745Sheppo void	cpu_setup_common(char **);
163*575a7426Spt157919 int	l2_cache_node_count(void);
164*575a7426Spt157919 
1651a7b528fSjc25722 void	fill_cpu(md_t *, mde_cookie_t);
1661a7b528fSjc25722 int	setup_cpu_common(int);
1671a7b528fSjc25722 int	cleanup_cpu_common(int);
1681a7b528fSjc25722 void	setup_exec_unit_mappings(md_t *);
1691a7b528fSjc25722 void	setup_chip_mappings(md_t *);
1701ae08745Sheppo 
1711ae08745Sheppo boolean_t	broken_md_flag;
1721ae08745Sheppo int	va_bits;
1731ae08745Sheppo 
1747c478bd9Sstevel@tonic-gate #endif /* _KERNEL */
1757c478bd9Sstevel@tonic-gate 
1767c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
1777c478bd9Sstevel@tonic-gate }
1787c478bd9Sstevel@tonic-gate #endif
1797c478bd9Sstevel@tonic-gate 
1807c478bd9Sstevel@tonic-gate #endif /* _SYS_CPU_MODULE_H */
181