xref: /titanic_51/usr/src/uts/sun4v/montoya/os/montoya.c (revision fd845fc0cb4fbc8e85f974e2e4eaacca1cc26e81)
1*fd845fc0Sks34972 /*
2*fd845fc0Sks34972  * CDDL HEADER START
3*fd845fc0Sks34972  *
4*fd845fc0Sks34972  * The contents of this file are subject to the terms of the
5*fd845fc0Sks34972  * Common Development and Distribution License (the "License").
6*fd845fc0Sks34972  * You may not use this file except in compliance with the License.
7*fd845fc0Sks34972  *
8*fd845fc0Sks34972  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*fd845fc0Sks34972  * or http://www.opensolaris.org/os/licensing.
10*fd845fc0Sks34972  * See the License for the specific language governing permissions
11*fd845fc0Sks34972  * and limitations under the License.
12*fd845fc0Sks34972  *
13*fd845fc0Sks34972  * When distributing Covered Code, include this CDDL HEADER in each
14*fd845fc0Sks34972  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*fd845fc0Sks34972  * If applicable, add the following below this CDDL HEADER, with the
16*fd845fc0Sks34972  * fields enclosed by brackets "[]" replaced with your own identifying
17*fd845fc0Sks34972  * information: Portions Copyright [yyyy] [name of copyright owner]
18*fd845fc0Sks34972  *
19*fd845fc0Sks34972  * CDDL HEADER END
20*fd845fc0Sks34972  */
21*fd845fc0Sks34972 
22*fd845fc0Sks34972 /*
23*fd845fc0Sks34972  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24*fd845fc0Sks34972  * Use is subject to license terms.
25*fd845fc0Sks34972  */
26*fd845fc0Sks34972 
27*fd845fc0Sks34972 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28*fd845fc0Sks34972 
29*fd845fc0Sks34972 #include <sys/param.h>
30*fd845fc0Sks34972 #include <sys/systm.h>
31*fd845fc0Sks34972 #include <sys/sysmacros.h>
32*fd845fc0Sks34972 #include <sys/sunddi.h>
33*fd845fc0Sks34972 #include <sys/esunddi.h>
34*fd845fc0Sks34972 #include <sys/sunndi.h>
35*fd845fc0Sks34972 #include <sys/platform_module.h>
36*fd845fc0Sks34972 #include <sys/errno.h>
37*fd845fc0Sks34972 #include <sys/utsname.h>
38*fd845fc0Sks34972 #include <sys/modctl.h>
39*fd845fc0Sks34972 #include <sys/systeminfo.h>
40*fd845fc0Sks34972 #include <sys/promif.h>
41*fd845fc0Sks34972 #include <sys/bootconf.h>
42*fd845fc0Sks34972 
43*fd845fc0Sks34972 
44*fd845fc0Sks34972 
45*fd845fc0Sks34972 /*
46*fd845fc0Sks34972  * Platform power management drivers list - empty by default
47*fd845fc0Sks34972  */
48*fd845fc0Sks34972 char *platform_module_list[] = {
49*fd845fc0Sks34972 	(char *)0
50*fd845fc0Sks34972 };
51*fd845fc0Sks34972 
52*fd845fc0Sks34972 
53*fd845fc0Sks34972 /*ARGSUSED*/
54*fd845fc0Sks34972 void
55*fd845fc0Sks34972 plat_tod_fault(enum tod_fault_type tod_bad)
56*fd845fc0Sks34972 {
57*fd845fc0Sks34972 }
58*fd845fc0Sks34972 
59*fd845fc0Sks34972 void
60*fd845fc0Sks34972 load_platform_drivers(void)
61*fd845fc0Sks34972 {
62*fd845fc0Sks34972 }
63*fd845fc0Sks34972 
64*fd845fc0Sks34972 /*
65*fd845fc0Sks34972  * This routine provides a workaround for a bug in the SB chip which
66*fd845fc0Sks34972  * can cause data corruption. Will be invoked from the IDE HBA driver for
67*fd845fc0Sks34972  * Acer SouthBridge at the time of IDE bus reset.
68*fd845fc0Sks34972  */
69*fd845fc0Sks34972 /*ARGSUSED*/
70*fd845fc0Sks34972 int
71*fd845fc0Sks34972 plat_ide_chipreset(dev_info_t *dip, int chno)
72*fd845fc0Sks34972 {
73*fd845fc0Sks34972 	return	(DDI_SUCCESS);
74*fd845fc0Sks34972 }
75