1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PLAT_ECC_NUM_H 28 #define _SYS_PLAT_ECC_NUM_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #include <sys/int_types.h> 37 #include <sys/cheetahregs.h> 38 #include <sys/cpuvar.h> 39 #include <sys/dditypes.h> 40 #include <sys/ddipropdefs.h> 41 #include <sys/ddi_impldefs.h> 42 #include <sys/sunddi.h> 43 #include <sys/platform_module.h> 44 #include <sys/errno.h> 45 #include <sys/conf.h> 46 #include <sys/cmn_err.h> 47 #include <sys/sysmacros.h> 48 49 50 /* 51 * This file contains the common definitions used by the platform 52 * unum ecc logging. 53 */ 54 55 typedef enum { 56 PLAT_ECC_ERROR_MESSAGE, 57 PLAT_ECC_INDICTMENT_MESSAGE, 58 PLAT_ECC_ERROR2_MESSAGE, 59 PLAT_ECC_INDICTMENT2_MESSAGE, 60 PLAT_ECC_CAPABILITY_MESSAGE 61 } plat_ecc_message_type_t; 62 63 /* Platform-specific function for sending mailbox message */ 64 extern int plat_send_ecc_mailbox_msg(plat_ecc_message_type_t, void *); 65 66 /* For figuring out unique CPU id */ 67 extern int plat_make_fru_cpuid(int, int, int); 68 69 /* For figuring out board number for given CPU id */ 70 extern int plat_make_fru_boardnum(int); 71 72 /* For initializing the taskqs */ 73 extern void plat_ecc_init(void); 74 75 /* For setting the capability value */ 76 extern void plat_ecc_capability_sc_set(uint32_t cap); 77 78 /* For sending a capability message to the SC */ 79 extern int plat_ecc_capability_send(void); 80 81 /* 82 * The following variables enable and disable the fruid message logging on SC. 83 * ecc_log_fruid_enable can be set in /etc/system or via mdb. A value 84 * of 1 is default, and indicates the messages are sent. A value of 0 85 * indicates that the messages are not sent. 86 */ 87 extern int ecc_log_fruid_enable; 88 89 #define ECC_FRUID_ENABLE_DEFAULT 1 90 91 #define PLAT_ECC_JNUMBER_LENGTH 60 92 typedef struct plat_ecc_error_data { 93 uint8_t version; /* Starting with 1 */ 94 uint8_t error_code; /* Error Code */ 95 uint16_t proc_num; /* Processor Number of */ 96 /* CPU in error */ 97 uint8_t bank_no; /* 0 or 1 */ 98 uint8_t ecache_dimm_no; /* 0 to 3 */ 99 uint8_t error_type; /* single, two, three, quad */ 100 /* or multiple bit error status */ 101 uint8_t databit_type; /* Identify the databit type: */ 102 /* MTAG, ECC, MTAGECC or Data */ 103 uint8_t databit_no; /* Failed Databit number */ 104 uint8_t node_no; /* Wildcat node number */ 105 uint16_t detecting_proc; /* Processor detecting the ECC error */ 106 char Jnumber[60]; /* Jnumber of the Dimm or Ecache */ 107 } plat_ecc_error_data_t; 108 109 #define PLAT_ECC_VERSION 2 110 #define PLAT_ERROR_CODE_UNK 0x0 /* Unknown */ 111 #define PLAT_ERROR_CODE_CE 0x1 /* Correctable ECC error */ 112 #define PLAT_ERROR_CODE_UE 0x2 /* Uncorrectable ECC error */ 113 #define PLAT_ERROR_CODE_EDC 0x3 /* Correctable ECC error from E$ */ 114 #define PLAT_ERROR_CODE_EDU 0x4 /* Uncorrectable ECC error from E$ */ 115 #define PLAT_ERROR_CODE_WDC 0x5 /* Correctable E$ write-back ECC */ 116 #define PLAT_ERROR_CODE_WDU 0x6 /* Uncorrectable E$ write-back ECC */ 117 #define PLAT_ERROR_CODE_CPC 0x7 /* Copy-out correctable ECC error */ 118 #define PLAT_ERROR_CODE_CPU 0x8 /* Copy-out uncorrectable ECC error */ 119 #define PLAT_ERROR_CODE_UCC 0x9 /* SW handled correctable ECC */ 120 #define PLAT_ERROR_CODE_UCU 0xa /* SW handled uncorrectable ECC */ 121 #define PLAT_ERROR_CODE_EMC 0xb /* Correctable MTAG ECC error */ 122 #define PLAT_ERROR_CODE_EMU 0xc /* Uncorrectable MTAG ECC error */ 123 124 #define PLAT_ERROR_TYPE_UNK 0x0 /* Unknown */ 125 #define PLAT_ERROR_TYPE_SINGLE 0x1 /* Single bit error */ 126 #define PLAT_ERROR_TYPE_M2 0x2 /* Double bit error */ 127 #define PLAT_ERROR_TYPE_M3 0x3 /* Triple bit error */ 128 #define PLAT_ERROR_TYPE_M4 0x4 /* Quad bit error */ 129 #define PLAT_ERROR_TYPE_M 0x5 /* Multiple bit error */ 130 131 #define PLAT_BIT_TYPE_MULTI 0x0 /* Error is 2 or more bits */ 132 #define PLAT_BIT_TYPE_MTAG_D 0x1 /* MTAG data error */ 133 #define PLAT_BIT_TYPE_MTAG_E 0x2 /* MTAG ECC error */ 134 #define PLAT_BIT_TYPE_ECC 0x3 /* ECC error */ 135 #define PLAT_BIT_TYPE_DATA 0x4 /* Data error */ 136 137 /* 138 * Based on "UltraSPARC-III Programmer's Reference Manual", these values are 139 * obtained when you use the syndrom bits from the AFSR to index into the 140 * ECC syndroms table. See cheetah.c for more details on the definitions 141 * of C0, C1, C2, ... C8, MT0, MT1, ... M3, M4 ... etc. 142 */ 143 144 #define ECC_SYND_DATA_BEGIN 0 145 #define ECC_SYND_DATA_LENGTH 127 /* data bits 0-127 */ 146 #define ECC_SYND_ECC_BEGIN (ECC_SYND_DATA_BEGIN + ECC_SYND_DATA_LENGTH) 147 #define ECC_SYND_ECC_LENGTH 9 /* ECC bits C0 - C* */ 148 #define ECC_SYND_MTAG_BEGIN (ECC_SYND_ECC_BEGIN + ECC_SYND_ECC_LENGTH) 149 #define ECC_SYND_MTAG_LENGTH 3 /* MTAG DATA bits MT0, MT1, MT3 */ 150 #define ECC_SYND_MECC_BEGIN (ECC_SYND_MTAG_BEGIN + ECC_SYND_MTAG_LENGTH) 151 #define ECC_SYND_MECC_LENGTH 4 /* MTAG ECC bits MTC0 - MTC3 */ 152 #define ECC_SYND_M2 144 153 #define ECC_SYND_M3 145 154 #define ECC_SYND_M4 146 155 #define ECC_SYND_M 147 156 157 enum plat_ecc_type {PLAT_ECC_UNKNOWN, PLAT_ECC_MEMORY, PLAT_ECC_ECACHE }; 158 159 typedef struct plat_ecc_msg_hdr { 160 uint8_t emh_major_ver; 161 uint8_t emh_minor_ver; 162 uint16_t emh_msg_type; 163 uint16_t emh_msg_length; 164 uint16_t emh_future0; /* pad */ 165 } plat_ecc_msg_hdr_t; 166 167 extern uint16_t ecc_error2_mailbox_flags; 168 169 #define PLAT_ECC_ERROR2_SEND_L2_XXC 0x0001 170 #define PLAT_ECC_ERROR2_SEND_L2_XXU 0x0002 171 #define PLAT_ECC_ERROR2_SEND_L3_XXC 0x0004 172 #define PLAT_ECC_ERROR2_SEND_L3_XXU 0x0008 173 #define PLAT_ECC_ERROR2_SEND_MEM_ERRS 0x0010 174 #define PLAT_ECC_ERROR2_SEND_BUS_ERRS 0x0020 175 #define PLAT_ECC_ERROR2_SEND_L2_TAG_ERRS 0x0040 176 #define PLAT_ECC_ERROR2_SEND_L3_TAG_ERRS 0x0080 177 #define PLAT_ECC_ERROR2_SEND_L1_PARITY 0x0100 178 #define PLAT_ECC_ERROR2_SEND_TLB_PARITY 0x0200 179 #define PLAT_ECC_ERROR2_SEND_IV_ERRS 0x0400 180 #define PLAT_ECC_ERROR2_SEND_MTAG_XXC 0x0800 181 #define PLAT_ECC_ERROR2_SEND_IV_MTAG_XXC 0x1000 182 #define PLAT_ECC_ERROR2_SEND_PCACHE 0x2000 183 184 /* default value for ecc_error2_mailbox_flags */ 185 #define PLAT_ECC_ERROR2_SEND_DEFAULT 0x3fff 186 187 typedef struct plat_ecc_error2_data { 188 plat_ecc_msg_hdr_t ee2d_header; /* Header info */ 189 uint8_t ee2d_type; /* PLAT_ECC_ERROR2_* */ 190 uint8_t ee2d_afar_status; /* AFLT_STAT_* (see async.h) */ 191 uint8_t ee2d_synd_status; /* AFLT_STAT_* (see async.h) */ 192 uint8_t ee2d_bank_number; /* 0 or 1 */ 193 uint16_t ee2d_detecting_proc; /* Proc that detected error */ 194 uint16_t ee2d_jnumber; /* J# of the part in error */ 195 uint16_t ee2d_owning_proc; /* Proc that controls memory */ 196 uint16_t ee2d_future1; /* pad */ 197 uint32_t ee2d_cpu_impl; /* Proc type */ 198 uint64_t ee2d_afsr; /* AFSR */ 199 uint64_t ee2d_sdw_afsr; /* Shadow AFSR */ 200 uint64_t ee2d_afsr_ext; /* Extended AFSR */ 201 uint64_t ee2d_sdw_afsr_ext; /* Shadow extended AFSR */ 202 uint64_t ee2d_afar; /* AFAR */ 203 uint64_t ee2d_sdw_afar; /* Shadow AFAR */ 204 uint64_t ee2d_timestamp; /* Time stamp */ 205 } plat_ecc_error2_data_t; 206 207 #define ee2d_major_version ee2d_header.emh_major_ver 208 #define ee2d_minor_version ee2d_header.emh_minor_ver 209 #define ee2d_msg_type ee2d_header.emh_msg_type 210 #define ee2d_msg_length ee2d_header.emh_msg_length 211 212 #define PLAT_ECC_ERROR2_VERSION_MAJOR 1 213 #define PLAT_ECC_ERROR2_VERSION_MINOR 1 214 215 /* Values for ee2d_type */ 216 #define PLAT_ECC_ERROR2_NONE 0x00 217 #define PLAT_ECC_ERROR2_L2_CE 0x01 218 #define PLAT_ECC_ERROR2_L2_UE 0x02 219 #define PLAT_ECC_ERROR2_L3_CE 0x03 220 #define PLAT_ECC_ERROR2_L3_UE 0x04 221 #define PLAT_ECC_ERROR2_CE 0x05 222 #define PLAT_ECC_ERROR2_UE 0x06 223 #define PLAT_ECC_ERROR2_DUE 0x07 224 #define PLAT_ECC_ERROR2_TO 0x08 225 #define PLAT_ECC_ERROR2_BERR 0x09 226 #define PLAT_ECC_ERROR2_DTO 0x0a 227 #define PLAT_ECC_ERROR2_DBERR 0x0b 228 #define PLAT_ECC_ERROR2_L2_TSCE 0x0c 229 #define PLAT_ECC_ERROR2_L2_THCE 0x0d 230 #define PLAT_ECC_ERROR2_L3_TSCE 0x0e /* Unused */ 231 #define PLAT_ECC_ERROR2_L3_THCE 0x0f 232 #define PLAT_ECC_ERROR2_DPE 0x10 233 #define PLAT_ECC_ERROR2_IPE 0x11 234 #define PLAT_ECC_ERROR2_ITLB 0x12 235 #define PLAT_ECC_ERROR2_DTLB 0x13 236 #define PLAT_ECC_ERROR2_IVU 0x14 237 #define PLAT_ECC_ERROR2_IVC 0x15 238 #define PLAT_ECC_ERROR2_EMC 0x16 239 #define PLAT_ECC_ERROR2_IMC 0x17 240 #define PLAT_ECC_ERROR2_L3_MECC 0x18 241 #define PLAT_ECC_ERROR2_PCACHE 0x19 242 243 #define PLAT_ECC_ERROR2_NUMVALS 0x1a 244 245 typedef struct plat_ecc_ch_async_flt { 246 int ecaf_synd_status; /* AFLT_STAT_* (see async.h) */ 247 int ecaf_afar_status; /* AFLT_STAT_* (see async.h) */ 248 uint64_t ecaf_sdw_afar; 249 uint64_t ecaf_sdw_afsr; 250 uint64_t ecaf_afsr_ext; 251 uint64_t ecaf_sdw_afsr_ext; 252 } plat_ecc_ch_async_flt_t; 253 254 /* 255 * The following structures/#defines are used to notify the SC 256 * of DIMMs that fail the leaky bucket algorithm, E$ that experience 257 * multiple correctable errors and fail the serd algorithm, and 258 * E$ that experience any non-fatal uncorrectable error. 259 */ 260 261 extern uint8_t ecc_indictment_mailbox_disable; 262 263 /* The message is OK */ 264 #define PLAT_ECC_INDICTMENT_OK 0x00 265 266 /* Send the message, but don't trust it */ 267 #define PLAT_ECC_INDICTMENT_SUSPECT 0x01 268 269 /* Don't send message */ 270 #define PLAT_ECC_INDICTMENT_NO_SEND 0x02 271 272 extern uint8_t ecc_indictment_mailbox_flags; 273 274 /* DIMM indictments for CEs */ 275 #define PLAT_ECC_SEND_DIMM_INDICT 0x01 276 277 /* E$ indictments for UCC, WDC, CPC, EDC */ 278 #define PLAT_ECC_SEND_ECACHE_XXC_INDICT 0x02 279 280 /* E$ indictments for UCU, WDU, CPU, EDU */ 281 #define PLAT_ECC_SEND_ECACHE_XXU_INDICT 0x04 282 283 /* Default value for ecc_indictment_mailbox_flags */ 284 #define PLAT_ECC_SEND_DEFAULT_INDICT (PLAT_ECC_SEND_ECACHE_XXC_INDICT |\ 285 PLAT_ECC_SEND_ECACHE_XXU_INDICT) 286 287 /* 288 * WARNING: The plat_ecc_indictment_data_t struct size can be no bigger than 289 * 128 bytes. The union will fill out the structure to the correct size - 290 * the string space used in solaris_version will fill out the rest of the 291 * structure. 292 * 293 * Any changes made to this structure in the future should ensure that the 294 * structure does not go over 128 bytes. 295 */ 296 297 #define PLAT_ECC_INDICT_SIZE 128 298 299 typedef struct { 300 uint8_t version; /* Starting with 1 */ 301 uint8_t indictment_type; /* see below for values */ 302 uint8_t indictment_uncertain; 303 /* Value of ecc_indictment_mailbox_disable */ 304 uint8_t board_num; /* board number of dimm/E$ */ 305 uint16_t detecting_proc; /* Processor Number of CPU */ 306 /* reporting error */ 307 uint16_t syndrome; /* syndrome of last error */ 308 uint16_t jnumber; /* Jnumber of dimm/E$ */ 309 uint16_t future[7]; /* For future use */ 310 uint64_t afsr; /* AFSR of last error */ 311 uint64_t afar; /* AFAR of last error */ 312 char solaris_version[1]; 313 /* Solaris version string */ 314 } plat_ecc_indict_msg_contents_t; 315 316 typedef union { 317 plat_ecc_indict_msg_contents_t msg_contents; 318 uint8_t filler[PLAT_ECC_INDICT_SIZE]; 319 } plat_ecc_indictment_data_t; 320 321 #define PLAT_ECC_VERSION_LENGTH (PLAT_ECC_INDICT_SIZE - \ 322 offsetof(plat_ecc_indict_msg_contents_t, solaris_version)) 323 324 #define PLAT_ECC_INDICTMENT_VERSION 1 325 326 /* 327 * Values for indictment_type. For Panther, E$ refers to 328 * the L3$. For previous procs, E$ refers to the L2$. 329 */ 330 #define PLAT_ECC_INDICT_NONE 0x00 331 #define PLAT_ECC_INDICT_DIMM 0x01 332 #define PLAT_ECC_INDICT_ECACHE_CORRECTABLES 0x02 333 #define PLAT_ECC_INDICT_ECACHE_UNCORRECTABLE 0x03 334 335 336 /* 337 * These values are used to set the state of msg_status 338 * 339 * 0 - No message in transit 340 * 1 - taskq thread dispatched, dispatching thread waiting for signal 341 * 2 - dispatched thread completed sending message 342 * 3 - dispatching thread received interrupt, not waiting for signal 343 */ 344 #define PLAT_ECC_NO_MSG_ACTIVE 0 345 #define PLAT_ECC_TASK_DISPATCHED 1 346 #define PLAT_ECC_MSG_SENT 2 347 #define PLAT_ECC_INTERRUPT_RECEIVED 3 348 349 /* 350 * Min and max sizes of plat_ecc_taskq 351 */ 352 #define PLAT_ECC_TASKQ_MIN 2 353 #define PLAT_ECC_TASKQ_MAX 8 354 355 extern uint16_t ecc_indictment2_mailbox_flags; 356 357 358 #define PLAT_ECC_SEND_INDICT2_L2_XXU 0x0001 359 #define PLAT_ECC_SEND_INDICT2_L2_XXC_SERD 0x0002 360 #define PLAT_ECC_SEND_INDICT2_L2_TAG_SERD 0x0004 361 #define PLAT_ECC_SEND_INDICT2_L3_XXU 0x0008 362 #define PLAT_ECC_SEND_INDICT2_L3_XXC_SERD 0x0010 363 #define PLAT_ECC_SEND_INDICT2_L3_TAG_SERD 0x0020 364 #define PLAT_ECC_SEND_INDICT2_L1_SERD 0x0040 365 #define PLAT_ECC_SEND_INDICT2_TLB_SERD 0x0080 366 #define PLAT_ECC_SEND_INDICT2_FPU 0x0100 367 #define PLAT_ECC_SEND_INDICT2_PCACHE_SERD 0x0200 368 369 #define PLAT_ECC_SEND_INDICT2_DEFAULT 0x03ff 370 371 typedef struct plat_ecc_indictment2_data { 372 plat_ecc_msg_hdr_t ei2d_header; /* Header info */ 373 uint8_t ei2d_type; /* PLAT_ECC_INDICT2_* */ 374 uint8_t ei2d_uncertain; /* See indictment_uncertain */ 375 uint8_t ei2d_board_num; /* Board number of dimm */ 376 uint8_t ei2d_future1; /* pad */ 377 uint16_t ei2d_arraigned_proc; /* Proc number */ 378 uint16_t ei2d_jnumber; /* Jnumber */ 379 uint32_t ei2d_cpu_impl; /* Proc type */ 380 uint32_t ei2d_future2; /* pad */ 381 uint64_t ei2d_timestamp; /* Time stamp */ 382 } plat_ecc_indictment2_data_t; 383 384 #define ei2d_major_version ei2d_header.emh_major_ver 385 #define ei2d_minor_version ei2d_header.emh_minor_ver 386 #define ei2d_msg_type ei2d_header.emh_msg_type 387 #define ei2d_msg_length ei2d_header.emh_msg_length 388 389 #define PLAT_ECC_INDICT2_MAJOR_VERSION 1 390 #define PLAT_ECC_INDICT2_MINOR_VERSION 1 391 392 /* 393 * Values for ei2d_type 394 */ 395 396 #define PLAT_ECC_INDICT2_NONE 0x00 397 #define PLAT_ECC_INDICT2_L2_UE 0x01 398 #define PLAT_ECC_INDICT2_L2_SERD 0x02 399 #define PLAT_ECC_INDICT2_L2_TAG_SERD 0x03 400 #define PLAT_ECC_INDICT2_L3_UE 0x04 401 #define PLAT_ECC_INDICT2_L3_SERD 0x05 402 #define PLAT_ECC_INDICT2_L3_TAG_SERD 0x06 403 #define PLAT_ECC_INDICT2_DCACHE_SERD 0x07 404 #define PLAT_ECC_INDICT2_ICACHE_SERD 0x08 405 #define PLAT_ECC_INDICT2_ITLB_SERD 0x09 406 #define PLAT_ECC_INDICT2_DTLB_SERD 0x0a 407 #define PLAT_ECC_INDICT2_FPU 0x0b 408 #define PLAT_ECC_INDICT2_PCACHE_SERD 0x0c 409 410 #define PLAT_ECC_INDICT2_NUMVALS 0x0d 411 412 /* 413 * The following structure maps the indictment reason to its 414 * corresponding type. 415 */ 416 typedef struct plat_ecc_bl_map { 417 char *ebm_reason; /* Indictment reason */ 418 int ebm_type; /* Indictment type */ 419 } plat_ecc_bl_map_t; 420 421 /* 422 * This message is used to exchange the capability of the SC and Domain 423 * so that both entities can adjust their behavior as appropriate. 424 * Also the Solaris version is sent from the Domain along with the 425 * capability bitmap. 426 */ 427 typedef struct plat_capability_data { 428 plat_ecc_msg_hdr_t capd_header; /* Header info */ 429 uint32_t capd_capability; /* Capability bitmap */ 430 uint32_t capd_future1; /* pad */ 431 uint64_t capd_future2; /* pad */ 432 char capd_solaris_version[1]; 433 /* Solaris version string ptr */ 434 } plat_capability_data_t; 435 436 #define capd_major_version capd_header.emh_major_ver 437 #define capd_minor_version capd_header.emh_minor_ver 438 #define capd_msg_type capd_header.emh_msg_type 439 #define capd_msg_length capd_header.emh_msg_length 440 441 #define PLAT_ECC_CAP_VERSION_MAJOR 1 442 #define PLAT_ECC_CAP_VERSION_MINOR 1 443 444 #define PLAT_ECC_CAPABILITY_ERROR 0x01 445 #define PLAT_ECC_CAPABILITY_INDICT 0x02 446 #define PLAT_ECC_CAPABILITY_ERROR2 0x04 447 #define PLAT_ECC_CAPABILITY_INDICT2 0x08 448 #define PLAT_ECC_CAPABILITY_FMA 0x10 449 #define PLAT_ECC_CAPABILITY_EREPORTS 0x20 450 451 #define PLAT_ECC_CAPABILITY_DOMAIN_DEFAULT 0x1f 452 #define PLAT_ECC_CAPABILITY_SC_DEFAULT 0x03 453 454 extern uint32_t plat_ecc_capability_map_domain; 455 extern uint32_t plat_ecc_capability_map_sc; 456 457 /* 458 * The following structure is a wrapper around the all messages. The 459 * extra members are used for communicating between two threads. 460 */ 461 typedef struct plat_ecc_message { 462 plat_ecc_message_type_t ecc_msg_type; 463 uint32_t ecc_msg_status; 464 uint32_t ecc_msg_ret; 465 uint32_t ecc_msg_len; 466 void * ecc_msg_data; 467 } plat_ecc_message_t; 468 469 #ifdef __cplusplus 470 } 471 #endif 472 473 #endif /* _SYS_PLAT_ECC_NUM_H */ 474