1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_MC_US3_H 28 #define _SYS_MC_US3_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #if defined(_KERNEL) 37 38 #define NBANKS 4 39 #define NDGRPS 2 40 #define NDIMMS 4 41 #define MAX_DEVLEN 8 42 #define TRANSFER_SIZE 64 43 44 #ifndef _ASM 45 46 struct mc_soft_state { 47 dev_info_t *dip; /* dev info of myself */ 48 int portid; 49 int size; 50 void *memlayoutp; 51 volatile uchar_t *mc_base; /* Mapped base address of MC registers */ 52 }; 53 54 struct dimm_info { 55 char label[NDGRPS * NDIMMS][MAX_DEVLEN]; /* dimm lable */ 56 char sym_flag; /* 1: symmetric 0: asymmetric */ 57 char data[1]; 58 }; 59 60 struct pin_info { 61 uchar_t dimmtable[144]; 62 uchar_t pintable[576]; 63 }; 64 65 /* This struct is included at the following structs to set up list */ 66 typedef struct mc_dlist { 67 struct mc_dlist *next; 68 struct mc_dlist *prev; 69 int id; 70 } mc_dlist_t; 71 72 /* unique segment id */ 73 struct seg_info { 74 mc_dlist_t seg_node; 75 int nbanks; /* The number of banks at this segment */ 76 uint32_t ifactor; /* Max interleave factor at this segment */ 77 uint64_t base; 78 uint64_t size; /* memory size per segment */ 79 struct bank_info *hb_inseg; /* first bank at this segment */ 80 struct bank_info *tb_inseg; /* last bank at this segment */ 81 }; 82 83 /* id = mc_id * nbanks + bank_no */ 84 struct bank_info { 85 mc_dlist_t bank_node; 86 int local_id; /* unique local bank id per segment */ 87 int seg_id; /* unique segment id */ 88 int devgrp_id; /* unique device group id */ 89 ushort_t valid; /* valid flag per logic bank */ 90 ushort_t uk; /* Upper Mask field to mask match 4 PA[37:26] */ 91 uint_t um; /* Upper Match field to match PA[42:26] */ 92 uchar_t lk; /* Lower Mask field to mask match 4 PA[9:6] */ 93 uchar_t lm; /* Lower Match field to match PA[9:6] */ 94 uint64_t size; /* memory size per logical bank */ 95 struct bank_info *n_inseg; /* next bank at the same segment */ 96 struct bank_info *p_inseg; /* previous bank at the same segment */ 97 struct dimm_info *dimminfop; 98 }; 99 100 /* id = mc_id * ndevgrps + devgrp_no */ 101 struct dgrp_info { 102 mc_dlist_t dgrp_node; 103 int ndevices; /* The number of available devices on this dev group */ 104 uint64_t size; /* memory size per physical dimm group */ 105 int deviceids[NDIMMS]; /* 4 dimms per group on excalibur */ 106 }; 107 108 /* id = id of dgrp_info * ndevices + device_no */ 109 struct device_info { 110 mc_dlist_t dev_node; 111 char label[MAX_DEVLEN]; 112 uint64_t size; /* memory size per physical dimm */ 113 }; 114 115 /* id = portid */ 116 struct mctrl_info { 117 mc_dlist_t mctrl_node; 118 int ndevgrps; /* The number of dimm groups */ 119 int devgrpids[NDGRPS]; 120 }; 121 122 extern int (*p2get_mem_unum)(int, uint64_t, char *, int, int *); 123 extern int (*p2get_mem_info)(int, uint64_t, uint64_t *, uint64_t *, 124 uint64_t *, int *, int *, int *); 125 extern int plat_add_mem_unum_label(char *, int, int, int); 126 127 uint64_t get_mcr(int); 128 129 #ifdef DEBUG 130 131 #include <sys/promif.h> 132 133 /* useful debugging level of DPRINTF */ 134 #define MC_ATTACH_DEBUG 0x00000001 135 #define MC_DETACH_DEBUG 0x00000002 136 #define MC_CMD_DEBUG 0x00000004 137 #define MC_REG_DEBUG 0x00000008 138 #define MC_GUNUM_DEBUG 0x00000010 139 #define MC_CNSTRC_DEBUG 0x00000020 140 #define MC_DESTRC_DEBUG 0x00000040 141 #define MC_LIST_DEBUG 0x00000080 142 143 static uint_t mc_debug = 0; 144 145 #define _PRINTF prom_printf 146 #define DPRINTF(flag, args) if (mc_debug & flag) _PRINTF args; 147 #else 148 #define DPRINTF(flag, args) 149 150 #endif /* DEBUG */ 151 152 #endif /* !_ASM */ 153 154 /* Memory Address Decoding Registers */ 155 #define ASI_MCU_CTRL 0x72 156 #define REGOFFSET 8 157 #define MADR0OFFSET 0x10 158 159 /* Mask and shift constants for Memory Address Decoding */ 160 #define MADR_UPA_MASK 0x7fffc000000LL /* 17 bits */ 161 #define MADR_LPA_MASK 0x000000003c0LL /* 4 bits */ 162 #define MADR_LK_MASK 0x0000003c000LL /* 4 bits */ 163 164 #define MADR_UPA_SHIFT 26 165 #define MADR_LPA_SHIFT 6 166 #define MADR_LK_SHIFT 14 167 168 #endif /* _KERNEL */ 169 170 #ifdef __cplusplus 171 } 172 #endif 173 174 #endif /* _SYS_MC_US3_H */ 175