xref: /titanic_51/usr/src/uts/sun4u/sunfire/ml/sysctrl_asm.s (revision 29949e866e40b95795203f3ee46f44a197c946e4)
1*29949e86Sstevel/*
2*29949e86Sstevel * CDDL HEADER START
3*29949e86Sstevel *
4*29949e86Sstevel * The contents of this file are subject to the terms of the
5*29949e86Sstevel * Common Development and Distribution License (the "License").
6*29949e86Sstevel * You may not use this file except in compliance with the License.
7*29949e86Sstevel *
8*29949e86Sstevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*29949e86Sstevel * or http://www.opensolaris.org/os/licensing.
10*29949e86Sstevel * See the License for the specific language governing permissions
11*29949e86Sstevel * and limitations under the License.
12*29949e86Sstevel *
13*29949e86Sstevel * When distributing Covered Code, include this CDDL HEADER in each
14*29949e86Sstevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*29949e86Sstevel * If applicable, add the following below this CDDL HEADER, with the
16*29949e86Sstevel * fields enclosed by brackets "[]" replaced with your own identifying
17*29949e86Sstevel * information: Portions Copyright [yyyy] [name of copyright owner]
18*29949e86Sstevel *
19*29949e86Sstevel * CDDL HEADER END
20*29949e86Sstevel */
21*29949e86Sstevel
22*29949e86Sstevel/*
23*29949e86Sstevel * Copyright 2001 Sun Microsystems, Inc.  All rights reserved.
24*29949e86Sstevel * Use is subject to license terms.
25*29949e86Sstevel */
26*29949e86Sstevel
27*29949e86Sstevel#pragma	ident	"%Z%%M%	%I%	%E% SMI"
28*29949e86Sstevel
29*29949e86Sstevel#include <sys/param.h>
30*29949e86Sstevel#include <sys/errno.h>
31*29949e86Sstevel#include <sys/asm_linkage.h>
32*29949e86Sstevel#include <sys/vtrace.h>
33*29949e86Sstevel#include <sys/machthread.h>
34*29949e86Sstevel#include <sys/clock.h>
35*29949e86Sstevel#include <sys/asi.h>
36*29949e86Sstevel#include <sys/fsr.h>
37*29949e86Sstevel#include <sys/privregs.h>
38*29949e86Sstevel#include <sys/pte.h>
39*29949e86Sstevel#include <sys/mmu.h>
40*29949e86Sstevel#include <sys/spitregs.h>
41*29949e86Sstevel
42*29949e86Sstevel#if defined(lint)
43*29949e86Sstevel
44*29949e86Sstevel#else	/* lint */
45*29949e86Sstevel#include "assym.h"
46*29949e86Sstevel#endif	/* lint */
47*29949e86Sstevel
48*29949e86Sstevel#define	TT_HSM	0x99
49*29949e86Sstevel
50*29949e86Sstevel#if defined(lint)
51*29949e86Sstevelvoid
52*29949e86Sstevelsysctrl_freeze(void)
53*29949e86Sstevel{}
54*29949e86Sstevel#else /* lint */
55*29949e86Sstevel/*
56*29949e86Sstevel * This routine quiets a cpu and has it spin on a barrier.
57*29949e86Sstevel * It is used during memory sparing so that no memory operation
58*29949e86Sstevel * occurs during the memory copy.
59*29949e86Sstevel *
60*29949e86Sstevel *	Entry:
61*29949e86Sstevel *		%g1    - gate array base address
62*29949e86Sstevel *		%g2    - barrier base address
63*29949e86Sstevel *		%g3    - arg2
64*29949e86Sstevel *		%g4    - arg3
65*29949e86Sstevel *
66*29949e86Sstevel * 	Register Usage:
67*29949e86Sstevel *		%g3    - saved pstate
68*29949e86Sstevel *		%g4    - temporary
69*29949e86Sstevel *		%g5    - check for panicstr
70*29949e86Sstevel */
71*29949e86Sstevel	ENTRY_NP(sysctrl_freeze)
72*29949e86Sstevel	CPU_INDEX(%g4, %g5)
73*29949e86Sstevel	sll	%g4, 2, %g4
74*29949e86Sstevel	add	%g4, %g1, %g4			! compute address of gate id
75*29949e86Sstevel
76*29949e86Sstevel	st	%g4, [%g4]			! indicate we are ready
77*29949e86Sstevel	membar	#Sync
78*29949e86Sstevel1:
79*29949e86Sstevel	sethi	%hi(panicstr), %g5
80*29949e86Sstevel	ldn	[%g5 + %lo(panicstr)], %g5
81*29949e86Sstevel	brnz	%g5, 2f				! exit if in panic
82*29949e86Sstevel	 nop
83*29949e86Sstevel	ld	[%g2], %g4
84*29949e86Sstevel	brz,pt	%g4, 1b				! spin until barrier true
85*29949e86Sstevel	 nop
86*29949e86Sstevel
87*29949e86Sstevel2:
88*29949e86Sstevel	retry
89*29949e86Sstevel	membar	#Sync
90*29949e86Sstevel	SET_SIZE(sysctrl_freeze)
91*29949e86Sstevel
92*29949e86Sstevel#endif	/* lint */
93